# define v6wbi_always_flags (-1UL)
#endif
+#ifdef CONFIG_CPU_TLB_V7
+# define v7wbi_possible_flags v6wbi_tlb_flags
+# define v7wbi_always_flags v6wbi_tlb_flags
+# ifdef _TLB
+# define MULTI_TLB 1
+# else
+# define _TLB v7wbi
+# endif
+#else
+# define v7wbi_possible_flags 0
+# define v7wbi_always_flags (-1UL)
+#endif
+
#ifndef _TLB
#error Unknown TLB model
#endif
#ifndef __ASSEMBLY__
+#include <linux/sched.h>
+
struct cpu_tlb_fns {
void (*flush_user_range)(unsigned long, unsigned long, struct vm_area_struct *);
void (*flush_kern_range)(unsigned long, unsigned long);
*/
extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte);
-/*
- * ARM processors do not cache TLB tables in RAM.
- */
-#define flush_tlb_pgtables(mm,start,end) do { } while (0)
-
#endif
#endif /* CONFIG_MMU */