[PATCH] jffs/jffs2: remove wrong function prototypes

[linux-2.6] / include / asm-arm / pgtable.h

diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index 91ffb1f4cd1025d1ef256a358c12b577a68779ed..478c49b56e18d0fa3658eeb7c5a7d25c86f53de6 100644 (file)
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -16,6 +16,23 @@
 #include <asm/proc-fns.h>
 #include <asm/arch/vmalloc.h>
 
+/*
+ * Just any arbitrary offset to the start of the vmalloc VM area: the
+ * current 8MB value just means that there will be a 8MB "hole" after the
+ * physical memory until the kernel virtual memory starts.  That means that
+ * any out-of-bounds memory accesses will hopefully be caught.
+ * The vmalloc() routines leaves a hole of 4kB between each vmalloced
+ * area for the same reason. ;)
+ *
+ * Note that platforms may override VMALLOC_START, but they must provide
+ * VMALLOC_END.  VMALLOC_END defines the (exclusive) limit of this space,
+ * which may not overlap IO space.
+ */
+#ifndef VMALLOC_START
+#define VMALLOC_OFFSET         (8*1024*1024)
+#define VMALLOC_START          (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
+#endif
+
 /*
  * Hardware-wise, we have a two level page table structure, where the first
  * level has 4096 entries, and the second level has 256 entries.  Each entry
@@ -102,6 +119,13 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 #define PGDIR_SIZE             (1UL << PGDIR_SHIFT)
 #define PGDIR_MASK             (~(PGDIR_SIZE-1))
 
+/*
+ * This is the lowest virtual address we can permit any user space
+ * mapping to be mapped at.  This is particularly important for
+ * non-high vector CPUs.
+ */
+#define FIRST_USER_ADDRESS     PAGE_SIZE
+
 #define FIRST_USER_PGD_NR      1
 #define USER_PTRS_PER_PGD      ((TASK_SIZE/PGDIR_SIZE) - FIRST_USER_PGD_NR)
 
@@ -164,12 +188,18 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 /*
  *   - extended small page/tiny page
  */
+#define PTE_EXT_XN             (1 << 0)        /* v6 */
 #define PTE_EXT_AP_MASK                (3 << 4)
+#define PTE_EXT_AP0            (1 << 4)
+#define PTE_EXT_AP1            (2 << 4)
 #define PTE_EXT_AP_UNO_SRO     (0 << 4)
-#define PTE_EXT_AP_UNO_SRW     (1 << 4)
-#define PTE_EXT_AP_URO_SRW     (2 << 4)
-#define PTE_EXT_AP_URW_SRW     (3 << 4)
+#define PTE_EXT_AP_UNO_SRW     (PTE_EXT_AP0)
+#define PTE_EXT_AP_URO_SRW     (PTE_EXT_AP1)
+#define PTE_EXT_AP_URW_SRW     (PTE_EXT_AP1|PTE_EXT_AP0)
 #define PTE_EXT_TEX(x)         ((x) << 6)      /* v5 */
+#define PTE_EXT_APX            (1 << 9)        /* v6 */
+#define PTE_EXT_SHARED         (1 << 10)       /* v6 */
+#define PTE_EXT_NG             (1 << 11)       /* v6 */
 
 /*
  *   - small page
@@ -200,6 +230,8 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 #define L_PTE_WRITE            (1 << 5)
 #define L_PTE_EXEC             (1 << 6)
 #define L_PTE_DIRTY            (1 << 7)
+#define L_PTE_SHARED           (1 << 10)       /* shared between CPUs (v6) */
+#define L_PTE_ASID             (1 << 11)       /* non-global (use ASID, v6) */
 
 #ifndef __ASSEMBLY__