#include <asm/arch/irqs.h>
#include <asm/hardware/dec21285.h>
+ .equ dc21285_high, ARMCSR_BASE & 0xff000000
+ .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
+
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
+ mov \base, #dc21285_high
+ .if dc21285_low
+ orr \base, \base, #dc21285_low
+ .endif
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
- .equ dc21285_high, ARMCSR_BASE & 0xff000000
- .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov r4, #dc21285_high
- .if dc21285_low
- orr r4, r4, #dc21285_low
- .endif
- ldr \irqstat, [r4, #0x180] @ get interrupts
+ ldr \irqstat, [\base, #0x180] @ get interrupts
mov \irqnr, #IRQ_SDRAMPARITY
tst \irqstat, #IRQ_MASK_SDRAMPARITY