Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6

[linux-2.6] / include / asm-arm / arch-at91 / at91_dbgu.h

diff --git a/include/asm-arm/arch-at91/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h
index 1002a808ad91fbd9c3bcc66c1284e667d15488c9..8019ffd0ad3b61a23ee920a3b6b79e2009b16ec6 100644 (file)
--- a/include/asm-arm/arch-at91/at91_dbgu.h
+++ b/include/asm-arm/arch-at91/at91_dbgu.h
@@ -16,6 +16,7 @@
 #ifndef AT91_DBGU_H
 #define AT91_DBGU_H
 
+#ifdef AT91_DBGU
 #define AT91_DBGU_CR           (AT91_DBGU + 0x00)      /* Control Register */
 #define AT91_DBGU_MR           (AT91_DBGU + 0x04)      /* Mode Register */
 #define AT91_DBGU_IER          (AT91_DBGU + 0x08)      /* Interrupt Enable Register */
@@ -30,16 +31,36 @@
 
 #define AT91_DBGU_CIDR         (AT91_DBGU + 0x40)      /* Chip ID Register */
 #define AT91_DBGU_EXID         (AT91_DBGU + 0x44)      /* Chip ID Extension Register */
+#define AT91_DBGU_FNR          (AT91_DBGU + 0x48)      /* Force NTRST Register [SAM9 only] */
+#define                AT91_DBGU_FNTRST        (1 << 0)                /* Force NTRST */
+
+#endif /* AT91_DBGU */
+
+/*
+ * Some AT91 parts that don't have full DEBUG units still support the ID
+ * and extensions register.
+ */
 #define                AT91_CIDR_VERSION       (0x1f << 0)             /* Version of the Device */
 #define                AT91_CIDR_EPROC         (7    << 5)             /* Embedded Processor */
 #define                AT91_CIDR_NVPSIZ        (0xf  << 8)             /* Nonvolatile Program Memory Size */
 #define                AT91_CIDR_NVPSIZ2       (0xf  << 12)            /* Second Nonvolatile Program Memory Size */
 #define                AT91_CIDR_SRAMSIZ       (0xf  << 16)            /* Internal SRAM Size */
+#define                        AT91_CIDR_SRAMSIZ_1K    (1 << 16)
+#define                        AT91_CIDR_SRAMSIZ_2K    (2 << 16)
+#define                        AT91_CIDR_SRAMSIZ_112K  (4 << 16)
+#define                        AT91_CIDR_SRAMSIZ_4K    (5 << 16)
+#define                        AT91_CIDR_SRAMSIZ_80K   (6 << 16)
+#define                        AT91_CIDR_SRAMSIZ_160K  (7 << 16)
+#define                        AT91_CIDR_SRAMSIZ_8K    (8 << 16)
+#define                        AT91_CIDR_SRAMSIZ_16K   (9 << 16)
+#define                        AT91_CIDR_SRAMSIZ_32K   (10 << 16)
+#define                        AT91_CIDR_SRAMSIZ_64K   (11 << 16)
+#define                        AT91_CIDR_SRAMSIZ_128K  (12 << 16)
+#define                        AT91_CIDR_SRAMSIZ_256K  (13 << 16)
+#define                        AT91_CIDR_SRAMSIZ_96K   (14 << 16)
+#define                        AT91_CIDR_SRAMSIZ_512K  (15 << 16)
 #define                AT91_CIDR_ARCH          (0xff << 20)            /* Architecture Identifier */
 #define                AT91_CIDR_NVPTYP        (7    << 28)            /* Nonvolatile Program Memory Type */
 #define                AT91_CIDR_EXT           (1    << 31)            /* Extension Flag */
 
-#define AT91_DBGU_FNR          (AT91_DBGU + 0x48)      /* Force NTRST Register [SAM9 only] */
-#define                AT91_DBGU_FNTRST        (1 << 0)                /* Force NTRST */
-
 #endif