struct rsdt_descriptor_rev1
{
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
- u32 table_offset_entry [1]; /* Array of pointers to other */
- /* ACPI tables */
+ u32 table_offset_entry[1]; /* Array of pointers to ACPI tables */
};
*/
struct facs_descriptor_rev1
{
- char signature[4]; /* ACPI Signature */
- u32 length; /* Length of structure, in bytes */
+ char signature[4]; /* ASCII table signature */
+ u32 length; /* Length of structure in bytes */
u32 hardware_signature; /* Hardware configuration signature */
u32 firmware_waking_vector; /* ACPI OS waking vector */
u32 global_lock; /* Global Lock */
- u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */
- u32 reserved1 : 31; /* Must be 0 */
- u8 resverved3 [40]; /* Reserved - must be zero */
+
+ /* Flags (32 bits) */
+
+ u8 S4bios_f : 1; /* 00: S4BIOS support is present */
+ u8 : 7; /* 01-07: Reserved, must be zero */
+ u8 reserved1[3]; /* 08-31: Reserved, must be zero */
+
+ u8 reserved2[40]; /* Reserved, must be zero */
};
u32 firmware_ctrl; /* Physical address of FACS */
u32 dsdt; /* Physical address of DSDT */
u8 model; /* System Interrupt Model */
- u8 reserved1; /* Reserved */
+ u8 reserved1; /* Reserved, must be zero */
u16 sci_int; /* System vector of SCI interrupt */
u32 smi_cmd; /* Port address of SMI command port */
u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
- u8 reserved2; /* Reserved - must be zero */
+ u8 reserved2; /* Reserved, must be zero */
u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
- u8 reserved3; /* Reserved */
+ u8 reserved3; /* Reserved, must be zero */
u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
u16 flush_size; /* Size of area read to flush caches */
u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
u8 century; /* Index to century in RTC CMOS RAM */
- u8 reserved4; /* Reserved */
- u8 reserved4a; /* Reserved */
- u8 reserved4b; /* Reserved */
- u32 wb_invd : 1; /* The wbinvd instruction works properly */
- u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
- u32 proc_c1 : 1; /* All processors support C1 state */
- u32 plvl2_up : 1; /* C2 state works on MP system */
- u32 pwr_button : 1; /* Power button is handled as a generic feature */
- u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
- u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
- u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
- u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */
- u32 reserved5 : 23; /* Reserved - must be zero */
+ u8 reserved4[3]; /* Reserved, must be zero */
+
+ /* Flags (32 bits) */
+
+ u8 wb_invd : 1; /* 00: The wbinvd instruction works properly */
+ u8 wb_invd_flush : 1; /* 01: The wbinvd flushes but does not invalidate */
+ u8 proc_c1 : 1; /* 02: All processors support C1 state */
+ u8 plvl2_up : 1; /* 03: C2 state works on MP system */
+ u8 pwr_button : 1; /* 04: Power button is handled as a generic feature */
+ u8 sleep_button : 1; /* 05: Sleep button is handled as a generic feature, or not present */
+ u8 fixed_rTC : 1; /* 06: RTC wakeup stat not in fixed register space */
+ u8 rtcs4 : 1; /* 07: RTC wakeup stat not possible from S4 */
+ u8 tmr_val_ext : 1; /* 08: tmr_val width is 32 bits (0 = 24 bits) */
+ u8 : 7; /* 09-15: Reserved, must be zero */
+ u8 reserved5[2]; /* 16-31: Reserved, must be zero */
};
#pragma pack()
projects / linux-2.6 / blobdiff