fsl-diu-db: compile fix

[linux-2.6] / drivers / video / atmel_lcdfb.c

diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index 5a31a7a40cd4a0026a93d21da1950c270d2aaa89..b004036d40873aec5a5c8905a626722ab8b29533 100644 (file)
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -31,7 +31,8 @@
 #define ATMEL_LCDC_CVAL_DEFAULT                0xc8
 #define ATMEL_LCDC_DMA_BURST_LEN       8
 
-#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
+#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
+       defined(CONFIG_ARCH_AT91SAM9RL)
 #define ATMEL_LCDC_FIFO_SIZE           2048
 #else
 #define ATMEL_LCDC_FIFO_SIZE           512
@@ -440,14 +441,15 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
 
        value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
 
-       value = (value / 2) - 1;
-       dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n", value);
-
-       if (value <= 0) {
+       if (value < 2) {
                dev_notice(info->device, "Bypassing pixel clock divider\n");
                lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
        } else {
-               lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
+               value = (value / 2) - 1;
+               dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
+                               value);
+               lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
+                               value << ATMEL_LCDC_CLKVAL_OFFSET);
                info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
                dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
                                        PICOS2KHZ(info->var.pixclock));