#define ADDR32 (0)
-#include <linux/version.h>
#include <linux/module.h>
MODULE_AUTHOR("Deanna Bonds, with _lots_ of help from Mark Salyzyn");
{
adpt_hba* pHba = NULL;
struct adpt_device* pDev = NULL; /* dpt per device information */
- ulong timeout = jiffies + (TMOUT_SCSI*HZ);
cmd->scsi_done = done;
/*
return 1;
}
- if(cmd->eh_state != SCSI_STATE_QUEUED){
- // If we are not doing error recovery
- mod_timer(&cmd->eh_timeout, timeout);
- }
-
// TODO if the cmd->device if offline then I may need to issue a bus rescan
// followed by a get_lct to see if the device is there anymore
if((pDev = (struct adpt_device*) (cmd->device->hostdata)) == NULL) {
u32 msg[4];
u32 rcode;
int old_state;
- struct adpt_device* d = (void*) cmd->device->hostdata;
+ struct adpt_device* d = cmd->device->hostdata;
pHba = (void*) cmd->device->host->hostdata[0];
printk(KERN_INFO"%s: Trying to reset device\n",pHba->name);
old_state = d->state;
d->state |= DPTI_DEV_RESET;
- if( (rcode = adpt_i2o_post_wait(pHba, (void*)msg,sizeof(msg), FOREVER)) ){
+ if( (rcode = adpt_i2o_post_wait(pHba, msg,sizeof(msg), FOREVER)) ){
d->state = old_state;
if(rcode == -EOPNOTSUPP ){
printk(KERN_INFO"%s: Device reset not supported\n",pHba->name);
msg[1] = (I2O_HBA_BUS_RESET<<24|HOST_TID<<12|pHba->channel[cmd->device->channel].tid);
msg[2] = 0;
msg[3] = 0;
- if(adpt_i2o_post_wait(pHba, (void*)msg,sizeof(msg), FOREVER) ){
+ if(adpt_i2o_post_wait(pHba, msg,sizeof(msg), FOREVER) ){
printk(KERN_WARNING"%s: Bus reset failed.\n",pHba->name);
return FAILED;
} else {
}
// This version of reset is called by the eh_error_handler
-static int adpt_reset(struct scsi_cmnd* cmd)
+static int __adpt_reset(struct scsi_cmnd* cmd)
{
adpt_hba* pHba;
int rcode;
}
}
+static int adpt_reset(struct scsi_cmnd* cmd)
+{
+ int rc;
+
+ spin_lock_irq(cmd->device->host->host_lock);
+ rc = __adpt_reset(cmd);
+ spin_unlock_irq(cmd->device->host->host_lock);
+
+ return rc;
+}
+
// This version of reset is called by the ioctls and indirectly from eh_error_handler via adpt_reset
static int adpt_hba_reset(adpt_hba* pHba)
{
struct adpt_i2o_post_wait_data *p1, *p2;
struct adpt_i2o_post_wait_data *wait_data =
kmalloc(sizeof(struct adpt_i2o_post_wait_data),GFP_KERNEL);
- adpt_wait_queue_t wait;
+ DECLARE_WAITQUEUE(wait, current);
- if(!wait_data){
+ if (!wait_data)
return -ENOMEM;
- }
+
/*
* The spin locking is needed to keep anyone from playing
* with the queue pointers and id while we do the same
wait_data->wq = &adpt_wq_i2o_post;
wait_data->status = -ETIMEDOUT;
- // this code is taken from kernel/sched.c:interruptible_sleep_on_timeout
- wait.task = current;
- init_waitqueue_entry(&wait, current);
- spin_lock_irqsave(&adpt_wq_i2o_post.lock, flags);
- __add_wait_queue(&adpt_wq_i2o_post, &wait);
- spin_unlock(&adpt_wq_i2o_post.lock);
+ add_wait_queue(&adpt_wq_i2o_post, &wait);
msg[2] |= 0x80000000 | ((u32)wait_data->id);
timeout *= HZ;
if(pHba->host)
spin_lock_irq(pHba->host->host_lock);
}
- spin_lock_irq(&adpt_wq_i2o_post.lock);
- __remove_wait_queue(&adpt_wq_i2o_post, &wait);
- spin_unlock_irqrestore(&adpt_wq_i2o_post.lock, flags);
+ remove_wait_queue(&adpt_wq_i2o_post, &wait);
if(status == -ETIMEDOUT){
printk(KERN_INFO"dpti%d: POST WAIT TIMEOUT\n",pHba->unit);
return -ENOMEM;
}
- d->controller = (void*)pHba;
+ d->controller = pHba;
d->next = NULL;
memcpy(&d->lct_data, &lct->lct_entry[i], sizeof(i2o_lct_entry));
memset(&si, 0, sizeof(si));
si.osType = OS_LINUX;
- si.osMajorVersion = (u8) (LINUX_VERSION_CODE >> 16);
- si.osMinorVersion = (u8) (LINUX_VERSION_CODE >> 8 & 0x0ff);
- si.osRevision = (u8) (LINUX_VERSION_CODE & 0x0ff);
+ si.osMajorVersion = 0;
+ si.osMinorVersion = 0;
+ si.osRevision = 0;
si.busType = SI_PCI_BUS;
si.processorFamily = DPTI_sig.dsProcessorFamily;
struct scsi_cmnd* cmd;
adpt_hba* pHba = dev_id;
u32 m;
- ulong reply;
+ void __iomem *reply;
u32 status=0;
u32 context;
ulong flags = 0;
goto out;
}
}
- reply = (ulong)bus_to_virt(m);
+ reply = bus_to_virt(m);
if (readl(reply) & MSG_FAIL) {
u32 old_m = readl(reply+28);
- ulong msg;
+ void __iomem *msg;
u32 old_context;
PDEBUG("%s: Failed message\n",pHba->name);
if(old_m >= 0x100000){
continue;
}
// Transaction context is 0 in failed reply frame
- msg = (ulong)(pHba->msg_addr_virt + old_m);
+ msg = pHba->msg_addr_virt + old_m;
old_context = readl(msg+12);
writel(old_context, reply+12);
adpt_send_nop(pHba, old_m);
}
context = readl(reply+8);
if(context & 0x40000000){ // IOCTL
- ulong p = (ulong)(readl(reply+12));
- if( p != 0) {
- memcpy((void*)p, (void*)reply, REPLY_FRAME_SIZE * 4);
+ void *p = (void *)readl(reply+12);
+ if( p != NULL) {
+ memcpy_fromio(p, reply, REPLY_FRAME_SIZE * 4);
}
// All IOCTLs will also be post wait
}
}
-static s32 adpt_i2o_to_scsi(ulong reply, struct scsi_cmnd* cmd)
+static s32 adpt_i2o_to_scsi(void __iomem *reply, struct scsi_cmnd* cmd)
{
adpt_hba* pHba;
u32 hba_status;
u32 len = sizeof(cmd->sense_buffer);
len = (len > 40) ? 40 : len;
// Copy over the sense data
- memcpy(cmd->sense_buffer, (void*)(reply+28) , len);
+ memcpy_fromio(cmd->sense_buffer, (reply+28) , len);
if(cmd->sense_buffer[0] == 0x70 /* class 7 */ &&
cmd->sense_buffer[2] == DATA_PROTECT ){
/* This is to handle an array failed */
return -ENOMEM;
}
- d->controller = (void*)pHba;
+ d->controller = pHba;
d->next = NULL;
memcpy(&d->lct_data, &lct->lct_entry[i], sizeof(i2o_lct_entry));
sys_tbl->iops[count].frame_size = pHba->status_block->inbound_frame_size;
sys_tbl->iops[count].last_changed = sys_tbl_ind - 1; // ??
sys_tbl->iops[count].iop_capabilities = pHba->status_block->iop_capabilities;
- sys_tbl->iops[count].inbound_low = (u32)virt_to_bus((void*)pHba->post_port);
- sys_tbl->iops[count].inbound_high = (u32)((u64)virt_to_bus((void*)pHba->post_port)>>32);
+ sys_tbl->iops[count].inbound_low = (u32)virt_to_bus(pHba->post_port);
+ sys_tbl->iops[count].inbound_high = (u32)((u64)virt_to_bus(pHba->post_port)>>32);
count++;
}