pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
} else {
msg->address_hi = 0;
- pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
+ pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
}
msg->data = data;
break;
return entry;
}
+static void pci_intx_for_msi(struct pci_dev *dev, int enable)
+{
+ if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
+ pci_intx(dev, enable);
+}
+
#ifdef CONFIG_PM
static void __pci_restore_msi_state(struct pci_dev *dev)
{
entry = get_irq_msi(dev->irq);
pos = entry->msi_attrib.pos;
- pci_intx(dev, 0); /* disable intx */
+ pci_intx_for_msi(dev, 0);
msi_set_enable(dev, 0);
write_msi_msg(dev->irq, &entry->msg);
if (entry->msi_attrib.maskbit)
return;
/* route the table */
- pci_intx(dev, 0); /* disable intx */
+ pci_intx_for_msi(dev, 0);
msix_set_enable(dev, 0);
list_for_each_entry(entry, &dev->msi_list, list) {
}
/* Set MSI enabled bits */
- pci_intx(dev, 0); /* disable intx */
+ pci_intx_for_msi(dev, 0);
msi_set_enable(dev, 1);
dev->msi_enabled = 1;
i++;
}
/* Set MSI-X enabled bits */
- pci_intx(dev, 0); /* disable intx */
+ pci_intx_for_msi(dev, 0);
msix_set_enable(dev, 1);
dev->msix_enabled = 1;
return;
msi_set_enable(dev, 0);
- pci_intx(dev, 1); /* enable intx */
+ pci_intx_for_msi(dev, 1);
dev->msi_enabled = 0;
BUG_ON(list_empty(&dev->msi_list));
return;
msix_set_enable(dev, 0);
- pci_intx(dev, 1); /* enable intx */
+ pci_intx_for_msi(dev, 1);
dev->msix_enabled = 0;
msix_free_all_irqs(dev);