]> err.no Git - linux-2.6/blobdiff - drivers/net/wireless/rt2x00/rt61pci.c
rt2x00: Merge RX and TX entry private data
[linux-2.6] / drivers / net / wireless / rt2x00 / rt61pci.c
index 2e5e45cbd2e50f56e77f6d7b9f44128cdb3ebe03..7598b6e157843d2b4df69e69833e7cdd19a95f73 100644 (file)
@@ -1018,35 +1018,34 @@ static int rt61pci_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 static void rt61pci_init_rxentry(struct rt2x00_dev *rt2x00dev,
                                 struct queue_entry *entry)
 {
-       struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data;
+       struct queue_entry_priv_pci *entry_priv = entry->priv_data;
        u32 word;
 
-       rt2x00_desc_read(priv_rx->desc, 5, &word);
+       rt2x00_desc_read(entry_priv->desc, 5, &word);
        rt2x00_set_field32(&word, RXD_W5_BUFFER_PHYSICAL_ADDRESS,
-                          priv_rx->data_dma);
-       rt2x00_desc_write(priv_rx->desc, 5, word);
+                          entry_priv->data_dma);
+       rt2x00_desc_write(entry_priv->desc, 5, word);
 
-       rt2x00_desc_read(priv_rx->desc, 0, &word);
+       rt2x00_desc_read(entry_priv->desc, 0, &word);
        rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1);
-       rt2x00_desc_write(priv_rx->desc, 0, word);
+       rt2x00_desc_write(entry_priv->desc, 0, word);
 }
 
 static void rt61pci_init_txentry(struct rt2x00_dev *rt2x00dev,
                                 struct queue_entry *entry)
 {
-       struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
+       struct queue_entry_priv_pci *entry_priv = entry->priv_data;
        u32 word;
 
-       rt2x00_desc_read(priv_tx->desc, 0, &word);
+       rt2x00_desc_read(entry_priv->desc, 0, &word);
        rt2x00_set_field32(&word, TXD_W0_VALID, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
-       rt2x00_desc_write(priv_tx->desc, 0, word);
+       rt2x00_desc_write(entry_priv->desc, 0, word);
 }
 
 static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev)
 {
-       struct queue_entry_priv_pci_rx *priv_rx;
-       struct queue_entry_priv_pci_tx *priv_tx;
+       struct queue_entry_priv_pci *entry_priv;
        u32 reg;
 
        /*
@@ -1068,28 +1067,28 @@ static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev)
                           rt2x00dev->tx[0].desc_size / 4);
        rt2x00pci_register_write(rt2x00dev, TX_RING_CSR1, reg);
 
-       priv_tx = rt2x00dev->tx[0].entries[0].priv_data;
+       entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
        rt2x00pci_register_read(rt2x00dev, AC0_BASE_CSR, &reg);
        rt2x00_set_field32(&reg, AC0_BASE_CSR_RING_REGISTER,
-                          priv_tx->desc_dma);
+                          entry_priv->desc_dma);
        rt2x00pci_register_write(rt2x00dev, AC0_BASE_CSR, reg);
 
-       priv_tx = rt2x00dev->tx[1].entries[0].priv_data;
+       entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
        rt2x00pci_register_read(rt2x00dev, AC1_BASE_CSR, &reg);
        rt2x00_set_field32(&reg, AC1_BASE_CSR_RING_REGISTER,
-                          priv_tx->desc_dma);
+                          entry_priv->desc_dma);
        rt2x00pci_register_write(rt2x00dev, AC1_BASE_CSR, reg);
 
-       priv_tx = rt2x00dev->tx[2].entries[0].priv_data;
+       entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
        rt2x00pci_register_read(rt2x00dev, AC2_BASE_CSR, &reg);
        rt2x00_set_field32(&reg, AC2_BASE_CSR_RING_REGISTER,
-                          priv_tx->desc_dma);
+                          entry_priv->desc_dma);
        rt2x00pci_register_write(rt2x00dev, AC2_BASE_CSR, reg);
 
-       priv_tx = rt2x00dev->tx[3].entries[0].priv_data;
+       entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
        rt2x00pci_register_read(rt2x00dev, AC3_BASE_CSR, &reg);
        rt2x00_set_field32(&reg, AC3_BASE_CSR_RING_REGISTER,
-                          priv_tx->desc_dma);
+                          entry_priv->desc_dma);
        rt2x00pci_register_write(rt2x00dev, AC3_BASE_CSR, reg);
 
        rt2x00pci_register_read(rt2x00dev, RX_RING_CSR, &reg);
@@ -1099,10 +1098,10 @@ static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev)
        rt2x00_set_field32(&reg, RX_RING_CSR_RXD_WRITEBACK_SIZE, 4);
        rt2x00pci_register_write(rt2x00dev, RX_RING_CSR, reg);
 
-       priv_rx = rt2x00dev->rx->entries[0].priv_data;
+       entry_priv = rt2x00dev->rx->entries[0].priv_data;
        rt2x00pci_register_read(rt2x00dev, RX_BASE_CSR, &reg);
        rt2x00_set_field32(&reg, RX_BASE_CSR_RING_REGISTER,
-                          priv_rx->desc_dma);
+                          entry_priv->desc_dma);
        rt2x00pci_register_write(rt2x00dev, RX_BASE_CSR, reg);
 
        rt2x00pci_register_read(rt2x00dev, TX_DMA_DST_CSR, &reg);
@@ -1515,7 +1514,7 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
                                    struct txentry_desc *txdesc)
 {
        struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
-       struct queue_entry_priv_pci_tx *entry_priv = skbdesc->entry->priv_data;
+       struct queue_entry_priv_pci *entry_priv = skbdesc->entry->priv_data;
        __le32 *txd = skbdesc->desc;
        u32 word;
 
@@ -1661,12 +1660,12 @@ static int rt61pci_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
 static void rt61pci_fill_rxdone(struct queue_entry *entry,
                                struct rxdone_entry_desc *rxdesc)
 {
-       struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data;
+       struct queue_entry_priv_pci *entry_priv = entry->priv_data;
        u32 word0;
        u32 word1;
 
-       rt2x00_desc_read(priv_rx->desc, 0, &word0);
-       rt2x00_desc_read(priv_rx->desc, 1, &word1);
+       rt2x00_desc_read(entry_priv->desc, 0, &word0);
+       rt2x00_desc_read(entry_priv->desc, 1, &word1);
 
        if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
                rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -1695,7 +1694,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
        struct data_queue *queue;
        struct queue_entry *entry;
        struct queue_entry *entry_done;
-       struct queue_entry_priv_pci_tx *priv_tx;
+       struct queue_entry_priv_pci *entry_priv;
        struct txdone_entry_desc txdesc;
        u32 word;
        u32 reg;
@@ -1740,8 +1739,8 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
                        continue;
 
                entry = &queue->entries[index];
-               priv_tx = entry->priv_data;
-               rt2x00_desc_read(priv_tx->desc, 0, &word);
+               entry_priv = entry->priv_data;
+               rt2x00_desc_read(entry_priv->desc, 0, &word);
 
                if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) ||
                    !rt2x00_get_field32(word, TXD_W0_VALID))
@@ -2363,7 +2362,7 @@ static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
 {
        struct rt2x00_dev *rt2x00dev = hw->priv;
        struct rt2x00_intf *intf = vif_to_intf(control->vif);
-       struct queue_entry_priv_pci_tx *priv_tx;
+       struct queue_entry_priv_pci *entry_priv;
        struct skb_frame_desc *skbdesc;
        struct txentry_desc txdesc;
        unsigned int beacon_base;
@@ -2380,8 +2379,8 @@ static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
        intf->beacon->skb = skb;
        rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc, control);
 
-       priv_tx = intf->beacon->priv_data;
-       memset(priv_tx->desc, 0, intf->beacon->queue->desc_size);
+       entry_priv = intf->beacon->priv_data;
+       memset(entry_priv->desc, 0, intf->beacon->queue->desc_size);
 
        /*
         * Fill in skb descriptor
@@ -2391,7 +2390,7 @@ static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
        skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
        skbdesc->data = skb->data;
        skbdesc->data_len = skb->len;
-       skbdesc->desc = priv_tx->desc;
+       skbdesc->desc = entry_priv->desc;
        skbdesc->desc_len = intf->beacon->queue->desc_size;
        skbdesc->entry = intf->beacon;
 
@@ -2468,21 +2467,21 @@ static const struct data_queue_desc rt61pci_queue_rx = {
        .entry_num              = RX_ENTRIES,
        .data_size              = DATA_FRAME_SIZE,
        .desc_size              = RXD_DESC_SIZE,
-       .priv_size              = sizeof(struct queue_entry_priv_pci_rx),
+       .priv_size              = sizeof(struct queue_entry_priv_pci),
 };
 
 static const struct data_queue_desc rt61pci_queue_tx = {
        .entry_num              = TX_ENTRIES,
        .data_size              = DATA_FRAME_SIZE,
        .desc_size              = TXD_DESC_SIZE,
-       .priv_size              = sizeof(struct queue_entry_priv_pci_tx),
+       .priv_size              = sizeof(struct queue_entry_priv_pci),
 };
 
 static const struct data_queue_desc rt61pci_queue_bcn = {
        .entry_num              = 4 * BEACON_ENTRIES,
        .data_size              = 0, /* No DMA required for beacons */
        .desc_size              = TXINFO_SIZE,
-       .priv_size              = sizeof(struct queue_entry_priv_pci_tx),
+       .priv_size              = sizeof(struct queue_entry_priv_pci),
 };
 
 static const struct rt2x00_ops rt61pci_ops = {