#define VS
#endif
-#define IWLWIFI_VERSION "1.1.17k" VD VS
+#define IWLWIFI_VERSION "1.1.19k" VD VS
#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
#define DRV_VERSION IWLWIFI_VERSION
static int iwl_queue_space(const struct iwl_queue *q)
{
- int s = q->last_used - q->first_empty;
+ int s = q->read_ptr - q->write_ptr;
- if (q->last_used > q->first_empty)
+ if (q->read_ptr > q->write_ptr)
s -= q->n_bd;
if (s <= 0)
static inline int x2_queue_used(const struct iwl_queue *q, int i)
{
- return q->first_empty > q->last_used ?
- (i >= q->last_used && i < q->first_empty) :
- !(i < q->last_used && i >= q->first_empty);
+ return q->write_ptr > q->read_ptr ?
+ (i >= q->read_ptr && i < q->write_ptr) :
+ !(i < q->read_ptr && i >= q->write_ptr);
}
static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
if (q->high_mark < 2)
q->high_mark = 2;
- q->first_empty = q->last_used = 0;
+ q->write_ptr = q->read_ptr = 0;
return 0;
}
txq->txb = kmalloc(sizeof(txq->txb[0]) *
TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
if (!txq->txb) {
- IWL_ERROR("kmalloc for auxilary BD "
+ IWL_ERROR("kmalloc for auxiliary BD "
"structures failed\n");
goto error;
}
int len;
int rc = 0;
- /* alocate command space + one big command for scan since scan
+ /* allocate command space + one big command for scan since scan
* command is very huge the system will not have two scan at the
* same time */
len = sizeof(struct iwl_cmd) * slots_num;
return;
/* first, empty all BD's */
- for (; q->first_empty != q->last_used;
- q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
+ for (; q->write_ptr != q->read_ptr;
+ q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
iwl_hw_txq_free_tfd(priv, txq);
len = sizeof(struct iwl_cmd) * q->n_window;
*/
/**************************************************************/
-#if 0 /* temparary disable till we add real remove station */
+#if 0 /* temporary disable till we add real remove station */
static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
{
int index = IWL_INVALID_STATION;
index = i;
}
- /* These twh conditions has the same outcome but keep them separate
+ /* These two conditions has the same outcome but keep them separate
since they have different meaning */
if (unlikely(index == IWL_INVALID_STATION)) {
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
station->sta.sta.sta_id = index;
station->sta.station_flags = 0;
- rate = (priv->phymode == MODE_IEEE80211A) ? IWL_RATE_6M_PLCP :
- IWL_RATE_1M_PLCP | priv->hw_setting.cck_flag;
+ if (priv->phymode == MODE_IEEE80211A)
+ rate = IWL_RATE_6M_PLCP;
+ else
+ rate = IWL_RATE_1M_PLCP;
/* Turn on both antennas for the station... */
station->sta.rate_n_flags =
spin_lock_irqsave(&priv->hcmd_lock, flags);
- tfd = &txq->bd[q->first_empty];
+ tfd = &txq->bd[q->write_ptr];
memset(tfd, 0, sizeof(*tfd));
control_flags = (u32 *) tfd;
- idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
+ idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
out_cmd = &txq->cmd[idx];
out_cmd->hdr.cmd = cmd->id;
out_cmd->hdr.flags = 0;
out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
- INDEX_TO_SEQ(q->first_empty));
+ INDEX_TO_SEQ(q->write_ptr));
if (out_cmd->meta.flags & CMD_SIZE_HUGE)
out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
"%d bytes at %d[%d]:%d\n",
get_cmd_string(out_cmd->hdr.cmd),
out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
- fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
+ fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
txq->need_update = 1;
- q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
+ q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
ret = iwl_tx_queue_update_write_ptr(priv, txq);
spin_unlock_irqrestore(&priv->hcmd_lock, flags);
int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
{
- /* A command can not be asynchronous AND expect an SKB to be set. */
- BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
- (cmd->meta.flags & CMD_WANT_SKB));
-
if (cmd->meta.flags & CMD_ASYNC)
return iwl_send_cmd_async(priv, cmd);
/**
* iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
- * @priv: staging_rxon is comapred to active_rxon
+ * @priv: staging_rxon is compared to active_rxon
*
* If the RXON structure is changing sufficient to require a new
* tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
/**
* iwl_commit_rxon - commit staging_rxon to hardware
*
- * The RXON command in staging_rxon is commited to the hardware and
+ * The RXON command in staging_rxon is committed to the hardware and
* the active_rxon structure is updated with the new data. This
* function correctly transitions out of the RXON_ASSOC_MSK state if
* a HW tune is required based on the RXON structure changes.
break;
case ALG_TKIP:
case ALG_WEP:
- return -EINVAL;
default:
return -EINVAL;
}
return -ENOENT;
}
- rc = iwl_eeprom_aqcuire_semaphore(priv);
+ rc = iwl_eeprom_acquire_semaphore(priv);
if (rc < 0) {
- IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
+ IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
return -ENOENT;
}
for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
i += IWL_EEPROM_ACCESS_DELAY) {
- r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
+ r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
if (r & CSR_EEPROM_REG_READ_VALID_MSK)
break;
udelay(IWL_EEPROM_ACCESS_DELAY);
{
unsigned long flags;
- if (priv == NULL)
- return;
-
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
return;
struct iwl_powertable_cmd cmd;
/* If on battery, set to 3,
- * if plugged into AC power, set to CAM ("continuosly aware mode"),
+ * if plugged into AC power, set to CAM ("continuously aware mode"),
* else user level */
switch (mode) {
case IWL_POWER_BATTERY:
}
/*
- * initilize rxon structure with default values fromm eeprom
+ * initialize rxon structure with default values from eeprom
*/
static void iwl_connection_init_rx_config(struct iwl_priv *priv)
{
if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
(fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
- cmd->cmd.tx.timeout.pm_frame_timeout =
- cpu_to_le16(3);
+ cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
else
- cmd->cmd.tx.timeout.pm_frame_timeout =
- cpu_to_le16(2);
+ cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
} else
cmd->cmd.tx.timeout.pm_frame_timeout = 0;
return priv->hw_setting.bcast_sta_id;
}
default:
- IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
+ IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
return priv->hw_setting.bcast_sta_id;
}
}
spin_lock_irqsave(&priv->lock, flags);
- tfd = &txq->bd[q->first_empty];
+ tfd = &txq->bd[q->write_ptr];
memset(tfd, 0, sizeof(*tfd));
control_flags = (u32 *) tfd;
- idx = get_cmd_index(q, q->first_empty, 0);
+ idx = get_cmd_index(q, q->write_ptr, 0);
- memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
- txq->txb[q->first_empty].skb[0] = skb;
- memcpy(&(txq->txb[q->first_empty].status.control),
+ memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
+ txq->txb[q->write_ptr].skb[0] = skb;
+ memcpy(&(txq->txb[q->write_ptr].status.control),
ctl, sizeof(struct ieee80211_tx_control));
out_cmd = &txq->cmd[idx];
memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
out_cmd->hdr.cmd = REPLY_TX;
out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
- INDEX_TO_SEQ(q->first_empty)));
+ INDEX_TO_SEQ(q->write_ptr)));
/* copy frags header */
memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
ieee80211_get_hdrlen(fc));
- q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
+ q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
rc = iwl_tx_queue_update_write_ptr(priv, txq);
spin_unlock_irqrestore(&priv->lock, flags);
int i;
hw = iwl_get_hw_mode(priv, priv->phymode);
+ if (!hw) {
+ IWL_ERROR("Failed to set rate: unable to get hw mode\n");
+ return;
+ }
priv->active_rate = 0;
priv->active_rate_basic = 0;
spin_lock_irqsave(&priv->lock, flags);
iwl_read32(priv, CSR_UCODE_DRV_GP1);
- if (!iwl_grab_restricted_access(priv))
- iwl_release_restricted_access(priv);
+ if (!iwl_grab_nic_access(priv))
+ iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
__list_for_each(p, &priv->ibss_mac_hash[index]) {
- entry =
- list_entry(p, struct iwl_ibss_seq, list);
+ entry = list_entry(p, struct iwl_ibss_seq, list);
if (!compare_ether_addr(entry->mac, mac))
break;
}
if (p == &priv->ibss_mac_hash[index]) {
entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
if (!entry) {
- IWL_ERROR
- ("Cannot malloc new mac entry\n");
+ IWL_ERROR("Cannot malloc new mac entry\n");
return 0;
}
memcpy(entry->mac, mac, ETH_ALEN);
entry->seq_num = seq;
entry->frag_num = frag;
entry->packet_time = jiffies;
- list_add(&entry->list,
- &priv->ibss_mac_hash[index]);
+ list_add(&entry->list, &priv->ibss_mac_hash[index]);
return 0;
}
last_seq = &entry->seq_num;
switch (spectrum_resp_status) {
case 0: /* Command will be handled */
if (res->u.spectrum.id != 0xff) {
- IWL_DEBUG_INFO
- ("Replaced existing measurement: %d\n",
- res->u.spectrum.id);
+ IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
+ res->u.spectrum.id);
priv->measurement_status &= ~MEASUREMENT_READY;
}
priv->measurement_status |= MEASUREMENT_ACTIVE;
if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
"is out of range [0-%d] %d %d.\n", txq_id,
- index, q->n_bd, q->first_empty, q->last_used);
+ index, q->n_bd, q->write_ptr, q->read_ptr);
return 0;
}
for (index = iwl_queue_inc_wrap(index, q->n_bd);
- q->last_used != index;
- q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
+ q->read_ptr != index;
+ q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
if (txq_id != IWL_CMD_QUEUE_NUM) {
iwl_txstatus_to_ieee(priv,
- &(txq->txb[txq->q.last_used]));
+ &(txq->txb[txq->q.read_ptr]));
iwl_hw_txq_free_tfd(priv, txq);
} else if (nfreed > 1) {
IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
- q->first_empty, q->last_used);
+ q->write_ptr, q->read_ptr);
queue_work(priv->workqueue, &priv->restart);
}
nfreed++;
if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
"is out of range [0-%d] %d %d\n", txq_id,
- index, txq->q.n_bd, txq->q.first_empty,
- txq->q.last_used);
+ index, txq->q.n_bd, txq->q.write_ptr,
+ txq->q.read_ptr);
return;
}
- tx_status = &(txq->txb[txq->q.last_used].status);
+ tx_status = &(txq->txb[txq->q.read_ptr].status);
tx_status->retry_count = tx_resp->failure_frame;
tx_status->queue_number = status;
* The management in the driver is as follows:
* + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
* iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
- * to replensish the iwl->rxq->rx_free.
+ * to replenish the iwl->rxq->rx_free.
* + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
* iwl->rxq is replenished and the READ INDEX is updated (updating the
* 'processed' and 'read' driver indexes as well)
goto exit_unlock;
}
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc)
goto exit_unlock;
- iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
+ iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
q->write & ~0x7);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
} else
iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
}
/**
- * iwl_rx_replensih - Move all used packet from rx_used to rx_free
+ * iwl_rx_replenish - Move all used packet from rx_used to rx_free
*
* When moving to rx_free an SKB is allocated for the slot.
*
* Also restock the Rx queue via iwl_rx_queue_restock.
- * This is called as a scheduled work item (except for during intialization)
+ * This is called as a scheduled work item (except for during initialization)
*/
void iwl_rx_replenish(void *data)
{
}
/* restore this queue's parameters in nic hardware. */
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
- iwl_write_restricted(priv, HBUS_TARG_WRPTR,
- txq->q.first_empty | (txq_id << 8));
- iwl_release_restricted_access(priv);
+ iwl_write_direct32(priv, HBUS_TARG_WRPTR,
+ txq->q.write_ptr | (txq_id << 8));
+ iwl_release_nic_access(priv);
/* else not in power-save mode, uCode will never sleep when we're
* trying to tx (during RFKILL, we're not trying to tx). */
} else
iwl_write32(priv, HBUS_TARG_WRPTR,
- txq->q.first_empty | (txq_id << 8));
+ txq->q.write_ptr | (txq_id << 8));
txq->need_update = 0;
return;
}
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc) {
IWL_WARNING("Can not read from adapter at this time.\n");
return;
}
- count = iwl_read_restricted_mem(priv, base);
+ count = iwl_read_targ_mem(priv, base);
if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
IWL_ERROR("Start IWL Error Log Dump:\n");
for (i = ERROR_START_OFFSET;
i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
i += ERROR_ELEM_SIZE) {
- desc = iwl_read_restricted_mem(priv, base + i);
+ desc = iwl_read_targ_mem(priv, base + i);
time =
- iwl_read_restricted_mem(priv, base + i + 1 * sizeof(u32));
+ iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
blink1 =
- iwl_read_restricted_mem(priv, base + i + 2 * sizeof(u32));
+ iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
blink2 =
- iwl_read_restricted_mem(priv, base + i + 3 * sizeof(u32));
+ iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
ilink1 =
- iwl_read_restricted_mem(priv, base + i + 4 * sizeof(u32));
+ iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
ilink2 =
- iwl_read_restricted_mem(priv, base + i + 5 * sizeof(u32));
+ iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
data1 =
- iwl_read_restricted_mem(priv, base + i + 6 * sizeof(u32));
+ iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
IWL_ERROR
("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
ilink1, ilink2, data1);
}
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
}
/**
* iwl_print_event_log - Dump error event log to syslog
*
- * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
+ * NOTE: Must be called with iwl_grab_nic_access() already obtained!
*/
static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
u32 num_events, u32 mode)
/* "time" is actually "data" for mode 0 (no timestamp).
* place event id # at far right for easier visual parsing. */
for (i = 0; i < num_events; i++) {
- ev = iwl_read_restricted_mem(priv, ptr);
+ ev = iwl_read_targ_mem(priv, ptr);
ptr += sizeof(u32);
- time = iwl_read_restricted_mem(priv, ptr);
+ time = iwl_read_targ_mem(priv, ptr);
ptr += sizeof(u32);
if (mode == 0)
IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
else {
- data = iwl_read_restricted_mem(priv, ptr);
+ data = iwl_read_targ_mem(priv, ptr);
ptr += sizeof(u32);
IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
}
return;
}
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc) {
IWL_WARNING("Can not read from adapter at this time.\n");
return;
}
/* event log header */
- capacity = iwl_read_restricted_mem(priv, base);
- mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
- num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
- next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
+ capacity = iwl_read_targ_mem(priv, base);
+ mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
+ num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
+ next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
size = num_wraps ? capacity : next_entry;
/* bail out if nothing in log */
if (size == 0) {
IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
return;
}
/* (then/else) start at top of log */
iwl_print_event_log(priv, 0, next_entry, mode);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
}
/**
* when we loaded driver, and is now set to "enable".
* After we're Alive, RF_KILL gets handled by
* iwl_rx_card_state_notif() */
- if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
+ if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
+ clear_bit(STATUS_RF_KILL_HW, &priv->status);
queue_work(priv->workqueue, &priv->restart);
+ }
handled |= CSR_INT_BIT_RF_KILL;
}
IWL_DEBUG_ISR("Tx interrupt\n");
iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
- if (!iwl_grab_restricted_access(priv)) {
- iwl_write_restricted(priv,
+ if (!iwl_grab_nic_access(priv)) {
+ iwl_write_direct32(priv,
FH_TCSR_CREDIT
(ALM_FH_SRVC_CHNL), 0x0);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
}
handled |= CSR_INT_BIT_FH_TX;
}
IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
- iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
+ iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
errcnt = 0;
for (; len > 0; len -= sizeof(u32), image++) {
/* read data comes through single port, auto-incr addr */
/* NOTE: Use the debugless read so we don't flood kernel log
* if IWL_DL_IO is set */
- val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
+ val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image)) {
IWL_ERROR("uCode INST section is invalid at "
"offset 0x%x, is 0x%x, s/b 0x%x\n",
}
}
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
if (!errcnt)
- IWL_DEBUG_INFO
- ("ucode image in INSTRUCTION memory is good\n");
+ IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
return rc;
}
IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
/* read data comes through single port, auto-incr addr */
/* NOTE: Use the debugless read so we don't flood kernel log
* if IWL_DL_IO is set */
- iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
+ iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
i + RTC_INST_LOWER_BOUND);
- val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
+ val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image)) {
#if 0 /* Enable this if you want to see details */
IWL_ERROR("uCode INST section is invalid at "
}
}
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
return rc;
}
IWL_DEBUG_INFO("Begin verify bsm\n");
/* verify BSM SRAM contents */
- val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
+ val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
for (reg = BSM_SRAM_LOWER_BOUND;
reg < BSM_SRAM_LOWER_BOUND + len;
reg += sizeof(u32), image ++) {
- val = iwl_read_restricted_reg(priv, reg);
+ val = iwl_read_prph(priv, reg);
if (val != le32_to_cpu(*image)) {
IWL_ERROR("BSM uCode verification failed at "
"addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
inst_len = priv->ucode_init.len;
data_len = priv->ucode_init_data.len;
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
- iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
- iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
- iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
- iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
+ iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
+ iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
+ iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
+ iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
/* Fill BSM memory with bootstrap instructions */
for (reg_offset = BSM_SRAM_LOWER_BOUND;
reg_offset < BSM_SRAM_LOWER_BOUND + len;
reg_offset += sizeof(u32), image++)
- _iwl_write_restricted_reg(priv, reg_offset,
+ _iwl_write_prph(priv, reg_offset,
le32_to_cpu(*image));
rc = iwl_verify_bsm(priv);
if (rc) {
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
return rc;
}
/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
- iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
- iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
+ iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
+ iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
RTC_INST_LOWER_BOUND);
- iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
+ iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
/* Load bootstrap code into instruction SRAM now,
* to prepare to load "initialize" uCode */
- iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
+ iwl_write_prph(priv, BSM_WR_CTRL_REG,
BSM_WR_CTRL_REG_BIT_START);
/* Wait for load of bootstrap uCode to finish */
for (i = 0; i < 100; i++) {
- done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
+ done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
if (!(done & BSM_WR_CTRL_REG_BIT_START))
break;
udelay(10);
/* Enable future boot loads whenever power management unit triggers it
* (e.g. when powering back up after power-save shutdown) */
- iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
+ iwl_write_prph(priv, BSM_WR_CTRL_REG,
BSM_WR_CTRL_REG_BIT_START_EN);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
return 0;
}
boot_size = le32_to_cpu(ucode->boot_size);
IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
- IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
- inst_size);
- IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
- data_size);
- IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
- init_size);
- IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
- init_data_size);
- IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
- boot_size);
+ IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
+ IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
+ IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
+ IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
+ IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
/* Verify size of file vs. image size info in file's header */
if (ucode_raw->size < sizeof(*ucode) +
pdata = priv->ucode_data_backup.p_addr;
spin_lock_irqsave(&priv->lock, flags);
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
/* Tell bootstrap uCode where to find image to load */
- iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
- iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
- iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
+ iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
+ iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
+ iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
priv->ucode_data.len);
/* Inst bytecount must be last to set up, bit 31 signals uCode
* that all new ptr/size info is in place */
- iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
+ iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
priv->ucode_code.len | BSM_DRAM_INST_LOAD);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
}
/**
- * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
+ * iwl_init_alive_start - Called after REPLY_ALIVE notification received
*
* Called after REPLY_ALIVE notification received from "initialize" uCode.
*
iwl_clear_stations_table(priv);
- rc = iwl_grab_restricted_access(priv);
+ rc = iwl_grab_nic_access(priv);
if (rc) {
IWL_WARNING("Can not read rfkill status from adapter\n");
return;
}
- rfkill = iwl_read_restricted_reg(priv, APMG_RFKILL_REG);
+ rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
if (rfkill & 0x1) {
clear_bit(STATUS_RF_KILL_HW, &priv->status);
mutex_lock(&priv->mutex);
if (rc) {
+ iwl_rate_control_unregister(priv->hw);
IWL_ERROR("Failed to register network "
"device (error %d)\n", rc);
return;
/* Unblock any waiting calls */
wake_up_interruptible_all(&priv->wait_command_queue);
- iwl_cancel_deferred_work(priv);
-
/* Wipe out the EXIT_PENDING status bit if we are not actually
* exiting the module */
if (!exit_pending)
iwl_hw_rxq_stop(priv);
spin_lock_irqsave(&priv->lock, flags);
- if (!iwl_grab_restricted_access(priv)) {
- iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
+ if (!iwl_grab_nic_access(priv)) {
+ iwl_write_prph(priv, APMG_CLK_DIS_REG,
APMG_CLK_VAL_DMA_CLK_RQT);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
}
spin_unlock_irqrestore(&priv->lock, flags);
mutex_lock(&priv->mutex);
__iwl_down(priv);
mutex_unlock(&priv->mutex);
+
+ iwl_cancel_deferred_work(priv);
}
#define MAX_HW_RESTARTS 5
return 0;
}
+ if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
+ IWL_ERROR("ucode not available for device bringup\n");
+ return -EIO;
+ }
+
iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
rc = iwl_hw_nic_init(priv);
return;
done:
- /* inform mac80211 sacn aborted */
+ /* inform mac80211 scan aborted */
queue_work(priv->workqueue, &priv->scan_completed);
mutex_unlock(&priv->mutex);
}
default:
IWL_ERROR("%s Should not be called in %d mode\n",
- __FUNCTION__, priv->iw_mode);
+ __FUNCTION__, priv->iw_mode);
break;
}
static void iwl_bg_abort_scan(struct work_struct *work)
{
- struct iwl_priv *priv = container_of(work, struct iwl_priv,
- abort_scan);
+ struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
if (!iwl_is_ready(priv))
return;
DECLARE_MAC_BUF(mac);
IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
- if (conf->mac_addr)
- IWL_DEBUG_MAC80211("enter: MAC %s\n",
- print_mac(mac, conf->mac_addr));
if (priv->interface_id) {
IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
- return 0;
+ return -EOPNOTSUPP;
}
spin_lock_irqsave(&priv->lock, flags);
spin_unlock_irqrestore(&priv->lock, flags);
mutex_lock(&priv->mutex);
+
+ if (conf->mac_addr) {
+ IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
+ memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
+ }
+
iwl_set_mode(priv, conf->type);
IWL_DEBUG_MAC80211("leave\n");
}
/* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
- * what is exposed through include/ declrations */
+ * what is exposed through include/ declarations */
if (unlikely(!iwl_param_disable_hw_scan &&
test_bit(STATUS_SCANNING, &priv->status))) {
IWL_DEBUG_MAC80211("leave - scanning\n");
{
iwl_hw_cancel_deferred_work(priv);
+ cancel_delayed_work_sync(&priv->init_alive_start);
cancel_delayed_work(&priv->scan_check);
cancel_delayed_work(&priv->alive_start);
cancel_delayed_work(&priv->post_associate);
mutex_unlock(&priv->mutex);
- IWL_DEBUG_INFO("Queing UP work.\n");
+ IWL_DEBUG_INFO("Queueing UP work.\n");
queue_work(priv->workqueue, &priv->up);
IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
- mutex_lock(&priv->mutex);
set_bit(STATUS_EXIT_PENDING, &priv->status);
- __iwl_down(priv);
- mutex_unlock(&priv->mutex);
+
+ iwl_down(priv);
/* Free MAC hash list for ADHOC */
for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
{
struct iwl_priv *priv = pci_get_drvdata(pdev);
- mutex_lock(&priv->mutex);
-
set_bit(STATUS_IN_SUSPEND, &priv->status);
/* Take down the device; powers it off, etc. */
- __iwl_down(priv);
+ iwl_down(priv);
if (priv->mac80211_registered)
ieee80211_stop_queues(priv->hw);
pci_disable_device(pdev);
pci_set_power_state(pdev, PCI_D3hot);
- mutex_unlock(&priv->mutex);
-
return 0;
}
spin_lock_irqsave(&priv->lock, flags);
iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
- if (!iwl_grab_restricted_access(priv)) {
- iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
+ if (!iwl_grab_nic_access(priv)) {
+ iwl_write_prph(priv, APMG_CLK_DIS_REG,
APMG_CLK_VAL_DMA_CLK_RQT);
- iwl_release_restricted_access(priv);
+ iwl_release_nic_access(priv);
}
spin_unlock_irqrestore(&priv->lock, flags);
printk(KERN_INFO "Coming out of suspend...\n");
- mutex_lock(&priv->mutex);
-
pci_set_power_state(pdev, PCI_D0);
err = pci_enable_device(pdev);
pci_restore_state(pdev);
pci_write_config_byte(pdev, 0x41, 0x00);
iwl_resume(priv);
- mutex_unlock(&priv->mutex);
return 0;
}
projects / linux-2.6 / blobdiff