};
/* #define vs. enum to keep from defaulting to 'large integer' */
-#define IWL_RATE_6M_MASK (1<<IWL_RATE_6M_INDEX)
-#define IWL_RATE_9M_MASK (1<<IWL_RATE_9M_INDEX)
-#define IWL_RATE_12M_MASK (1<<IWL_RATE_12M_INDEX)
-#define IWL_RATE_18M_MASK (1<<IWL_RATE_18M_INDEX)
-#define IWL_RATE_24M_MASK (1<<IWL_RATE_24M_INDEX)
-#define IWL_RATE_36M_MASK (1<<IWL_RATE_36M_INDEX)
-#define IWL_RATE_48M_MASK (1<<IWL_RATE_48M_INDEX)
-#define IWL_RATE_54M_MASK (1<<IWL_RATE_54M_INDEX)
-#define IWL_RATE_60M_MASK (1<<IWL_RATE_60M_INDEX)
-#define IWL_RATE_1M_MASK (1<<IWL_RATE_1M_INDEX)
-#define IWL_RATE_2M_MASK (1<<IWL_RATE_2M_INDEX)
-#define IWL_RATE_5M_MASK (1<<IWL_RATE_5M_INDEX)
-#define IWL_RATE_11M_MASK (1<<IWL_RATE_11M_INDEX)
+#define IWL_RATE_6M_MASK (1 << IWL_RATE_6M_INDEX)
+#define IWL_RATE_9M_MASK (1 << IWL_RATE_9M_INDEX)
+#define IWL_RATE_12M_MASK (1 << IWL_RATE_12M_INDEX)
+#define IWL_RATE_18M_MASK (1 << IWL_RATE_18M_INDEX)
+#define IWL_RATE_24M_MASK (1 << IWL_RATE_24M_INDEX)
+#define IWL_RATE_36M_MASK (1 << IWL_RATE_36M_INDEX)
+#define IWL_RATE_48M_MASK (1 << IWL_RATE_48M_INDEX)
+#define IWL_RATE_54M_MASK (1 << IWL_RATE_54M_INDEX)
+#define IWL_RATE_60M_MASK (1 << IWL_RATE_60M_INDEX)
+#define IWL_RATE_1M_MASK (1 << IWL_RATE_1M_INDEX)
+#define IWL_RATE_2M_MASK (1 << IWL_RATE_2M_INDEX)
+#define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX)
+#define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX)
/* 4965 uCode API values for legacy bit rates, both OFDM and CCK */
enum {
(IWL_OFDM_BASIC_RATES_MASK | \
IWL_CCK_BASIC_RATES_MASK)
-#define IWL_RATES_MASK ((1<<IWL_RATE_COUNT)-1)
+#define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1)
#define IWL_INVALID_VALUE -1
#define LQ_SIZE 2 /* 2 mode tables: "Active" and "Search" */
+/* load per tid defines for A-MPDU activation */
+#define IWL_AGG_TPT_THREHOLD 0
+#define IWL_AGG_LOAD_THRESHOLD 10
+#define IWL_AGG_ALL_TID 0xff
+#define TID_QUEUE_CELL_SPACING 50 /*mS */
+#define TID_QUEUE_MAX_SIZE 20
+#define TID_ROUND_VALUE 5 /* mS */
+#define TID_MAX_LOAD_COUNT 8
+
+#define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
+#define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
+
extern const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT];
enum iwl4965_table_type {
LQ_MAX,
};
+#define is_legacy(tbl) (((tbl) == LQ_G) || ((tbl) == LQ_A))
+#define is_siso(tbl) (((tbl) == LQ_SISO))
+#define is_mimo(tbl) (((tbl) == LQ_MIMO))
+#define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
+#define is_a_band(tbl) (((tbl) == LQ_A))
+#define is_g_and(tbl) (((tbl) == LQ_G))
+
/* 4965 has 2 antennas/chains for Tx (but 3 for Rx) */
enum iwl4965_antenna_type {
ANT_NONE,
return rate;
}
-extern int iwl4965_rate_index_from_plcp(int plcp);
+extern int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags);
/**
* iwl4965_fill_rs_info - Fill an output text buffer with the rate representation