if (!priv->eeprom)
return -ENOMEM;
- eeprom_93cx6_multiread(&eeprom, 0, (__le16 __force *)priv->eeprom, words);
+ eeprom_93cx6_multiread(&eeprom, 0, (__le16 *)priv->eeprom, words);
cr49 = le16_to_cpu(priv->eeprom->cr49);
priv->rf_type = (cr49 >> 3) & 0x7;
for (dirty_tx = priv->dirty_tx; priv->cur_tx - dirty_tx; dirty_tx++) {
unsigned int entry = dirty_tx % priv->tx_ring_size;
u32 status = le32_to_cpu(priv->tx_ring[entry].status);
+ struct ieee80211_tx_status tx_status;
struct adm8211_tx_ring_info *info;
struct sk_buff *skb;
pci_unmap_single(priv->pdev, info->mapping,
info->skb->len, PCI_DMA_TODEVICE);
- if (info->tx_control.flags & IEEE80211_TXCTL_REQ_TX_STATUS) {
- struct ieee80211_tx_status tx_status = {{0}};
- struct ieee80211_hdr *hdr;
- size_t hdrlen = info->hdrlen;
-
- skb_pull(skb, sizeof(struct adm8211_tx_hdr));
- hdr = (struct ieee80211_hdr *)skb_push(skb, hdrlen);
- memcpy(hdr, skb->cb, hdrlen);
- memcpy(&tx_status.control, &info->tx_control,
- sizeof(tx_status.control));
- if (!(status & TDES0_STATUS_ES))
+ memset(&tx_status, 0, sizeof(tx_status));
+ skb_pull(skb, sizeof(struct adm8211_tx_hdr));
+ memcpy(skb_push(skb, info->hdrlen), skb->cb, info->hdrlen);
+ memcpy(&tx_status.control, &info->tx_control,
+ sizeof(tx_status.control));
+ if (!(tx_status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
+ if (status & TDES0_STATUS_ES)
+ tx_status.excessive_retries = 1;
+ else
tx_status.flags |= IEEE80211_TX_STATUS_ACK;
- ieee80211_tx_status_irqsafe(dev, skb, &tx_status);
- } else
- dev_kfree_skb_irq(skb);
+ }
+ ieee80211_tx_status_irqsafe(dev, skb, &tx_status);
+
info->skb = NULL;
}
return 0;
}
-static int adm8211_config_interface(struct ieee80211_hw *dev, int if_id,
+static int adm8211_config_interface(struct ieee80211_hw *dev,
+ struct ieee80211_vif *vif,
struct ieee80211_if_conf *conf)
{
struct adm8211_priv *priv = dev->priv;
ADM8211_CSR_WRITE(IER, ADM8211_IER_NIE | ADM8211_IER_AIE |
ADM8211_IER_RCIE | ADM8211_IER_TCIE |
ADM8211_IER_TDUIE | ADM8211_IER_GPTIE);
+ priv->mode = IEEE80211_IF_TYPE_MNTR;
adm8211_update_mode(dev);
ADM8211_CSR_WRITE(RDR, 0);
{
struct adm8211_priv *priv = dev->priv;
+ priv->mode = IEEE80211_IF_TYPE_INVALID;
priv->nar = 0;
ADM8211_CSR_WRITE(NAR, 0);
ADM8211_CSR_WRITE(IER, 0);
goto err_iounmap;
}
- *(u32 *)perm_addr = le32_to_cpu((__force __le32)ADM8211_CSR_READ(PAR0));
- *(u16 *)&perm_addr[4] =
- le16_to_cpu((__force __le16)ADM8211_CSR_READ(PAR1) & 0xFFFF);
+ *(__le32 *)perm_addr = cpu_to_le32(ADM8211_CSR_READ(PAR0));
+ *(__le16 *)&perm_addr[4] =
+ cpu_to_le16(ADM8211_CSR_READ(PAR1) & 0xFFFF);
if (!is_valid_ether_addr(perm_addr)) {
printk(KERN_WARNING "%s (adm8211): Invalid hwaddr in EEPROM!\n",
priv->tx_power = 0x40;
priv->lpf_cutoff = 0xFF;
priv->lnags_threshold = 0xFF;
- priv->mode = IEEE80211_IF_TYPE_MNTR;
+ priv->mode = IEEE80211_IF_TYPE_INVALID;
/* Power-on issue. EEPROM won't read correctly without */
if (pdev->revision >= ADM8211_REV_BA) {
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
struct adm8211_priv *priv = dev->priv;
- if (priv->mode != IEEE80211_IF_TYPE_MNTR) {
+ if (priv->mode != IEEE80211_IF_TYPE_INVALID) {
ieee80211_stop_queues(dev);
adm8211_stop(dev);
}
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
- if (priv->mode != IEEE80211_IF_TYPE_MNTR) {
+ if (priv->mode != IEEE80211_IF_TYPE_INVALID) {
adm8211_start(dev);
ieee80211_start_queues(dev);
}