Move code from ipw2100_wpa_enable to IPW2100_PARAM_DROP_UNENCRYPTED to

[linux-2.6] / drivers / net / sis190.c

diff --git a/drivers/net/sis190.c b/drivers/net/sis190.c
index 2f69ba8ef887996a2d680054f3df4d6a2e12ffac..478791e09bf772f416f1f3dd97873e937ebeb182 100644 (file)
--- a/drivers/net/sis190.c
+++ b/drivers/net/sis190.c
@@ -273,7 +273,8 @@ enum sis190_eeprom_address {
 
 enum sis190_feature {
        F_HAS_RGMII     = 1,
-       F_PHY_88E1111   = 2
+       F_PHY_88E1111   = 2,
+       F_PHY_BCM5461   = 4
 };
 
 struct sis190_private {
@@ -321,7 +322,7 @@ static struct mii_chip_info {
         unsigned int type;
        u32 feature;
 } mii_chip_table[] = {
-       { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, 0 },
+       { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 },
        { "Agere PHY ET1101B",    { 0x0282, 0xf010 }, LAN, 0 },
        { "Marvell PHY 88E1111",  { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 },
        { "Realtek PHY RTL8201",  { 0x0000, 0x8200 }, LAN, 0 },
@@ -330,14 +331,14 @@ static struct mii_chip_info {
 
 const static struct {
        const char *name;
-       u8 version;             /* depend on docs */
-       u32 RxConfigMask;       /* clear the bits supported by this chip */
 } sis_chip_info[] = {
-       { DRV_NAME, 0x00, 0xff7e1880, },
+       { "SiS 190 PCI Fast Ethernet adapter" },
+       { "SiS 191 PCI Gigabit Ethernet adapter" },
 };
 
 static struct pci_device_id sis190_pci_tbl[] __devinitdata = {
        { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0190), 0, 0, 0 },
+       { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0191), 0, 0, 1 },
        { 0, },
 };
 
@@ -841,7 +842,7 @@ static void sis190_set_rx_mode(struct net_device *dev)
                for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
                     i++, mclist = mclist->next) {
                        int bit_nr =
-                               ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
+                               ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3f;
                        mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
                        rx_mode |= AcceptMulticast;
                }
@@ -960,8 +961,22 @@ static void sis190_phy_task(void * data)
 
                p->ctl |= SIS_R32(StationControl) & ~0x0f001c00;
 
+               if ((tp->features & F_HAS_RGMII) &&
+                   (tp->features & F_PHY_BCM5461)) {
+                       // Set Tx Delay in RGMII mode.
+                       mdio_write(ioaddr, phy_id, 0x18, 0xf1c7);
+                       udelay(200);
+                       mdio_write(ioaddr, phy_id, 0x1c, 0x8c00);
+                       p->ctl |= 0x03000000;
+               }
+
                SIS_W32(StationControl, p->ctl);
 
+               if (tp->features & F_HAS_RGMII) {
+                       SIS_W32(RGDelay, 0x0441);
+                       SIS_W32(RGDelay, 0x0440);
+               }
+
                net_link(tp, KERN_INFO "%s: link on %s mode.\n", dev->name,
                         p->msg);
                netif_carrier_on(dev);