bnx2x: Change GPIO for any port

[linux-2.6] / drivers / net / bnx2x_link.c

diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c
index 36fa356c74fab3a52c8a09af3fdb78efe1394f31..c9cffa6d47b6e9b0a778023caeffc1f6061a3d44 100644 (file)
--- a/drivers/net/bnx2x_link.c
+++ b/drivers/net/bnx2x_link.c
@@ -1842,15 +1842,15 @@ static u8 bnx2x_emac_program(struct link_params *params,
 }
 
 /*****************************************************************************/
-/*                           External Phy section                            */
+/*                          External Phy section                            */
 /*****************************************************************************/
-static void bnx2x_hw_reset(struct bnx2x *bp)
+static void bnx2x_hw_reset(struct bnx2x *bp, u8 port)
 {
        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                      MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                      MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
        msleep(1);
        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                     MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                     MISC_REGISTERS_GPIO_OUTPUT_HIGH, port);
 }
 
 static void bnx2x_ext_phy_reset(struct link_params *params,
@@ -1879,10 +1879,11 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                        /* Restore normal power mode*/
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                         params->port);
 
                        /* HW reset */
-                       bnx2x_hw_reset(bp);
+                       bnx2x_hw_reset(bp, params->port);
 
                        bnx2x_cl45_write(bp, params->port,
                                       ext_phy_type,
@@ -1894,7 +1895,8 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
                        /* Unset Low Power Mode and SW reset */
                        /* Restore normal power mode*/
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                         params->port);
 
                        DP(NETIF_MSG_LINK, "XGXS 8072\n");
                        bnx2x_cl45_write(bp, params->port,
@@ -1912,19 +1914,14 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                        /* Restore normal power mode*/
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                         params->port);
 
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                         params->port);
 
                        DP(NETIF_MSG_LINK, "XGXS 8073\n");
-                       bnx2x_cl45_write(bp,
-                                      params->port,
-                                      ext_phy_type,
-                                      ext_phy_addr,
-                                      MDIO_PMA_DEVAD,
-                                      MDIO_PMA_REG_CTRL,
-                                      1<<15);
                        }
                        break;
 
@@ -1933,10 +1930,11 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                        /* Restore normal power mode*/
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                     MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                         params->port);
 
                        /* HW reset */
-                       bnx2x_hw_reset(bp);
+                       bnx2x_hw_reset(bp, params->port);
 
                        break;
 
@@ -1959,7 +1957,7 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                case PORT_HW_CFG_SERDES_EXT_PHY_TYPE_BCM5482:
                        DP(NETIF_MSG_LINK, "SerDes 5482\n");
-                       bnx2x_hw_reset(bp);
+                       bnx2x_hw_reset(bp, params->port);
                        break;
 
                default:
@@ -3286,12 +3284,14 @@ static void bnx2x_turn_on_ef(struct bnx2x *bp, u8 port, u8 ext_phy_addr,
 
        /* take ext phy out of reset */
        bnx2x_set_gpio(bp,
-                       MISC_REGISTERS_GPIO_2,
-                       MISC_REGISTERS_GPIO_HIGH);
+                         MISC_REGISTERS_GPIO_2,
+                         MISC_REGISTERS_GPIO_HIGH,
+                         port);
 
        bnx2x_set_gpio(bp,
-                       MISC_REGISTERS_GPIO_1,
-                       MISC_REGISTERS_GPIO_HIGH);
+                         MISC_REGISTERS_GPIO_1,
+                         MISC_REGISTERS_GPIO_HIGH,
+                         port);
 
        /* wait for 5ms */
        msleep(5);
@@ -3311,13 +3311,17 @@ static void bnx2x_turn_on_ef(struct bnx2x *bp, u8 port, u8 ext_phy_addr,
        }
 }
 
-static void bnx2x_turn_off_sf(struct bnx2x *bp)
+static void bnx2x_turn_off_sf(struct bnx2x *bp, u8 port)
 {
        /* put sf to reset */
-       bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_LOW);
        bnx2x_set_gpio(bp,
-                       MISC_REGISTERS_GPIO_2,
-                       MISC_REGISTERS_GPIO_LOW);
+                         MISC_REGISTERS_GPIO_1,
+                         MISC_REGISTERS_GPIO_LOW,
+                         port);
+       bnx2x_set_gpio(bp,
+                         MISC_REGISTERS_GPIO_2,
+                         MISC_REGISTERS_GPIO_LOW,
+                         port);
 }
 
 u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
@@ -3371,7 +3375,7 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
                version[4] = '\0';
 
                if (!driver_loaded)
-                       bnx2x_turn_off_sf(bp);
+                       bnx2x_turn_off_sf(bp, params->port);
                break;
        case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072:
        case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
@@ -4013,10 +4017,12 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars)
                        /* HW reset */
 
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                                      MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                                         MISC_REGISTERS_GPIO_OUTPUT_LOW,
+                                         port);
 
                        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                      MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                                         MISC_REGISTERS_GPIO_OUTPUT_LOW,
+                                         port);
 
                        DP(NETIF_MSG_LINK, "reset external PHY\n");
                } else if (ext_phy_type ==
@@ -4025,7 +4031,8 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars)
                                         "low power mode\n",
                                         port);
                                bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                       MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                                       MISC_REGISTERS_GPIO_OUTPUT_LOW,
+                                                 port);
                }
        }
        /* reset the SerDes/XGXS */
@@ -4271,7 +4278,7 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
           and issuing a reset.*/
 
        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
-                         MISC_REGISTERS_GPIO_HIGH);
+                         MISC_REGISTERS_GPIO_HIGH, port);
 
        bnx2x_sfx7101_sp_sw_reset(bp, port, ext_phy_addr);
 
@@ -4503,7 +4510,8 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
        }
 
        /* DSP Remove Download Mode */
-       bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, MISC_REGISTERS_GPIO_LOW);
+       bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
+                         MISC_REGISTERS_GPIO_LOW, port);
 
        bnx2x_sfx7101_sp_sw_reset(bp, port, ext_phy_addr);
 
@@ -4511,7 +4519,7 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
        for (cnt = 0; cnt < 100; cnt++)
                msleep(5);
 
-       bnx2x_hw_reset(bp);
+       bnx2x_hw_reset(bp, port);
 
        for (cnt = 0; cnt < 100; cnt++)
                msleep(5);
@@ -4586,7 +4594,7 @@ u8 bnx2x_flash_download(struct bnx2x *bp, u8 port, u32 ext_phy_config,
                rc = bnx2x_sfx7101_flash_download(bp, port, ext_phy_addr,
                                                data, size);
                if (!driver_loaded)
-                       bnx2x_turn_off_sf(bp);
+                       bnx2x_turn_off_sf(bp, port);
                break;
        case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT:
        case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE: