#include <linux/dma-mapping.h>
#include <linux/crc7.h>
#include <linux/crc-itu-t.h>
+#include <linux/scatterlist.h>
#include <linux/mmc/host.h>
#include <linux/mmc/mmc.h> /* for R1_SPI_* bit values */
DMA_FROM_DEVICE);
status = spi_sync(host->spi, &host->readback);
- if (status == 0)
- status = host->readback.status;
if (host->dma_dev)
dma_sync_single_for_cpu(host->dma_dev,
/* SPI R3, R4, or R7 == R1 + 4 bytes */
case MMC_RSP_SPI_R3:
- cmd->resp[1] = be32_to_cpu(get_unaligned((u32 *)cp));
+ cmd->resp[1] = get_unaligned_be32(cp);
break;
/* SPI R1 == just one status byte */
DMA_BIDIRECTIONAL);
}
status = spi_sync(host->spi, &host->m);
- if (status == 0)
- status = host->m.status;
if (host->dma_dev)
dma_sync_single_for_cpu(host->dma_dev,
DMA_BIDIRECTIONAL);
status = spi_sync(spi, &host->m);
- if (status == 0)
- status = host->m.status;
if (status != 0) {
dev_dbg(&spi->dev, "write error (%d)\n", status);
}
status = spi_sync(spi, &host->m);
- if (status == 0)
- status = host->m.status;
if (host->dma_dev) {
dma_sync_single_for_cpu(host->dma_dev,
&& dir == DMA_FROM_DEVICE)
dir = DMA_BIDIRECTIONAL;
- dma_addr = dma_map_page(dma_dev, sg->page, 0,
+ dma_addr = dma_map_page(dma_dev, sg_page(sg), 0,
PAGE_SIZE, dir);
if (direction == DMA_TO_DEVICE)
t->tx_dma = dma_addr + sg->offset;
}
/* allow pio too; we don't allow highmem */
- kmap_addr = kmap(sg->page);
+ kmap_addr = kmap(sg_page(sg));
if (direction == DMA_TO_DEVICE)
t->tx_buf = kmap_addr + sg->offset;
else
/* discard mappings */
if (direction == DMA_FROM_DEVICE)
- flush_kernel_dcache_page(sg->page);
- kunmap(sg->page);
+ flush_kernel_dcache_page(sg_page(sg));
+ kunmap(sg_page(sg));
if (dma_dev)
dma_unmap_page(dma_dev, dma_addr, PAGE_SIZE, dir);
DMA_BIDIRECTIONAL);
tmp = spi_sync(spi, &host->m);
- if (tmp == 0)
- tmp = host->m.status;
if (host->dma_dev)
dma_sync_single_for_cpu(host->dma_dev,
struct mmc_spi_host *host = mmc_priv(mmc);
if (host->pdata && host->pdata->get_ro)
- return host->pdata->get_ro(mmc->parent);
- /* board doesn't support read only detection; assume writeable */
- return 0;
+ return !!host->pdata->get_ro(mmc->parent);
+ /*
+ * Board doesn't support read only detection; let the mmc core
+ * decide what to do.
+ */
+ return -ENOSYS;
}
+static int mmc_spi_get_cd(struct mmc_host *mmc)
+{
+ struct mmc_spi_host *host = mmc_priv(mmc);
+
+ if (host->pdata && host->pdata->get_cd)
+ return !!host->pdata->get_cd(mmc->parent);
+ return -ENOSYS;
+}
static const struct mmc_host_ops mmc_spi_ops = {
.request = mmc_spi_request,
.set_ios = mmc_spi_set_ios,
.get_ro = mmc_spi_get_ro,
+ .get_cd = mmc_spi_get_cd,
};
return IRQ_HANDLED;
}
+struct count_children {
+ unsigned n;
+ struct bus_type *bus;
+};
+
+static int maybe_count_child(struct device *dev, void *c)
+{
+ struct count_children *ccp = c;
+
+ if (dev->bus == ccp->bus) {
+ if (ccp->n)
+ return -EBUSY;
+ ccp->n++;
+ }
+ return 0;
+}
+
static int mmc_spi_probe(struct spi_device *spi)
{
void *ones;
return status;
}
- /* We can use the bus safely iff nobody else will interfere with
- * us. That is, either we have the experimental exclusive access
- * primitives ... or else there's nobody to share it with.
+ /* We can use the bus safely iff nobody else will interfere with us.
+ * Most commands consist of one SPI message to issue a command, then
+ * several more to collect its response, then possibly more for data
+ * transfer. Clocking access to other devices during that period will
+ * corrupt the command execution.
+ *
+ * Until we have software primitives which guarantee non-interference,
+ * we'll aim for a hardware-level guarantee.
+ *
+ * REVISIT we can't guarantee another device won't be added later...
*/
if (spi->master->num_chipselect > 1) {
- struct device *parent = spi->dev.parent;
+ struct count_children cc;
- /* If there are multiple devices on this bus, we
- * can't proceed.
- */
- spin_lock(&parent->klist_children.k_lock);
- if (parent->klist_children.k_list.next
- != parent->klist_children.k_list.prev)
- status = -EMLINK;
- else
- status = 0;
- spin_unlock(&parent->klist_children.k_lock);
+ cc.n = 0;
+ cc.bus = spi->dev.bus;
+ status = device_for_each_child(spi->dev.parent, &cc,
+ maybe_count_child);
if (status < 0) {
dev_err(&spi->dev, "can't share SPI bus\n");
return status;
}
- /* REVISIT we can't guarantee another device won't
- * be added later. It's uncommon though ... for now,
- * work as if this is safe.
- */
- dev_warn(&spi->dev, "ASSUMING unshared SPI bus!\n");
+ dev_warn(&spi->dev, "ASSUMING SPI bus stays unshared!\n");
}
/* We need a supply of ones to transmit. This is the only time
mmc->ops = &mmc_spi_ops;
mmc->max_blk_size = MMC_SPI_BLOCKSIZE;
- /* As long as we keep track of the number of successfully
- * transmitted blocks, we're good for multiwrite.
- */
- mmc->caps = MMC_CAP_SPI | MMC_CAP_MULTIWRITE;
+ mmc->caps = MMC_CAP_SPI;
/* SPI doesn't need the lowspeed device identification thing for
* MMC or SD cards, since it never comes up in open drain mode.
goto fail_glue_init;
}
+ /* pass platform capabilities, if any */
+ if (host->pdata)
+ mmc->caps |= host->pdata->caps;
+
status = mmc_add_host(mmc);
if (status != 0)
goto fail_add_host;
- dev_info(&spi->dev, "SD/MMC host %s%s%s%s\n",
+ dev_info(&spi->dev, "SD/MMC host %s%s%s%s%s\n",
mmc->class_dev.bus_id,
host->dma_dev ? "" : ", no DMA",
(host->pdata && host->pdata->get_ro)
? "" : ", no WP",
(host->pdata && host->pdata->setpower)
- ? "" : ", no poweroff");
+ ? "" : ", no poweroff",
+ (mmc->caps & MMC_CAP_NEEDS_POLL)
+ ? ", cd polling" : "");
return 0;
fail_add_host:
projects / linux-2.6 / blobdiff