DMA_FROM_DEVICE);
status = spi_sync(host->spi, &host->readback);
- if (status == 0)
- status = host->readback.status;
if (host->dma_dev)
dma_sync_single_for_cpu(host->dma_dev,
/* SPI R3, R4, or R7 == R1 + 4 bytes */
case MMC_RSP_SPI_R3:
- cmd->resp[1] = be32_to_cpu(get_unaligned((u32 *)cp));
+ cmd->resp[1] = get_unaligned_be32(cp);
break;
/* SPI R1 == just one status byte */
DMA_BIDIRECTIONAL);
}
status = spi_sync(host->spi, &host->m);
- if (status == 0)
- status = host->m.status;
if (host->dma_dev)
dma_sync_single_for_cpu(host->dma_dev,
DMA_BIDIRECTIONAL);
status = spi_sync(spi, &host->m);
- if (status == 0)
- status = host->m.status;
if (status != 0) {
dev_dbg(&spi->dev, "write error (%d)\n", status);
}
status = spi_sync(spi, &host->m);
- if (status == 0)
- status = host->m.status;
if (host->dma_dev) {
dma_sync_single_for_cpu(host->dma_dev,
DMA_BIDIRECTIONAL);
tmp = spi_sync(spi, &host->m);
- if (tmp == 0)
- tmp = host->m.status;
if (host->dma_dev)
dma_sync_single_for_cpu(host->dma_dev,