if (ide_wait_stat(&startstop, drive, 0, BUSY_STAT, WAIT_READY))
return startstop;
+ /* FIXME: for Virtual DMA we must check harder */
if (info->dma)
info->dma = !hwif->dma_setup(drive);
/* Set up the controller registers. */
- /* FIXME: for Virtual DMA we must check harder */
- HWIF(drive)->OUTB(info->dma, IDE_FEATURE_REG);
- HWIF(drive)->OUTB(0, IDE_IREASON_REG);
- HWIF(drive)->OUTB(0, IDE_SECTOR_REG);
-
- HWIF(drive)->OUTB(xferlen & 0xff, IDE_BCOUNTL_REG);
- HWIF(drive)->OUTB(xferlen >> 8 , IDE_BCOUNTH_REG);
- if (IDE_CONTROL_REG)
- HWIF(drive)->OUTB(drive->ctl, IDE_CONTROL_REG);
+ ide_pktcmd_tf_load(drive, IDE_TFLAG_OUT_NSECT | IDE_TFLAG_OUT_LBAL |
+ IDE_TFLAG_NO_SELECT_MASK, xferlen, info->dma);
if (CDROM_CONFIG_FLAGS (drive)->drq_interrupt) {
/* waiting for CDB interrupt, not DMA yet. */
*/
if (dma) {
info->dma = 0;
- if ((dma_error = HWIF(drive)->ide_dma_end(drive)))
+ dma_error = HWIF(drive)->ide_dma_end(drive);
+ if (dma_error) {
+ printk(KERN_ERR "%s: DMA read error\n", drive->name);
ide_dma_off(drive);
+ }
}
if (cdrom_decode_status(drive, 0, &stat))
return ide_stopped;
/* Read the interrupt reason and the transfer length. */
- ireason = HWIF(drive)->INB(IDE_IREASON_REG);
+ ireason = HWIF(drive)->INB(IDE_IREASON_REG) & 0x3;
lowcyl = HWIF(drive)->INB(IDE_BCOUNTL_REG);
highcyl = HWIF(drive)->INB(IDE_BCOUNTH_REG);
if (thislen > len) thislen = len;
/* The drive wants to be written to. */
- if ((ireason & 3) == 0) {
+ if (ireason == 0) {
if (!rq->data) {
blk_dump_rq_flags(rq, "cdrom_pc_intr, write");
goto confused;
}
/* Same drill for reading. */
- else if ((ireason & 3) == 2) {
+ else if (ireason == 2) {
if (!rq->data) {
- blk_dump_rq_flags(rq, "cdrom_pc_intr, write");
+ blk_dump_rq_flags(rq, "cdrom_pc_intr, read");
goto confused;
}
/* Transfer the data. */