static void set_termios(struct tty_struct *tty, struct ktermios *old_termios);
static int write(struct tty_struct *tty, const unsigned char *buf, int count);
-static void put_char(struct tty_struct *tty, unsigned char ch);
+static int put_char(struct tty_struct *tty, unsigned char ch);
static void send_xchar(struct tty_struct *tty, char ch);
static void wait_until_sent(struct tty_struct *tty, int timeout);
static int write_room(struct tty_struct *tty);
if (info->flags & ASYNC_INITIALIZED)
wait_until_sent(tty, info->timeout);
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
+ flush_buffer(tty);
tty_ldisc_flush(tty);
/* Add a character to the transmit buffer.
*/
-static void put_char(struct tty_struct *tty, unsigned char ch)
+static int put_char(struct tty_struct *tty, unsigned char ch)
{
SLMP_INFO *info = (SLMP_INFO *)tty->driver_data;
unsigned long flags;
+ int ret = 0;
if ( debug_level >= DEBUG_LEVEL_INFO ) {
printk( "%s(%d):%s put_char(%d)\n",
}
if (sanity_check(info, tty->name, "put_char"))
- return;
+ return 0;
if (!info->tx_buf)
- return;
+ return 0;
spin_lock_irqsave(&info->lock,flags);
if (info->tx_put >= info->max_frame_size)
info->tx_put -= info->max_frame_size;
info->tx_count++;
+ ret = 1;
}
}
spin_unlock_irqrestore(&info->lock,flags);
+ return ret;
}
/* Send a high-priority XON/XOFF character
if (sanity_check(info, tty->name, "wait_until_sent"))
return;
+ lock_kernel();
+
if (!(info->flags & ASYNC_INITIALIZED))
goto exit;
}
exit:
+ unlock_kernel();
if (debug_level >= DEBUG_LEVEL_INFO)
printk("%s(%d):%s wait_until_sent() exit\n",
__FILE__,__LINE__, info->device_name );
if (sanity_check(info, tty->name, "write_room"))
return 0;
+ lock_kernel();
if (info->params.mode == MGSL_MODE_HDLC) {
ret = (info->tx_active) ? 0 : HDLC_MAX_FRAME_SIZE;
} else {
if (ret < 0)
ret = 0;
}
+ unlock_kernel();
if (debug_level >= DEBUG_LEVEL_INFO)
printk("%s(%d):%s write_room()=%d\n",
*
* Return Value: 0 if success, otherwise error code
*/
-static int ioctl(struct tty_struct *tty, struct file *file,
+static int do_ioctl(struct tty_struct *tty, struct file *file,
unsigned int cmd, unsigned long arg)
{
SLMP_INFO *info = (SLMP_INFO *)tty->driver_data;
return 0;
}
+static int ioctl(struct tty_struct *tty, struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ int ret;
+ lock_kernel();
+ ret = do_ioctl(tty, file, cmd, arg);
+ unlock_kernel();
+ return ret;
+}
+
/*
* /proc fs routines....
*/
/* Called to print information about devices
*/
-int read_proc(char *page, char **start, off_t off, int count,
+static int read_proc(char *page, char **start, off_t off, int count,
int *eof, void *data)
{
int len = 0, l;
/* Return next bottom half action to perform.
* Return Value: BH action code or 0 if nothing to do.
*/
-int bh_action(SLMP_INFO *info)
+static int bh_action(SLMP_INFO *info)
{
unsigned long flags;
int rc = 0;
/* Perform bottom half processing of work items queued by ISR.
*/
-void bh_handler(struct work_struct *work)
+static void bh_handler(struct work_struct *work)
{
SLMP_INFO *info = container_of(work, SLMP_INFO, task);
int action;
__FILE__,__LINE__,info->device_name);
}
-void bh_receive(SLMP_INFO *info)
+static void bh_receive(SLMP_INFO *info)
{
if ( debug_level >= DEBUG_LEVEL_BH )
printk( "%s(%d):%s bh_receive()\n",
while( rx_get_frame(info) );
}
-void bh_transmit(SLMP_INFO *info)
+static void bh_transmit(SLMP_INFO *info)
{
struct tty_struct *tty = info->tty;
tty_wakeup(tty);
}
-void bh_status(SLMP_INFO *info)
+static void bh_status(SLMP_INFO *info)
{
if ( debug_level >= DEBUG_LEVEL_BH )
printk( "%s(%d):%s bh_status() entry\n",
info->cts_chkcount = 0;
}
-void isr_timer(SLMP_INFO * info)
+static void isr_timer(SLMP_INFO * info)
{
unsigned char timer = (info->port_num & 1) ? TIMER2 : TIMER0;
__FILE__,__LINE__,info->device_name);
}
-void isr_rxint(SLMP_INFO * info)
+static void isr_rxint(SLMP_INFO * info)
{
struct tty_struct *tty = info->tty;
struct mgsl_icount *icount = &info->icount;
/*
* handle async rx data interrupts
*/
-void isr_rxrdy(SLMP_INFO * info)
+static void isr_rxrdy(SLMP_INFO * info)
{
u16 status;
unsigned char DataByte;
/*
* handle tx status interrupts
*/
-void isr_txint(SLMP_INFO * info)
+static void isr_txint(SLMP_INFO * info)
{
unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);
/*
* handle async tx data interrupts
*/
-void isr_txrdy(SLMP_INFO * info)
+static void isr_txrdy(SLMP_INFO * info)
{
if ( debug_level >= DEBUG_LEVEL_ISR )
printk("%s(%d):%s isr_txrdy() tx_count=%d\n",
info->pending_bh |= BH_TRANSMIT;
}
-void isr_rxdmaok(SLMP_INFO * info)
+static void isr_rxdmaok(SLMP_INFO * info)
{
/* BIT7 = EOT (end of transfer)
* BIT6 = EOM (end of message/frame)
info->pending_bh |= BH_RECEIVE;
}
-void isr_rxdmaerror(SLMP_INFO * info)
+static void isr_rxdmaerror(SLMP_INFO * info)
{
/* BIT5 = BOF (buffer overflow)
* BIT4 = COF (counter overflow)
info->pending_bh |= BH_RECEIVE;
}
-void isr_txdmaok(SLMP_INFO * info)
+static void isr_txdmaok(SLMP_INFO * info)
{
unsigned char status_reg1 = read_reg(info, SR1);
write_reg(info, IE0, info->ie0_value);
}
-void isr_txdmaerror(SLMP_INFO * info)
+static void isr_txdmaerror(SLMP_INFO * info)
{
/* BIT5 = BOF (buffer overflow)
* BIT4 = COF (counter overflow)
/* handle input serial signal changes
*/
-void isr_io_pin( SLMP_INFO *info, u16 status )
+static void isr_io_pin( SLMP_INFO *info, u16 status )
{
struct mgsl_icount *icount;
return retval;
}
-int alloc_dma_bufs(SLMP_INFO *info)
+static int alloc_dma_bufs(SLMP_INFO *info)
{
unsigned short BuffersPerFrame;
unsigned short BufferCount;
/* Allocate DMA buffers for the transmit and receive descriptor lists.
*/
-int alloc_buf_list(SLMP_INFO *info)
+static int alloc_buf_list(SLMP_INFO *info)
{
unsigned int i;
/* Allocate the frame DMA buffers used by the specified buffer list.
*/
-int alloc_frame_bufs(SLMP_INFO *info, SCADESC *buf_list,SCADESC_EX *buf_list_ex,int count)
+static int alloc_frame_bufs(SLMP_INFO *info, SCADESC *buf_list,SCADESC_EX *buf_list_ex,int count)
{
int i;
unsigned long phys_addr;
return 0;
}
-void free_dma_bufs(SLMP_INFO *info)
+static void free_dma_bufs(SLMP_INFO *info)
{
info->buffer_list = NULL;
info->rx_buf_list = NULL;
/* allocate buffer large enough to hold max_frame_size.
* This buffer is used to pass an assembled frame to the line discipline.
*/
-int alloc_tmp_rx_buf(SLMP_INFO *info)
+static int alloc_tmp_rx_buf(SLMP_INFO *info)
{
info->tmp_rx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
if (info->tmp_rx_buf == NULL)
return 0;
}
-void free_tmp_rx_buf(SLMP_INFO *info)
+static void free_tmp_rx_buf(SLMP_INFO *info)
{
kfree(info->tmp_rx_buf);
info->tmp_rx_buf = NULL;
}
-int claim_resources(SLMP_INFO *info)
+static int claim_resources(SLMP_INFO *info)
{
if (request_mem_region(info->phys_memory_base,SCA_MEM_SIZE,"synclinkmp") == NULL) {
printk( "%s(%d):%s mem addr conflict, Addr=%08X\n",
else
info->sca_statctrl_requested = true;
- info->memory_base = ioremap(info->phys_memory_base,SCA_MEM_SIZE);
+ info->memory_base = ioremap_nocache(info->phys_memory_base,
+ SCA_MEM_SIZE);
if (!info->memory_base) {
printk( "%s(%d):%s Cant map shared memory, MemAddr=%08X\n",
__FILE__,__LINE__,info->device_name, info->phys_memory_base );
goto errout;
}
- info->lcr_base = ioremap(info->phys_lcr_base,PAGE_SIZE);
+ info->lcr_base = ioremap_nocache(info->phys_lcr_base, PAGE_SIZE);
if (!info->lcr_base) {
printk( "%s(%d):%s Cant map LCR memory, MemAddr=%08X\n",
__FILE__,__LINE__,info->device_name, info->phys_lcr_base );
}
info->lcr_base += info->lcr_offset;
- info->sca_base = ioremap(info->phys_sca_base,PAGE_SIZE);
+ info->sca_base = ioremap_nocache(info->phys_sca_base, PAGE_SIZE);
if (!info->sca_base) {
printk( "%s(%d):%s Cant map SCA memory, MemAddr=%08X\n",
__FILE__,__LINE__,info->device_name, info->phys_sca_base );
}
info->sca_base += info->sca_offset;
- info->statctrl_base = ioremap(info->phys_statctrl_base,PAGE_SIZE);
+ info->statctrl_base = ioremap_nocache(info->phys_statctrl_base,
+ PAGE_SIZE);
if (!info->statctrl_base) {
printk( "%s(%d):%s Cant map SCA Status/Control memory, MemAddr=%08X\n",
__FILE__,__LINE__,info->device_name, info->phys_statctrl_base );
return -ENODEV;
}
-void release_resources(SLMP_INFO *info)
+static void release_resources(SLMP_INFO *info)
{
if ( debug_level >= DEBUG_LEVEL_INFO )
printk( "%s(%d):%s release_resources() entry\n",
/* Add the specified device instance data structure to the
* global linked list of devices and increment the device count.
*/
-void add_device(SLMP_INFO *info)
+static void add_device(SLMP_INFO *info)
{
info->next_device = NULL;
info->line = synclinkmp_device_count;
return info;
}
-void device_init(int adapter_num, struct pci_dev *pdev)
+static void device_init(int adapter_num, struct pci_dev *pdev)
{
SLMP_INFO *port_array[SCA_MAX_PORTS];
int port;
* The TxCLK and RxCLK signals are generated from the BRG and
* the TxD is looped back to the RxD internally.
*/
-void enable_loopback(SLMP_INFO *info, int enable)
+static void enable_loopback(SLMP_INFO *info, int enable)
{
if (enable) {
/* MD2 (Mode Register 2)
* data_rate data rate of clock in bits per second
* A data rate of 0 disables the AUX clock.
*/
-void set_rate( SLMP_INFO *info, u32 data_rate )
+static void set_rate( SLMP_INFO *info, u32 data_rate )
{
u32 TMCValue;
unsigned char BRValue;
/* Disable receiver
*/
-void rx_stop(SLMP_INFO *info)
+static void rx_stop(SLMP_INFO *info)
{
if (debug_level >= DEBUG_LEVEL_ISR)
printk("%s(%d):%s rx_stop()\n",
/* enable the receiver
*/
-void rx_start(SLMP_INFO *info)
+static void rx_start(SLMP_INFO *info)
{
int i;
/* Enable the transmitter and send a transmit frame if
* one is loaded in the DMA buffers.
*/
-void tx_start(SLMP_INFO *info)
+static void tx_start(SLMP_INFO *info)
{
if (debug_level >= DEBUG_LEVEL_ISR)
printk("%s(%d):%s tx_start() tx_count=%d\n",
/* stop the transmitter and DMA
*/
-void tx_stop( SLMP_INFO *info )
+static void tx_stop( SLMP_INFO *info )
{
if (debug_level >= DEBUG_LEVEL_ISR)
printk("%s(%d):%s tx_stop()\n",
/* Fill the transmit FIFO until the FIFO is full or
* there is no more data to load.
*/
-void tx_load_fifo(SLMP_INFO *info)
+static void tx_load_fifo(SLMP_INFO *info)
{
u8 TwoBytes[2];
/* Reset a port to a known state
*/
-void reset_port(SLMP_INFO *info)
+static void reset_port(SLMP_INFO *info)
{
if (info->sca_base) {
/* Reset all the ports to a known state.
*/
-void reset_adapter(SLMP_INFO *info)
+static void reset_adapter(SLMP_INFO *info)
{
int i;
/* Program port for asynchronous communications.
*/
-void async_mode(SLMP_INFO *info)
+static void async_mode(SLMP_INFO *info)
{
unsigned char RegValue;
/* Program the SCA for HDLC communications.
*/
-void hdlc_mode(SLMP_INFO *info)
+static void hdlc_mode(SLMP_INFO *info)
{
unsigned char RegValue;
u32 DpllDivisor;
/* Set the transmit HDLC idle mode
*/
-void tx_set_idle(SLMP_INFO *info)
+static void tx_set_idle(SLMP_INFO *info)
{
unsigned char RegValue = 0xff;
/* Query the adapter for the state of the V24 status (input) signals.
*/
-void get_signals(SLMP_INFO *info)
+static void get_signals(SLMP_INFO *info)
{
u16 status = read_reg(info, SR3);
u16 gpstatus = read_status_reg(info);
/* Set the state of DTR and RTS based on contents of
* serial_signals member of device context.
*/
-void set_signals(SLMP_INFO *info)
+static void set_signals(SLMP_INFO *info)
{
unsigned char RegValue;
u16 EnableBit;
* and set the current buffer to the first buffer. This effectively
* makes all buffers free and discards any data in buffers.
*/
-void rx_reset_buffers(SLMP_INFO *info)
+static void rx_reset_buffers(SLMP_INFO *info)
{
rx_free_frame_buffers(info, 0, info->rx_buf_count - 1);
}
* first index of 1st receive buffer of frame
* last index of last receive buffer of frame
*/
-void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last)
+static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last)
{
bool done = false;
*
* Return Value: true if frame returned, otherwise false
*/
-bool rx_get_frame(SLMP_INFO *info)
+static bool rx_get_frame(SLMP_INFO *info)
{
unsigned int StartIndex, EndIndex; /* index of 1st and last buffers of Rx frame */
unsigned short status;
/* load the transmit DMA buffer with data
*/
-void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count)
+static void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count)
{
unsigned short copy_count;
unsigned int i = 0;
info->last_tx_buf = ++i;
}
-bool register_test(SLMP_INFO *info)
+static bool register_test(SLMP_INFO *info)
{
static unsigned char testval[] = {0x00, 0xff, 0xaa, 0x55, 0x69, 0x96};
static unsigned int count = ARRAY_SIZE(testval);
return rc;
}
-bool irq_test(SLMP_INFO *info)
+static bool irq_test(SLMP_INFO *info)
{
unsigned long timeout;
unsigned long flags;
/* initialize adapter hardware
*/
-bool init_adapter(SLMP_INFO *info)
+static bool init_adapter(SLMP_INFO *info)
{
int i;
/* Loopback an HDLC frame to test the hardware
* interrupt and DMA functions.
*/
-bool loopback_test(SLMP_INFO *info)
+static bool loopback_test(SLMP_INFO *info)
{
#define TESTFRAMESIZE 20
/* Perform diagnostics on hardware
*/
-int adapter_test( SLMP_INFO *info )
+static int adapter_test( SLMP_INFO *info )
{
unsigned long flags;
if ( debug_level >= DEBUG_LEVEL_INFO )
/* Test the shared memory on a PCI adapter.
*/
-bool memory_test(SLMP_INFO *info)
+static bool memory_test(SLMP_INFO *info)
{
static unsigned long testval[] = { 0x0, 0x55555555, 0xaaaaaaaa,
0x66666666, 0x99999999, 0xffffffff, 0x12345678 };
* the write transation. This allows any pending DMA request to gain control
* of the local bus in a timely fasion.
*/
-void load_pci_memory(SLMP_INFO *info, char* dest, const char* src, unsigned short count)
+static void load_pci_memory(SLMP_INFO *info, char* dest, const char* src, unsigned short count)
{
/* A load interval of 16 allows for 4 32-bit writes at */
/* 136ns each for a maximum latency of 542ns on the local bus.*/
memcpy(dest, src, count % sca_pci_load_interval);
}
-void trace_block(SLMP_INFO *info,const char* data, int count, int xmit)
+static void trace_block(SLMP_INFO *info,const char* data, int count, int xmit)
{
int i;
int linecount;
/* called when HDLC frame times out
* update stats and do tx completion processing
*/
-void tx_timeout(unsigned long context)
+static void tx_timeout(unsigned long context)
{
SLMP_INFO *info = (SLMP_INFO*)context;
unsigned long flags;
/* called to periodically check the DSR/RI modem signal input status
*/
-void status_timeout(unsigned long context)
+static void status_timeout(unsigned long context)
{
u16 status = 0;
SLMP_INFO *info = (SLMP_INFO*)context;
}
-unsigned char read_reg(SLMP_INFO * info, unsigned char Addr)
+static unsigned char read_reg(SLMP_INFO * info, unsigned char Addr)
{
CALC_REGADDR();
return *RegAddr;
}
-void write_reg(SLMP_INFO * info, unsigned char Addr, unsigned char Value)
+static void write_reg(SLMP_INFO * info, unsigned char Addr, unsigned char Value)
{
CALC_REGADDR();
*RegAddr = Value;
}
-u16 read_reg16(SLMP_INFO * info, unsigned char Addr)
+static u16 read_reg16(SLMP_INFO * info, unsigned char Addr)
{
CALC_REGADDR();
return *((u16 *)RegAddr);
}
-void write_reg16(SLMP_INFO * info, unsigned char Addr, u16 Value)
+static void write_reg16(SLMP_INFO * info, unsigned char Addr, u16 Value)
{
CALC_REGADDR();
*((u16 *)RegAddr) = Value;
}
-unsigned char read_status_reg(SLMP_INFO * info)
+static unsigned char read_status_reg(SLMP_INFO * info)
{
unsigned char *RegAddr = (unsigned char *)info->statctrl_base;
return *RegAddr;
}
-void write_control_reg(SLMP_INFO * info)
+static void write_control_reg(SLMP_INFO * info)
{
unsigned char *RegAddr = (unsigned char *)info->statctrl_base;
*RegAddr = info->port_array[0]->ctrlreg_value;
projects / linux-2.6 / blobdiff