Pull sbs into release branch

[linux-2.6] / drivers / char / drm / radeon_drm.h

diff --git a/drivers/char/drm/radeon_drm.h b/drivers/char/drm/radeon_drm.h
index 9c177a6b2a4c46ed953a28a79d34eadd1cfbffd3..5a8e23f916fc192f05e9c52980d9ef8a5baaff48 100644 (file)
--- a/drivers/char/drm/radeon_drm.h
+++ b/drivers/char/drm/radeon_drm.h
@@ -161,7 +161,8 @@
 #define R200_EMIT_PP_TXCTLALL_3                     91
 #define R200_EMIT_PP_TXCTLALL_4                     92
 #define R200_EMIT_PP_TXCTLALL_5                     93
-#define RADEON_MAX_STATE_PACKETS                    94
+#define R200_EMIT_VAP_PVS_CNTL                      94
+#define RADEON_MAX_STATE_PACKETS                    95
 
 /* Commands understood by cmd_buffer ioctl.  More can be added but
  * obviously these can't be removed or changed:
@@ -176,6 +177,7 @@
 #define RADEON_CMD_WAIT         8      /* emit hw wait commands -- note:
                                         *  doesn't make the cpu wait, just
                                         *  the graphics hardware */
+#define RADEON_CMD_VECLINEAR   9       /* another r200 stopgap */
 
 typedef union {
        int i;
@@ -191,6 +193,9 @@ typedef union {
        struct {
                unsigned char cmd_type, offset, stride, count;
        } vectors;
+       struct {
+               unsigned char cmd_type, addr_lo, addr_hi, count;
+       } veclinear;
        struct {
                unsigned char cmd_type, buf_idx, pad0, pad1;
        } dma;
@@ -222,6 +227,7 @@ typedef union {
 #      define R300_WAIT_3D             0x2
 #      define R300_WAIT_2D_CLEAN       0x3
 #      define R300_WAIT_3D_CLEAN       0x4
+#define R300_CMD_SCRATCH               8
 
 typedef union {
        unsigned int u;
@@ -247,6 +253,9 @@ typedef union {
        struct {
                unsigned char cmd_type, flags, pad0, pad1;
        } wait;
+       struct {
+               unsigned char cmd_type, reg, n_bufs, flags;
+       } scratch;
 } drm_r300_cmd_header_t;
 
 #define RADEON_FRONT                   0x1
@@ -408,7 +417,7 @@ typedef struct {
 
        /* The current cliprects, or a subset thereof.
         */
-       drm_clip_rect_t boxes[RADEON_NR_SAREA_CLIPRECTS];
+       struct drm_clip_rect boxes[RADEON_NR_SAREA_CLIPRECTS];
        unsigned int nbox;
 
        /* Counters for client-side throttling of rendering clients.
@@ -417,7 +426,7 @@ typedef struct {
        unsigned int last_dispatch;
        unsigned int last_clear;
 
-       drm_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS +
+       struct drm_tex_region tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS +
                                                       1];
        unsigned int tex_age[RADEON_NR_TEX_HEAPS];
        int ctx_owner;
@@ -595,7 +604,7 @@ typedef struct drm_radeon_cmd_buffer {
        int bufsz;
        char __user *buf;
        int nbox;
-       drm_clip_rect_t __user *boxes;
+       struct drm_clip_rect __user *boxes;
 } drm_radeon_cmd_buffer_t;
 
 typedef struct drm_radeon_tex_image {
@@ -646,6 +655,7 @@ typedef struct drm_radeon_indirect {
 #define RADEON_PARAM_GART_TEX_HANDLE       10
 #define RADEON_PARAM_SCRATCH_OFFSET        11
 #define RADEON_PARAM_CARD_TYPE             12
+#define RADEON_PARAM_VBLANK_CRTC           13   /* VBLANK CRTC */
 
 typedef struct drm_radeon_getparam {
        int param;
@@ -697,7 +707,9 @@ typedef struct drm_radeon_setparam {
 #define RADEON_SETPARAM_FB_LOCATION    1       /* determined framebuffer location */
 #define RADEON_SETPARAM_SWITCH_TILING  2       /* enable/disable color tiling */
 #define RADEON_SETPARAM_PCIGART_LOCATION 3     /* PCI Gart Location */
-
+#define RADEON_SETPARAM_NEW_MEMMAP 4           /* Use new memory map */
+#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5    /* PCI GART Table Size */
+#define RADEON_SETPARAM_VBLANK_CRTC 6           /* VBLANK CRTC */
 /* 1.14: Clients can allocate/free a surface
  */
 typedef struct drm_radeon_surface_alloc {
@@ -710,4 +722,7 @@ typedef struct drm_radeon_surface_free {
        unsigned int address;
 } drm_radeon_surface_free_t;
 
+#define        DRM_RADEON_VBLANK_CRTC1         1
+#define        DRM_RADEON_VBLANK_CRTC2         2
+
 #endif