Merge branch 'master' of ../linux-2.6/

[linux-2.6] / drivers / char / drm / i915_drm.h

diff --git a/drivers/char/drm/i915_drm.h b/drivers/char/drm/i915_drm.h
index 77412ddac007625637e24aabd38a69f94a690cd3..05c66cf03a9eb02a0da22304ab4d07d95209b16b 100644 (file)
--- a/drivers/char/drm/i915_drm.h
+++ b/drivers/char/drm/i915_drm.h
@@ -64,7 +64,7 @@ typedef struct _drm_i915_init {
 } drm_i915_init_t;
 
 typedef struct _drm_i915_sarea {
-       drm_tex_region_t texList[I915_NR_TEX_REGIONS + 1];
+       struct drm_tex_region texList[I915_NR_TEX_REGIONS + 1];
        int last_upload;        /* last time texture was uploaded */
        int last_enqueue;       /* last time a buffer was enqueued */
        int last_dispatch;      /* age of the most recently dispatched buffer */
@@ -74,6 +74,45 @@ typedef struct _drm_i915_sarea {
        int pf_active;
        int pf_current_page;    /* which buffer is being displayed? */
        int perf_boxes;         /* performance boxes to be displayed */
+       int width, height;      /* screen size in pixels */
+
+       drm_handle_t front_handle;
+       int front_offset;
+       int front_size;
+
+       drm_handle_t back_handle;
+       int back_offset;
+       int back_size;
+
+       drm_handle_t depth_handle;
+       int depth_offset;
+       int depth_size;
+
+       drm_handle_t tex_handle;
+       int tex_offset;
+       int tex_size;
+       int log_tex_granularity;
+       int pitch;
+       int rotation;           /* 0, 90, 180 or 270 */
+       int rotated_offset;
+       int rotated_size;
+       int rotated_pitch;
+       int virtualX, virtualY;
+
+       unsigned int front_tiled;
+       unsigned int back_tiled;
+       unsigned int depth_tiled;
+       unsigned int rotated_tiled;
+       unsigned int rotated2_tiled;
+
+       int pipeA_x;
+       int pipeA_y;
+       int pipeA_w;
+       int pipeA_h;
+       int pipeB_x;
+       int pipeB_y;
+       int pipeB_w;
+       int pipeB_h;
 } drm_i915_sarea_t;
 
 /* Flags for perf_boxes
@@ -99,6 +138,11 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_FREE          0x09
 #define DRM_I915_INIT_HEAP     0x0a
 #define DRM_I915_CMDBUFFER     0x0b
+#define DRM_I915_DESTROY_HEAP  0x0c
+#define DRM_I915_SET_VBLANK_PIPE       0x0d
+#define DRM_I915_GET_VBLANK_PIPE       0x0e
+#define DRM_I915_VBLANK_SWAP   0x0f
+#define DRM_I915_HWS_ADDR      0x11
 
 #define DRM_IOCTL_I915_INIT            DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH           DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -112,6 +156,10 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_FREE             DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t)
 #define DRM_IOCTL_I915_INIT_HEAP        DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t)
 #define DRM_IOCTL_I915_CMDBUFFER       DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t)
+#define DRM_IOCTL_I915_DESTROY_HEAP    DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t)
+#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
+#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
+#define DRM_IOCTL_I915_VBLANK_SWAP     DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -122,7 +170,7 @@ typedef struct _drm_i915_batchbuffer {
        int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
        int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO */
        int num_cliprects;      /* mulitpass with multiple cliprects? */
-       drm_clip_rect_t __user *cliprects;      /* pointer to userspace cliprects */
+       struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
 } drm_i915_batchbuffer_t;
 
 /* As above, but pass a pointer to userspace buffer which can be
@@ -134,7 +182,7 @@ typedef struct _drm_i915_cmdbuffer {
        int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
        int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO */
        int num_cliprects;      /* mulitpass with multiple cliprects? */
-       drm_clip_rect_t __user *cliprects;      /* pointer to userspace cliprects */
+       struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
 } drm_i915_cmdbuffer_t;
 
 /* Userspace can request & wait on irq's:
@@ -191,4 +239,32 @@ typedef struct drm_i915_mem_init_heap {
        int start;
 } drm_i915_mem_init_heap_t;
 
+/* Allow memory manager to be torn down and re-initialized (eg on
+ * rotate):
+ */
+typedef struct drm_i915_mem_destroy_heap {
+       int region;
+} drm_i915_mem_destroy_heap_t;
+
+/* Allow X server to configure which pipes to monitor for vblank signals
+ */
+#define        DRM_I915_VBLANK_PIPE_A  1
+#define        DRM_I915_VBLANK_PIPE_B  2
+
+typedef struct drm_i915_vblank_pipe {
+       int pipe;
+} drm_i915_vblank_pipe_t;
+
+/* Schedule buffer swap at given vertical blank:
+ */
+typedef struct drm_i915_vblank_swap {
+       drm_drawable_t drawable;
+       enum drm_vblank_seq_type seqtype;
+       unsigned int sequence;
+} drm_i915_vblank_swap_t;
+
+typedef struct drm_i915_hws_addr {
+       uint64_t addr;
+} drm_i915_hws_addr_t;
+
 #endif                         /* _I915_DRM_H_ */