Merge branch 'linus' into x86/pat

[linux-2.6] / drivers / ata / sata_mv.c

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index f6a716ef5a168d8cfb478397e486780752983db3..60391e9a84db828f40577e17edcbca2d78817cbf 100644 (file)
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -72,7 +72,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME       "sata_mv"
-#define DRV_VERSION    "1.21"
+#define DRV_VERSION    "1.24"
 
 enum {
        /* BAR's are enumerated in terms of pci_resource_start() terms */
@@ -224,6 +224,11 @@ enum {
 
        PHY_MODE3               = 0x310,
        PHY_MODE4               = 0x314,
+       PHY_MODE4_CFG_MASK      = 0x00000003,   /* phy internal config field */
+       PHY_MODE4_CFG_VALUE     = 0x00000001,   /* phy internal config field */
+       PHY_MODE4_RSVD_ZEROS    = 0x5de3fffa,   /* Gen2e always write zeros */
+       PHY_MODE4_RSVD_ONES     = 0x00000005,   /* Gen2e always write ones */
+
        PHY_MODE2               = 0x330,
        SATA_IFCTL_OFS          = 0x344,
        SATA_TESTCTL_OFS        = 0x348,
@@ -354,7 +359,6 @@ enum {
        MV_HP_ERRATA_50XXB2     = (1 << 2),
        MV_HP_ERRATA_60X1B2     = (1 << 3),
        MV_HP_ERRATA_60X1C0     = (1 << 4),
-       MV_HP_ERRATA_XX42A0     = (1 << 5),
        MV_HP_GEN_I             = (1 << 6),     /* Generation I: 50xx */
        MV_HP_GEN_II            = (1 << 7),     /* Generation II: 60xx */
        MV_HP_GEN_IIE           = (1 << 8),     /* Generation IIE: 6042/7042 */
@@ -811,12 +815,7 @@ static void mv_set_edma_ptrs(void __iomem *port_mmio,
        writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI_OFS);
        writelfl((pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK) | index,
                 port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
-
-       if (hpriv->hp_flags & MV_HP_ERRATA_XX42A0)
-               writelfl((pp->crqb_dma & 0xffffffff) | index,
-                        port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
-       else
-               writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
+       writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
 
        /*
         * initialize response queue
@@ -826,13 +825,7 @@ static void mv_set_edma_ptrs(void __iomem *port_mmio,
 
        WARN_ON(pp->crpb_dma & 0xff);
        writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI_OFS);
-
-       if (hpriv->hp_flags & MV_HP_ERRATA_XX42A0)
-               writelfl((pp->crpb_dma & 0xffffffff) | index,
-                        port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
-       else
-               writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
-
+       writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
        writelfl((pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK) | index,
                 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
 }
@@ -2546,7 +2539,7 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
                hp_flags & (MV_HP_ERRATA_60X1B2 | MV_HP_ERRATA_60X1C0);
        int fix_phy_mode4 =
                hp_flags & (MV_HP_ERRATA_60X1B2 | MV_HP_ERRATA_60X1C0);
-       u32 m2, tmp;
+       u32 m2, m3;
 
        if (fix_phy_mode2) {
                m2 = readl(port_mmio + PHY_MODE2);
@@ -2563,28 +2556,36 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
                udelay(200);
        }
 
-       /* who knows what this magic does */
-       tmp = readl(port_mmio + PHY_MODE3);
-       tmp &= ~0x7F800000;
-       tmp |= 0x2A800000;
-       writel(tmp, port_mmio + PHY_MODE3);
-
-       if (fix_phy_mode4) {
-               u32 m4;
-
-               m4 = readl(port_mmio + PHY_MODE4);
-
-               if (hp_flags & MV_HP_ERRATA_60X1B2)
-                       tmp = readl(port_mmio + PHY_MODE3);
+       /*
+        * Gen-II/IIe PHY_MODE3 errata RM#2:
+        * Achieves better receiver noise performance than the h/w default:
+        */
+       m3 = readl(port_mmio + PHY_MODE3);
+       m3 = (m3 & 0x1f) | (0x5555601 << 5);
 
-               /* workaround for errata FEr SATA#10 (part 1) */
-               m4 = (m4 & ~(1 << 1)) | (1 << 0);
+       /* Guideline 88F5182 (GL# SATA-S11) */
+       if (IS_SOC(hpriv))
+               m3 &= ~0x1c;
 
+       if (fix_phy_mode4) {
+               u32 m4 = readl(port_mmio + PHY_MODE4);
+               /*
+                * Enforce reserved-bit restrictions on GenIIe devices only.
+                * For earlier chipsets, force only the internal config field
+                *  (workaround for errata FEr SATA#10 part 1).
+                */
+               if (IS_GEN_IIE(hpriv))
+                       m4 = (m4 & ~PHY_MODE4_RSVD_ZEROS) | PHY_MODE4_RSVD_ONES;
+               else
+                       m4 = (m4 & ~PHY_MODE4_CFG_MASK) | PHY_MODE4_CFG_VALUE;
                writel(m4, port_mmio + PHY_MODE4);
-
-               if (hp_flags & MV_HP_ERRATA_60X1B2)
-                       writel(tmp, port_mmio + PHY_MODE3);
        }
+       /*
+        * Workaround for 60x1-B2 errata SATA#13:
+        * Any write to PHY_MODE4 (above) may corrupt PHY_MODE3,
+        * so we must always rewrite PHY_MODE3 after PHY_MODE4.
+        */
+       writel(m3, port_mmio + PHY_MODE3);
 
        /* Revert values of pre-emphasis and signal amps to the saved ones */
        m2 = readl(port_mmio + PHY_MODE2);
@@ -3002,10 +3003,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
                        hp_flags |= MV_HP_CUT_THROUGH;
 
                switch (pdev->revision) {
-               case 0x0:
-                       hp_flags |= MV_HP_ERRATA_XX42A0;
-                       break;
-               case 0x1:
+               case 0x2: /* Rev.B0: the first/only public release */
                        hp_flags |= MV_HP_ERRATA_60X1C0;
                        break;
                default: