Merge ssh://master.kernel.org/pub/scm/linux/kernel/git/sam/kbuild

[linux-2.6] / drivers / ata / sata_inic162x.c

diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 95caba0f910e94a6b6695a4805ad542aca1ea745..08595f34b3e8cdaa2df597b799cf9a479fe713d1 100644 (file)
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -552,7 +552,6 @@ static int inic_port_start(struct ata_port *ap)
 }
 
 static struct ata_port_operations inic_port_ops = {
-       .port_disable           = ata_port_disable,
        .tf_load                = ata_tf_load,
        .tf_read                = ata_tf_read,
        .check_status           = ata_check_status,
@@ -569,7 +568,6 @@ static struct ata_port_operations inic_port_ops = {
 
        .irq_clear              = inic_irq_clear,
        .irq_on                 = ata_irq_on,
-       .irq_ack                = ata_irq_ack,
 
        .qc_prep                = ata_qc_prep,
        .qc_issue               = inic_qc_issue,
@@ -695,16 +693,24 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        host->iomap = iomap = pcim_iomap_table(pdev);
 
        for (i = 0; i < NR_PORTS; i++) {
-               struct ata_ioports *port = &host->ports[i]->ioaddr;
-               void __iomem *port_base = iomap[MMIO_BAR] + i * PORT_SIZE;
+               struct ata_port *ap = host->ports[i];
+               struct ata_ioports *port = &ap->ioaddr;
+               unsigned int offset = i * PORT_SIZE;
 
                port->cmd_addr = iomap[2 * i];
                port->altstatus_addr =
                port->ctl_addr = (void __iomem *)
                        ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS);
-               port->scr_addr = port_base + PORT_SCR;
+               port->scr_addr = iomap[MMIO_BAR] + offset + PORT_SCR;
 
                ata_std_ports(port);
+
+               ata_port_pbar_desc(ap, MMIO_BAR, -1, "mmio");
+               ata_port_pbar_desc(ap, MMIO_BAR, offset, "port");
+               ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
+                 (unsigned long long)pci_resource_start(pdev, 2 * i),
+                 (unsigned long long)pci_resource_start(pdev, (2 * i + 1)) |
+                                     ATA_PCI_CTL_OFS);
        }
 
        hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL);