[PATCH] x86_64: Force correct address space size for MTRR on some 64bit Intel Xeons

[linux-2.6] / arch / x86_64 / kernel / setup.c

diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index da0bc3e7bdf5cfbd7394c612f25836110fdd2816..476ee034fca240d1a59bb475607e7fa561829ae6 100644 (file)
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -60,6 +60,7 @@
 #include <asm/setup.h>
 #include <asm/mach_apic.h>
 #include <asm/numa.h>
+#include <asm/sections.h>
 
 /*
  * Machine setup..
@@ -103,7 +104,6 @@ struct edid_info edid_info;
 struct e820map e820;
 
 extern int root_mountflags;
-extern char _text, _etext, _edata, _end;
 
 char command_line[COMMAND_LINE_SIZE];
 
@@ -571,6 +571,8 @@ void __init setup_arch(char **cmdline_p)
 
        init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 
+       zap_low_mappings(0);
+
 #ifdef CONFIG_ACPI
        /*
         * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
@@ -823,7 +825,7 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
                if (!node_online(node))
                        node = nearby_node(apicid);
        }
-       cpu_to_node[cpu] = node;
+       numa_set_node(cpu, node);
 
        printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
                        cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
@@ -975,7 +977,7 @@ static void srat_detect_node(void)
        node = apicid_to_node[hard_smp_processor_id()];
        if (node == NUMA_NO_NODE)
                node = 0;
-       cpu_to_node[cpu] = node;
+       numa_set_node(cpu, node);
 
        if (acpi_numa > 0)
                printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
@@ -993,6 +995,11 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
                unsigned eax = cpuid_eax(0x80000008);
                c->x86_virt_bits = (eax >> 8) & 0xff;
                c->x86_phys_bits = eax & 0xff;
+               /* CPUID workaround for Intel 0F34 CPU */
+               if (c->x86_vendor == X86_VENDOR_INTEL &&
+                   c->x86 == 0xF && c->x86_model == 0x3 &&
+                   c->x86_mask == 0x4)
+                       c->x86_phys_bits = 36;
        }
 
        if (c->x86 == 15)
@@ -1060,10 +1067,10 @@ void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
                c->x86 = (tfms >> 8) & 0xf;
                c->x86_model = (tfms >> 4) & 0xf;
                c->x86_mask = tfms & 0xf;
-               if (c->x86 == 0xf) {
+               if (c->x86 == 0xf)
                        c->x86 += (tfms >> 20) & 0xff;
+               if (c->x86 >= 0x6)
                        c->x86_model += ((tfms >> 16) & 0xF) << 4;
-               } 
                if (c->x86_capability[0] & (1<<19)) 
                        c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
        } else {