[PATCH] Remove all ifdefs for local/io apic

[linux-2.6] / arch / x86_64 / kernel / mpparse.c

diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index b17cf3eba35944c22134ee419efef71fc00ba4b7..c73dd1f41e651551880fe760209104f012f8efb4 100644 (file)
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -16,7 +16,6 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/delay.h>
-#include <linux/config.h>
 #include <linux/bootmem.h>
 #include <linux/smp_lock.h>
 #include <linux/kernel_stat.h>
@@ -75,14 +74,10 @@ physid_mask_t phys_cpu_present_map = PHYSID_MASK_NONE;
 /* ACPI MADT entry parsing functions */
 #ifdef CONFIG_ACPI
 extern struct acpi_boot_flags acpi_boot;
-#ifdef CONFIG_X86_LOCAL_APIC
 extern int acpi_parse_lapic (acpi_table_entry_header *header);
 extern int acpi_parse_lapic_addr_ovr (acpi_table_entry_header *header);
 extern int acpi_parse_lapic_nmi (acpi_table_entry_header *header);
-#endif /*CONFIG_X86_LOCAL_APIC*/
-#ifdef CONFIG_X86_IO_APIC
 extern int acpi_parse_ioapic (acpi_table_entry_header *header);
-#endif /*CONFIG_X86_IO_APIC*/
 #endif /*CONFIG_ACPI*/
 
 u8 bios_cpu_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = BAD_APICID };
@@ -662,9 +657,7 @@ void __init find_intel_smp (void)
  */
 void __init find_smp_config (void)
 {
-#ifdef CONFIG_X86_LOCAL_APIC
        find_intel_smp();
-#endif
 }
 
 
@@ -718,8 +711,6 @@ void __cpuinit mp_register_lapic (
        MP_processor_info(&processor);
 }
 
-#ifdef CONFIG_X86_IO_APIC
-
 #define MP_ISA_BUS             0
 #define MP_MAX_IOAPIC_PIN      127
 
@@ -968,7 +959,17 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
                 */
                int irq = gsi;
                if (gsi < MAX_GSI_NUM) {
-                       if (gsi > 15)
+                       /*
+                        * Retain the VIA chipset work-around (gsi > 15), but
+                        * avoid a problem where the 8254 timer (IRQ0) is setup
+                        * via an override (so it's not on pin 0 of the ioapic),
+                        * and at the same time, the pin 0 interrupt is a PCI
+                        * type.  The gsi > 15 test could cause these two pins
+                        * to be shared as IRQ0, and they are not shareable.
+                        * So test for this condition, and if necessary, avoid
+                        * the pin collision.
+                        */
+                       if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
                                gsi = pci_irq++;
                        /*
                         * Don't assign IRQ used by ACPI SCI
@@ -988,5 +989,4 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
        return gsi;
 }
 
-#endif /*CONFIG_X86_IO_APIC*/
 #endif /*CONFIG_ACPI*/