[SPARC64]: Elminate all usage of hard-coded trap globals.

[linux-2.6] / arch / sparc64 / kernel / winfixup.S

diff --git a/arch/sparc64/kernel/winfixup.S b/arch/sparc64/kernel/winfixup.S
index 99c809a1e5acbbeacebdf561504dd24a2cdfce5a..de588036df4300f965ef0a9cbc03bdad7d61cad3 100644 (file)
--- a/arch/sparc64/kernel/winfixup.S
+++ b/arch/sparc64/kernel/winfixup.S
@@ -16,23 +16,14 @@
        .text
 
 set_pcontext:
-cplus_winfixup_insn_1:
-       sethi   %hi(0), %l1
+       sethi   %hi(sparc64_kern_pri_context), %l1
+       ldx     [%l1 + %lo(sparc64_kern_pri_context)], %l1
        mov     PRIMARY_CONTEXT, %g1
-       sllx    %l1, 32, %l1
-cplus_winfixup_insn_2:
-       sethi   %hi(0), %g2
-       or      %l1, %g2, %l1
        stxa    %l1, [%g1] ASI_DMMU
        flush   %g6
        retl
         nop
 
-cplus_wfinsn_1:
-       sethi   %uhi(CTX_CHEETAH_PLUS_NUC), %l1
-cplus_wfinsn_2:
-       sethi   %hi(CTX_CHEETAH_PLUS_CTX0), %g2
-
        .align  32
 
        /* Here are the rules, pay attention.
@@ -48,6 +39,7 @@ cplus_wfinsn_2:
         */
        .globl  fill_fixup, spill_fixup
 fill_fixup:
+       TRAP_LOAD_THREAD_REG
        rdpr            %tstate, %g1
        andcc           %g1, TSTATE_PRIV, %g0
        or              %g4, FAULT_CODE_WINFIXUP, %g4
@@ -93,10 +85,7 @@ fill_fixup:
        wrpr            %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
        mov             %o7, %g6
        ldx             [%g6 + TI_TASK], %g4
-#ifdef CONFIG_SMP
-       mov             TSB_REG, %g1
-       ldxa            [%g1] ASI_IMMU, %g5
-#endif
+       LOAD_PER_CPU_BASE(%g1, %g2)
 
        /* This is the same as below, except we handle this a bit special
         * since we must preserve %l5 and %l6, see comment above.
@@ -115,6 +104,7 @@ fill_fixup:
         * do not touch %g7 or %g2 so we handle the two cases fine.
         */
 spill_fixup:
+       TRAP_LOAD_THREAD_REG
        ldx             [%g6 + TI_FLAGS], %g1
        andcc           %g1, _TIF_32BIT, %g0
        ldub            [%g6 + TI_WSAVED], %g1
@@ -190,6 +180,7 @@ winfix_mna:
        wrpr            %g3, %tnpc
        done
 fill_fixup_mna:
+       TRAP_LOAD_THREAD_REG
        rdpr            %tstate, %g1
        andcc           %g1, TSTATE_PRIV, %g0
        be,pt           %xcc, window_mna_from_user_common
@@ -217,16 +208,14 @@ fill_fixup_mna:
        wrpr            %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
        mov             %o7, %g6                        ! Get current back.
        ldx             [%g6 + TI_TASK], %g4            ! Finish it.
-#ifdef CONFIG_SMP
-       mov             TSB_REG, %g1
-       ldxa            [%g1] ASI_IMMU, %g5
-#endif
+       LOAD_PER_CPU_BASE(%g1, %g2)
        call            mem_address_unaligned
         add            %sp, PTREGS_OFF, %o0
 
        b,pt            %xcc, rtrap
         nop                                            ! yes, the nop is correct
 spill_fixup_mna:
+       TRAP_LOAD_THREAD_REG
        ldx             [%g6 + TI_FLAGS], %g1
        andcc           %g1, _TIF_32BIT, %g0
        ldub            [%g6 + TI_WSAVED], %g1
@@ -287,11 +276,6 @@ window_mna_from_user_common:
        ba,pt           %xcc, rtrap
         clr            %l6
        
-       /* These are only needed for 64-bit mode processes which
-        * put their stack pointer into the VPTE area and there
-        * happens to be a VPTE tlb entry mapped there during
-        * a spill/fill trap to that stack frame.
-        */
        .globl          winfix_dax, fill_fixup_dax, spill_fixup_dax
 winfix_dax:
        andn            %g3, 0x7f, %g3
@@ -299,6 +283,7 @@ winfix_dax:
        wrpr            %g3, %tnpc
        done
 fill_fixup_dax:
+       TRAP_LOAD_THREAD_REG
        rdpr            %tstate, %g1
        andcc           %g1, TSTATE_PRIV, %g0
        be,pt           %xcc, window_dax_from_user_common
@@ -326,16 +311,14 @@ fill_fixup_dax:
        wrpr            %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
        mov             %o7, %g6                        ! Get current back.
        ldx             [%g6 + TI_TASK], %g4            ! Finish it.
-#ifdef CONFIG_SMP
-       mov             TSB_REG, %g1
-       ldxa            [%g1] ASI_IMMU, %g5
-#endif
+       LOAD_PER_CPU_BASE(%g1, %g2)
        call            spitfire_data_access_exception
         add            %sp, PTREGS_OFF, %o0
 
        b,pt            %xcc, rtrap
         nop                                            ! yes, the nop is correct
 spill_fixup_dax:
+       TRAP_LOAD_THREAD_REG
        ldx             [%g6 + TI_FLAGS], %g1
        andcc           %g1, _TIF_32BIT, %g0
        ldub            [%g6 + TI_WSAVED], %g1
@@ -395,23 +378,3 @@ window_dax_from_user_common:
         add            %sp, PTREGS_OFF, %o0
        ba,pt           %xcc, rtrap
         clr            %l6
-       
-
-       .globl          cheetah_plus_patch_winfixup
-cheetah_plus_patch_winfixup:
-       sethi                   %hi(cplus_wfinsn_1), %o0
-       sethi                   %hi(cplus_winfixup_insn_1), %o2
-       lduw                    [%o0 + %lo(cplus_wfinsn_1)], %o1
-       or                      %o2, %lo(cplus_winfixup_insn_1), %o2
-       stw                     %o1, [%o2]
-       flush                   %o2
-
-       sethi                   %hi(cplus_wfinsn_2), %o0
-       sethi                   %hi(cplus_winfixup_insn_2), %o2
-       lduw                    [%o0 + %lo(cplus_wfinsn_2)], %o1
-       or                      %o2, %lo(cplus_winfixup_insn_2), %o2
-       stw                     %o1, [%o2]
-       flush                   %o2
-
-       retl
-        nop