.long .Lduct # cr2: dispatchable unit control table
.long 0 # cr3: instruction authorization
.long 0 # cr4: instruction authorization
- .long 0xffffffff # cr5: primary-aste origin
+ .long .Lduct # cr5: primary-aste origin
.long 0 # cr6: I/O interrupts
.long 0 # cr7: secondary space segment table
.long 0 # cr8: access registers translation
.long 0 # cr13: home space segment table
.long 0xc0000000 # cr14: machine check handling off
.long 0 # cr15: linkage stack operations
-.Lduct: .long 0,0,0,0,0,0,0,0
- .long 0,0,0,0,0,0,0,0
.Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
.Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
.Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
.Linittu: .long init_thread_union
.Lstartup_init:
.long startup_init
-
- .globl ipl_schib
-ipl_schib:
- .rept 13
- .long 0
+ .align 64
+.Lduct: .long 0,0,0,0,.Lduald,0,0,0
+ .long 0,0,0,0,0,0,0,0
+ .align 128
+.Lduald:.rept 8
+ .long 0x80000000,0,0,0 # invalid access-list entries
.endr
- .globl ipl_flags
-ipl_flags:
- .long 0
- .globl ipl_devno
-ipl_devno:
- .word 0
-
.org 0x12000
+ .globl _ehead
+_ehead:
#ifdef CONFIG_SHARED_KERNEL
.org 0x100000
#endif