Automatic merge of /spare/repo/netdev-2.6 branch starfire

[linux-2.6] / arch / ppc / syslib / ppc83xx_setup.c

diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index c28f9d679484f348e18c5409141983be5a7fcfe6..843cf8873e60f35376b80e2cda72839ee99fb35a 100644 (file)
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -29,6 +29,7 @@
 #include <asm/mmu.h>
 #include <asm/ppc_sys.h>
 #include <asm/kgdb.h>
+#include <asm/delay.h>
 
 #include <syslib/ppc83xx_setup.h>
 
@@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void)
 void
 mpc83xx_restart(char *cmd)
 {
+       volatile unsigned char __iomem *reg;
+       unsigned char tmp;
+
+       reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
+
        local_irq_disable();
+
+       /*
+        * Unlock the BCSR bits so a PRST will update the contents.
+        * Otherwise the reset asserts but doesn't clear.
+        */
+       tmp = in_8(reg + BCSR_MISC_REG3_OFF);
+       tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
+       out_8(reg + BCSR_MISC_REG3_OFF, tmp);
+
+       /*
+        * Trigger a reset via a low->high transition of the
+        * PORESET bit.
+        */
+       tmp = in_8(reg + BCSR_MISC_REG2_OFF);
+       tmp &= ~BCSR_MISC_REG2_PORESET;
+       out_8(reg + BCSR_MISC_REG2_OFF, tmp);
+
+       udelay(1);
+
+       tmp |= BCSR_MISC_REG2_PORESET;
+       out_8(reg + BCSR_MISC_REG2_OFF, tmp);
+
        for(;;);
 }