[POWERPC] DART iommu suspend

[linux-2.6] / arch / powerpc / sysdev / mpic.c

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 27e6f78739eb53088da8774b1cee7b659e49aefa..e88bbd5ec4c8cfb4dc499e6002095c4c3cf366ee 100644 (file)
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -304,7 +304,7 @@ static void __init mpic_test_broken_ipi(struct mpic *mpic)
        }
 }
 
-#ifdef CONFIG_MPIC_BROKEN_U3
+#ifdef CONFIG_MPIC_U3_HT_IRQS
 
 /* Test if an interrupt is sourced from HyperTransport (used on broken U3s)
  * to force the edge setting on the MPIC and do the ack workaround.
@@ -354,6 +354,12 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
                tmp |= 0x22;
        writel(tmp, fixup->base + 4);
        spin_unlock_irqrestore(&mpic->fixup_lock, flags);
+
+#ifdef CONFIG_PM
+       /* use the lowest bit inverted to the actual HW,
+        * set if this fixup was enabled, clear otherwise */
+       mpic->save_data[source].fixup_data = tmp | 1;
+#endif
 }
 
 static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
@@ -375,6 +381,12 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
        tmp |= 1;
        writel(tmp, fixup->base + 4);
        spin_unlock_irqrestore(&mpic->fixup_lock, flags);
+
+#ifdef CONFIG_PM
+       /* use the lowest bit inverted to the actual HW,
+        * set if this fixup was enabled, clear otherwise */
+       mpic->save_data[source].fixup_data = tmp & ~1;
+#endif
 }
 
 static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
@@ -476,7 +488,7 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
        }
 }
 
-#else /* CONFIG_MPIC_BROKEN_U3 */
+#else /* CONFIG_MPIC_U3_HT_IRQS */
 
 static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source)
 {
@@ -487,7 +499,7 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
 {
 }
 
-#endif /* CONFIG_MPIC_BROKEN_U3 */
+#endif /* CONFIG_MPIC_U3_HT_IRQS */
 
 
 #define mpic_irq_to_hw(virq)   ((unsigned int)irq_map[virq].hwirq)
@@ -615,7 +627,7 @@ static void mpic_end_irq(unsigned int irq)
        mpic_eoi(mpic);
 }
 
-#ifdef CONFIG_MPIC_BROKEN_U3
+#ifdef CONFIG_MPIC_U3_HT_IRQS
 
 static void mpic_unmask_ht_irq(unsigned int irq)
 {
@@ -665,7 +677,7 @@ static void mpic_end_ht_irq(unsigned int irq)
                mpic_ht_end_irq(mpic, src);
        mpic_eoi(mpic);
 }
-#endif /* !CONFIG_MPIC_BROKEN_U3 */
+#endif /* !CONFIG_MPIC_U3_HT_IRQS */
 
 #ifdef CONFIG_SMP
 
@@ -788,7 +800,7 @@ static struct irq_chip mpic_ipi_chip = {
 };
 #endif /* CONFIG_SMP */
 
-#ifdef CONFIG_MPIC_BROKEN_U3
+#ifdef CONFIG_MPIC_U3_HT_IRQS
 static struct irq_chip mpic_irq_ht_chip = {
        .startup        = mpic_startup_ht_irq,
        .shutdown       = mpic_shutdown_ht_irq,
@@ -797,7 +809,7 @@ static struct irq_chip mpic_irq_ht_chip = {
        .eoi            = mpic_end_ht_irq,
        .set_type       = mpic_set_irq_type,
 };
-#endif /* CONFIG_MPIC_BROKEN_U3 */
+#endif /* CONFIG_MPIC_U3_HT_IRQS */
 
 
 static int mpic_host_match(struct irq_host *h, struct device_node *node)
@@ -837,11 +849,11 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
        /* Default chip */
        chip = &mpic->hc_irq;
 
-#ifdef CONFIG_MPIC_BROKEN_U3
+#ifdef CONFIG_MPIC_U3_HT_IRQS
        /* Check for HT interrupts, override vecpri */
        if (mpic_is_ht_interrupt(mpic, hw))
                chip = &mpic->hc_ht_irq;
-#endif /* CONFIG_MPIC_BROKEN_U3 */
+#endif /* CONFIG_MPIC_U3_HT_IRQS */
 
        DBG("mpic: mapping to irq chip @%p\n", chip);
 
@@ -937,12 +949,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic->hc_irq.typename = name;
        if (flags & MPIC_PRIMARY)
                mpic->hc_irq.set_affinity = mpic_set_affinity;
-#ifdef CONFIG_MPIC_BROKEN_U3
+#ifdef CONFIG_MPIC_U3_HT_IRQS
        mpic->hc_ht_irq = mpic_irq_ht_chip;
        mpic->hc_ht_irq.typename = name;
        if (flags & MPIC_PRIMARY)
                mpic->hc_ht_irq.set_affinity = mpic_set_affinity;
-#endif /* CONFIG_MPIC_BROKEN_U3 */
+#endif /* CONFIG_MPIC_U3_HT_IRQS */
 
 #ifdef CONFIG_SMP
        mpic->hc_ipi = mpic_ipi_chip;
@@ -1142,8 +1154,8 @@ void __init mpic_init(struct mpic *mpic)
 
        /* Do the HT PIC fixups on U3 broken mpic */
        DBG("MPIC flags: %x\n", mpic->flags);
-       if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY))
-               mpic_scan_ht_pics(mpic);
+       if ((mpic->flags & MPIC_U3_HT_IRQS) && (mpic->flags & MPIC_PRIMARY))
+               mpic_scan_ht_pics(mpic);
 
        for (i = 0; i < mpic->num_sources; i++) {
                /* start with vector = source number, and masked */
@@ -1167,6 +1179,12 @@ void __init mpic_init(struct mpic *mpic)
 
        /* Set current processor priority to 0 */
        mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0);
+
+#ifdef CONFIG_PM
+       /* allocate memory to save mpic state */
+       mpic->save_data = alloc_bootmem(mpic->num_sources * sizeof(struct mpic_irq_save));
+       BUG_ON(mpic->save_data == NULL);
+#endif
 }
 
 void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
@@ -1333,8 +1351,11 @@ unsigned int mpic_get_one_irq(struct mpic *mpic)
 #ifdef DEBUG_LOW
        DBG("%s: get_one_irq(): %d\n", mpic->name, src);
 #endif
-       if (unlikely(src == mpic->spurious_vec))
+       if (unlikely(src == mpic->spurious_vec)) {
+               if (mpic->flags & MPIC_SPV_EOI)
+                       mpic_eoi(mpic);
                return NO_IRQ;
+       }
        return irq_linear_revmap(mpic->irqhost, src);
 }
 
@@ -1417,3 +1438,79 @@ void __devinit smp_mpic_setup_cpu(int cpu)
        mpic_setup_this_cpu();
 }
 #endif /* CONFIG_SMP */
+
+#ifdef CONFIG_PM
+static int mpic_suspend(struct sys_device *dev, pm_message_t state)
+{
+       struct mpic *mpic = container_of(dev, struct mpic, sysdev);
+       int i;
+
+       for (i = 0; i < mpic->num_sources; i++) {
+               mpic->save_data[i].vecprio =
+                       mpic_irq_read(i, MPIC_INFO(IRQ_VECTOR_PRI));
+               mpic->save_data[i].dest =
+                       mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION));
+       }
+
+       return 0;
+}
+
+static int mpic_resume(struct sys_device *dev)
+{
+       struct mpic *mpic = container_of(dev, struct mpic, sysdev);
+       int i;
+
+       for (i = 0; i < mpic->num_sources; i++) {
+               mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI),
+                              mpic->save_data[i].vecprio);
+               mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION),
+                              mpic->save_data[i].dest);
+
+#ifdef CONFIG_MPIC_U3_HT_IRQS
+       {
+               struct mpic_irq_fixup *fixup = &mpic->fixups[i];
+
+               if (fixup->base) {
+                       /* we use the lowest bit in an inverted meaning */
+                       if ((mpic->save_data[i].fixup_data & 1) == 0)
+                               continue;
+
+                       /* Enable and configure */
+                       writeb(0x10 + 2 * fixup->index, fixup->base + 2);
+
+                       writel(mpic->save_data[i].fixup_data & ~1,
+                              fixup->base + 4);
+               }
+       }
+#endif
+       } /* end for loop */
+
+       return 0;
+}
+#endif
+
+static struct sysdev_class mpic_sysclass = {
+#ifdef CONFIG_PM
+       .resume = mpic_resume,
+       .suspend = mpic_suspend,
+#endif
+       set_kset_name("mpic"),
+};
+
+static int mpic_init_sys(void)
+{
+       struct mpic *mpic = mpics;
+       int error, id = 0;
+
+       error = sysdev_class_register(&mpic_sysclass);
+
+       while (mpic && !error) {
+               mpic->sysdev.cls = &mpic_sysclass;
+               mpic->sysdev.id = id++;
+               error = sysdev_register(&mpic->sysdev);
+               mpic = mpic->next;
+       }
+       return error;
+}
+
+device_initcall(mpic_init_sys);