switch (len) {
case 1:
out_8(addr, val);
- (void) in_8(addr);
break;
case 2:
out_le16(addr, val);
- (void) in_le16(addr);
break;
default:
out_le32(addr, val);
- (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
static struct pci_ops u3_agp_pci_ops =
{
- u3_agp_read_config,
- u3_agp_write_config
+ .read = u3_agp_read_config,
+ .write = u3_agp_write_config,
};
static unsigned long u3_ht_cfa0(u8 devfn, u8 off)
switch (len) {
case 1:
out_8(addr, val);
- (void) in_8(addr);
break;
case 2:
out_le16(addr, val);
- (void) in_le16(addr);
break;
default:
out_le32(addr, val);
- (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
static struct pci_ops u3_ht_pci_ops =
{
- u3_ht_read_config,
- u3_ht_write_config
+ .read = u3_ht_read_config,
+ .write = u3_ht_write_config,
};
static unsigned int u4_pcie_cfa0(unsigned int devfn, unsigned int off)
switch (len) {
case 1:
out_8(addr, val);
- (void) in_8(addr);
break;
case 2:
out_le16(addr, val);
- (void) in_le16(addr);
break;
default:
out_le32(addr, val);
- (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
static struct pci_ops u4_pcie_pci_ops =
{
- u4_pcie_read_config,
- u4_pcie_write_config
+ .read = u4_pcie_read_config,
+ .write = u4_pcie_write_config,
};
static void __init setup_u3_agp(struct pci_controller* hose)
u3_ht = hose;
}
-static int __init add_bridge(struct device_node *dev)
+static int __init maple_add_bridge(struct device_node *dev)
{
int len;
struct pci_controller *hose;
/* Fixup "bus-range" OF property */
fixup_bus_range(dev);
+ /* Check for legacy IOs */
+ isa_bridge_find_early(hose);
+
return 0;
}
DBG(" <- maple_pci_irq_fixup\n");
}
-static void __init maple_fixup_phb_resources(void)
-{
- struct pci_controller *hose, *tmp;
-
- list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
- unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
-
- hose->io_resource.start += offset;
- hose->io_resource.end += offset;
-
- printk(KERN_INFO "PCI Host %d, io start: %llx; io end: %llx\n",
- hose->global_number,
- (unsigned long long)hose->io_resource.start,
- (unsigned long long)hose->io_resource.end);
- }
-}
-
void __init maple_pci_init(void)
{
struct device_node *np, *root;
continue;
if ((of_device_is_compatible(np, "u4-pcie") ||
of_device_is_compatible(np, "u3-agp")) &&
- add_bridge(np) == 0)
+ maple_add_bridge(np) == 0)
of_node_get(np);
if (of_device_is_compatible(np, "u3-ht")) {
/* Now setup the HyperTransport host if we found any
*/
- if (ht && add_bridge(ht) != 0)
+ if (ht && maple_add_bridge(ht) != 0)
of_node_put(ht);
- /*
- * We need to call pci_setup_phb_io for the HT bridge first
- * so it gets the I/O port numbers starting at 0, and we
- * need to call it for the AGP bridge after that so it gets
- * small positive I/O port numbers.
- */
- if (u3_ht)
- pci_setup_phb_io(u3_ht, 1);
- if (u3_agp)
- pci_setup_phb_io(u3_agp, 0);
- if (u4_pcie)
- pci_setup_phb_io(u4_pcie, 0);
-
- /* Fixup the IO resources on our host bridges as the common code
- * does it only for childs of the host bridges
- */
- maple_fixup_phb_resources();
-
/* Setup the linkage between OF nodes and PHBs */
pci_devs_phb_init();
* safe assumptions hopefully.
*/
if (u3_agp) {
- struct device_node *np = u3_agp->arch_data;
+ struct device_node *np = u3_agp->dn;
PCI_DN(np)->busno = 0xf0;
for (np = np->child; np; np = np->sibling)
PCI_DN(np)->busno = 0xf0;
}
return irq;
}
-
-/* XXX: To remove once all firmwares are ok */
-static void fixup_maple_ide(struct pci_dev* dev)
-{
- if (!machine_is(maple))
- return;
-
-#if 0 /* Enable this to enable IDE port 0 */
- {
- u8 v;
-
- pci_read_config_byte(dev, 0x40, &v);
- v |= 2;
- pci_write_config_byte(dev, 0x40, v);
- }
-#endif
-#if 0 /* fix bus master base */
- pci_write_config_dword(dev, 0x20, 0xcc01);
- printk("old ide resource: %lx -> %lx \n",
- dev->resource[4].start, dev->resource[4].end);
- dev->resource[4].start = 0xcc00;
- dev->resource[4].end = 0xcc10;
-#endif
-#if 0 /* Enable this to fixup IDE sense/polarity of irqs in IO-APICs */
- {
- struct pci_dev *apicdev;
- u32 v;
-
- apicdev = pci_get_slot (dev->bus, PCI_DEVFN(5,0));
- if (apicdev == NULL)
- printk("IDE Fixup IRQ: Can't find IO-APIC !\n");
- else {
- pci_write_config_byte(apicdev, 0xf2, 0x10 + 2*14);
- pci_read_config_dword(apicdev, 0xf4, &v);
- v &= ~0x00000022;
- pci_write_config_dword(apicdev, 0xf4, v);
- pci_write_config_byte(apicdev, 0xf2, 0x10 + 2*15);
- pci_read_config_dword(apicdev, 0xf4, &v);
- v &= ~0x00000022;
- pci_write_config_dword(apicdev, 0xf4, v);
- pci_dev_put(apicdev);
- }
- }
-#endif
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_IDE,
- fixup_maple_ide);