#ifndef CBE_REGS_H
#define CBE_REGS_H
+#include <asm/cell-pmu.h>
+
/*
*
* Some HID register definitions
*
*/
-/* Macros for the pm_control register. */
-#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
-#define CBE_PM_ENABLE_PERF_MON 0x80000000
-
-
union spe_reg {
u64 val;
u8 spe[8];
* counters currently have a value waiting to be written.
*/
-#define NR_PHYS_CTRS 4
-#define NR_CTRS (NR_PHYS_CTRS * 2)
-
struct cbe_pmd_shadow_regs {
u32 group_control;
u32 debug_bus_control;
struct cbe_iic_thread_regs thread[2]; /* 0x0400 */
u64 iic_ir; /* 0x0440 */
+#define CBE_IIC_IR_PRIO(x) (((x) & 0xf) << 12)
+#define CBE_IIC_IR_DEST_NODE(x) (((x) & 0xf) << 4)
+#define CBE_IIC_IR_DEST_UNIT(x) ((x) & 0xf)
+#define CBE_IIC_IR_IOC_0 0x0
+#define CBE_IIC_IR_IOC_1S 0xb
+#define CBE_IIC_IR_PT_0 0xe
+#define CBE_IIC_IR_PT_1 0xf
+
u64 iic_is; /* 0x0448 */
#define CBE_IIC_IS_PMI 0x2