]> err.no Git - linux-2.6/blobdiff - arch/powerpc/kernel/process.c
[PACKET]: Fix sparse warnings in af_packet.c
[linux-2.6] / arch / powerpc / kernel / process.c
index 15998b57767c8c034a79b02c1726b624ab5144bf..b9d88374f14f07abe21e51367110e6c82129ba99 100644 (file)
@@ -149,10 +149,32 @@ void flush_altivec_to_thread(struct task_struct *tsk)
        }
 }
 
-int dump_task_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs)
+int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
 {
-       flush_altivec_to_thread(current);
-       memcpy(vrregs, &current->thread.vr[0], sizeof(*vrregs));
+       /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
+        * separately, see below */
+       const int nregs = ELF_NVRREG - 2;
+       elf_vrreg_t *reg;
+       u32 *dest;
+
+       if (tsk == current)
+               flush_altivec_to_thread(tsk);
+
+       reg = (elf_vrreg_t *)vrregs;
+
+       /* copy the 32 vr registers */
+       memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg));
+       reg += nregs;
+
+       /* copy the vscr */
+       memcpy(reg, &tsk->thread.vscr, sizeof(*reg));
+       reg++;
+
+       /* vrsave is stored in the high 32bit slot of the final 128bits */
+       memset(reg, 0, sizeof(*reg));
+       dest = (u32 *)reg;
+       *dest = tsk->thread.vrsave;
+
        return 1;
 }
 #endif /* CONFIG_ALTIVEC */
@@ -437,7 +459,7 @@ void show_regs(struct pt_regs * regs)
                printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
 #endif
        printk("TASK = %p[%d] '%s' THREAD: %p",
-              current, current->pid, current->comm, task_thread_info(current));
+              current, task_pid_nr(current), current->comm, task_thread_info(current));
 
 #ifdef CONFIG_SMP
        printk(" CPU: %d", smp_processor_id());
@@ -564,10 +586,15 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
 
 #ifdef CONFIG_PPC64
        if (cpu_has_feature(CPU_FTR_SLB)) {
-               unsigned long sp_vsid = get_kernel_vsid(sp);
+               unsigned long sp_vsid;
                unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
 
-               sp_vsid <<= SLB_VSID_SHIFT;
+               if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
+                       sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
+                               << SLB_VSID_SHIFT_1T;
+               else
+                       sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
+                               << SLB_VSID_SHIFT;
                sp_vsid |= SLB_VSID_KERNEL | llp;
                p->thread.ksp_vsid = sp_vsid;
        }