dma_addr_t *dma_handle, gfp_t flag)
{
return iommu_alloc_coherent(device_to_table(hwdev), size, dma_handle,
- device_to_mask(hwdev), flag);
+ device_to_mask(hwdev), flag,
+ pcibus_to_node(to_pci_dev(hwdev)->bus));
}
static void pci_iommu_free_coherent(struct device *hwdev, size_t size,
return 1;
}
+struct dma_mapping_ops pci_iommu_ops = {
+ .alloc_coherent = pci_iommu_alloc_coherent,
+ .free_coherent = pci_iommu_free_coherent,
+ .map_single = pci_iommu_map_single,
+ .unmap_single = pci_iommu_unmap_single,
+ .map_sg = pci_iommu_map_sg,
+ .unmap_sg = pci_iommu_unmap_sg,
+ .dma_supported = pci_iommu_dma_supported,
+};
+
void pci_iommu_init(void)
{
- pci_dma_ops.alloc_coherent = pci_iommu_alloc_coherent;
- pci_dma_ops.free_coherent = pci_iommu_free_coherent;
- pci_dma_ops.map_single = pci_iommu_map_single;
- pci_dma_ops.unmap_single = pci_iommu_unmap_single;
- pci_dma_ops.map_sg = pci_iommu_map_sg;
- pci_dma_ops.unmap_sg = pci_iommu_unmap_sg;
- pci_dma_ops.dma_supported = pci_iommu_dma_supported;
+ pci_dma_ops = pci_iommu_ops;
}