* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright 2008 Freescale Semiconductor, Inc.
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
*/
+/dts-v1/;
+
/ {
model = "KuroboxHG";
compatible = "linkstation";
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
- reg = <0>;
- clock-frequency = <fdad680>; /* Fixed by bootloader */
- timebase-frequency = <1F04000>; /* Fixed by bootloader */
+ reg = <0x0>;
+ clock-frequency = <266000000>; /* Fixed by bootloader */
+ timebase-frequency = <32522240>; /* Fixed by bootloader */
bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
- i-cache-size = <4000>;
- d-cache-size = <4000>;
+ i-cache-size = <0x4000>;
+ d-cache-size = <0x4000>;
};
};
memory {
device_type = "memory";
- reg = <00000000 08000000>;
+ reg = <0x0 0x8000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
- reg = <80000000 00100000>;
- ranges = <80000000 80000000 70000000 /* pci mem space */
- fc000000 fc000000 00100000 /* EUMB */
- fe000000 fe000000 00c00000 /* pci i/o space */
- fec00000 fec00000 00300000 /* pci cfg regs */
- fef00000 fef00000 00100000>; /* pci iack */
+ reg = <0x80000000 0x100000>;
+ ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
+ 0xfc000000 0xfc000000 0x100000 /* EUMB */
+ 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
+ 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
+ 0xfef00000 0xfef00000 0x100000>; /* pci iack */
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
- reg = <80003000 1000>;
+ reg = <0x80003000 0x1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
- compatible = "ricoh,rs5c372b";
- reg = <32>;
+ compatible = "ricoh,rs5c372a";
+ reg = <0x32>;
};
};
- serial@80004500 {
+ serial0: serial@80004500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <80004500 8>;
- clock-frequency = <7c044a8>;
- current-speed = <2580>;
- interrupts = <9 2>;
+ reg = <0x80004500 0x8>;
+ clock-frequency = <130041000>;
+ current-speed = <9600>;
+ interrupts = <9 0>;
interrupt-parent = <&mpic>;
};
- serial@80004600 {
+ serial1: serial@80004600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <80004600 8>;
- clock-frequency = <7c044a8>;
- current-speed = <e100>;
- interrupts = <a 0>;
+ reg = <0x80004600 0x8>;
+ clock-frequency = <130041000>;
+ current-speed = <57600>;
+ interrupts = <10 0>;
interrupt-parent = <&mpic>;
};
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
- reg = <80040000 40000>;
- built-in;
+ reg = <0x80040000 0x40000>;
};
- pci@fec00000 {
+ pci0: pci@fec00000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
- reg = <fec00000 400000>;
- ranges = <01000000 0 0 fe000000 0 00c00000
- 02000000 0 80000000 80000000 0 70000000>;
- bus-range = <0 ff>;
- clock-frequency = <7f28155>;
+ reg = <0xfec00000 0x400000>;
+ ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
+ 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
+ bus-range = <0 255>;
+ clock-frequency = <133333333>;
interrupt-parent = <&mpic>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
- 5800 0 0 1 &mpic 0 1
- 5800 0 0 2 &mpic 1 1
- 5800 0 0 3 &mpic 2 1
- 5800 0 0 4 &mpic 3 1
+ 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 12 - IRQ1 IDE0 */
- 6000 0 0 1 &mpic 1 1
- 6000 0 0 2 &mpic 2 1
- 6000 0 0 3 &mpic 3 1
- 6000 0 0 4 &mpic 0 1
+ 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
+ 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
+ 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
/* IDSEL 14 - IRQ3 USB2.0 */
- 7000 0 0 1 &mpic 3 1
- 7000 0 0 2 &mpic 3 1
- 7000 0 0 3 &mpic 3 1
- 7000 0 0 4 &mpic 3 1
+ 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
>;
};
};