[MIPS] Fix "no space between function name and open parenthesis" warnings.

[linux-2.6] / arch / mips / math-emu / cp1emu.c

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index aa5818a0d8848f7b6bb863aafee6b54ab74fd97c..c44e9cc2b19ca84875a12a659570ee88ac48308a 100644 (file)
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -35,11 +35,10 @@
  * better performance by compiling with -msoft-float!
  */
 #include <linux/sched.h>
+#include <linux/debugfs.h>
 
 #include <asm/inst.h>
 #include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/cpu-features.h>
 #include <asm/processor.h>
 #include <asm/ptrace.h>
 #include <asm/signal.h>
@@ -60,15 +59,15 @@
 
 /* Function which emulates a floating point instruction. */
 
-static int fpu_emu(struct pt_regs *, struct mips_fpu_soft_struct *,
+static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
        mips_instruction);
 
 #if __mips >= 4 && __mips != 32
 static int fpux_emu(struct pt_regs *,
-       struct mips_fpu_soft_struct *, mips_instruction);
+       struct mips_fpu_struct *, mips_instruction);
 #endif
 
-/* Further private data for which no space exists in mips_fpu_soft_struct */
+/* Further private data for which no space exists in mips_fpu_struct */
 
 struct mips_fpu_emulator_stats fpuemustats;
 
@@ -203,10 +202,10 @@ static int isBranchInstr(mips_instruction * i)
  * Two instructions if the instruction is in a branch delay slot.
  */
 
-static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
+static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
 {
        mips_instruction ir;
-       void * emulpc, *contpc;
+       unsigned long emulpc, contpc;
        unsigned int cond;
 
        if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) {
@@ -231,7 +230,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
                 * Linux MIPS branch emulator operates on context, updating the
                 * cp0_epc.
                 */
-               emulpc = (void *) (xcp->cp0_epc + 4);   /* Snapshot emulation target */
+               emulpc = xcp->cp0_epc + 4;      /* Snapshot emulation target */
 
                if (__compute_return_epc(xcp)) {
 #ifdef CP1DBG
@@ -245,12 +244,12 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
                        return SIGBUS;
                }
                /* __compute_return_epc() will have updated cp0_epc */
-               contpc = (void *)  xcp->cp0_epc;
+               contpc = xcp->cp0_epc;
                /* In order not to confuse ptrace() et al, tweak context */
-               xcp->cp0_epc = (unsigned long) emulpc - 4;
+               xcp->cp0_epc = emulpc - 4;
        } else {
-               emulpc = (void *)  xcp->cp0_epc;
-               contpc = (void *) (xcp->cp0_epc + 4);
+               emulpc = xcp->cp0_epc;
+               contpc = xcp->cp0_epc + 4;
        }
 
       emul:
@@ -428,8 +427,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
                                 * instruction
                                 */
                                xcp->cp0_epc += 4;
-                               contpc = (void *)
-                                       (xcp->cp0_epc +
+                               contpc = (xcp->cp0_epc +
                                        (MIPSInst_SIMM(ir) << 2));
 
                                if (get_user(ir,
@@ -463,7 +461,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
                                 * Single step the non-cp1
                                 * instruction in the dslot
                                 */
-                               return mips_dsemul(xcp, ir, (unsigned long) contpc);
+                               return mips_dsemul(xcp, ir, contpc);
                        }
                        else {
                                /* branch not taken */
@@ -522,7 +520,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
        }
 
        /* we did it !! */
-       xcp->cp0_epc = (unsigned long) contpc;
+       xcp->cp0_epc = contpc;
        xcp->cp0_cause &= ~CAUSEF_BD;
 
        return 0;
@@ -551,16 +549,16 @@ static const unsigned char cmptab[8] = {
  */
 
 #define DEF3OP(name, p, f1, f2, f3) \
-static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
+static ieee754##p fpemu_##p##_##name(ieee754##p r, ieee754##p s, \
     ieee754##p t) \
 { \
        struct _ieee754_csr ieee754_csr_save; \
-       s = f1 (s, t); \
+       s = f1(s, t); \
        ieee754_csr_save = ieee754_csr; \
-       s = f2 (s, r); \
+       s = f2(s, r); \
        ieee754_csr_save.cx |= ieee754_csr.cx; \
        ieee754_csr_save.sx |= ieee754_csr.sx; \
-       s = f3 (s); \
+       s = f3(s); \
        ieee754_csr.cx |= ieee754_csr_save.cx; \
        ieee754_csr.sx |= ieee754_csr_save.sx; \
        return s; \
@@ -595,7 +593,7 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,);
 DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
 DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
 
-static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
        mips_instruction ir)
 {
        unsigned rcsr = 0;      /* resulting csr */
@@ -759,7 +757,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
 /*
  * Emulate a single COP1 arithmetic instruction.
  */
-static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
        mips_instruction ir)
 {
        int rfmt;               /* resulting format */
@@ -1233,8 +1231,8 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
        return 0;
 }
 
-int fpu_emulator_cop1Handler(struct pt_regs *xcp,
-       struct mips_fpu_soft_struct *ctx)
+int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+       int has_fpu)
 {
        unsigned long oldepc, prevepc;
        mips_instruction insn;
@@ -1264,7 +1262,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp,
                        ieee754_csr.rm = mips_rm[ieee754_csr.rm];
                }
 
-               if (cpu_has_fpu)
+               if (has_fpu)
                        break;
                if (sig)
                        break;
@@ -1279,3 +1277,36 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp,
 
        return sig;
 }
+
+#ifdef CONFIG_DEBUG_FS
+extern struct dentry *mips_debugfs_dir;
+static int __init debugfs_fpuemu(void)
+{
+       struct dentry *d, *dir;
+       int i;
+       static struct {
+               const char *name;
+               unsigned int *v;
+       } vars[] __initdata = {
+               { "emulated", &fpuemustats.emulated },
+               { "loads",    &fpuemustats.loads },
+               { "stores",   &fpuemustats.stores },
+               { "cp1ops",   &fpuemustats.cp1ops },
+               { "cp1xops",  &fpuemustats.cp1xops },
+               { "errors",   &fpuemustats.errors },
+       };
+
+       if (!mips_debugfs_dir)
+               return -ENODEV;
+       dir = debugfs_create_dir("fpuemustats", mips_debugfs_dir);
+       if (IS_ERR(dir))
+               return PTR_ERR(dir);
+       for (i = 0; i < ARRAY_SIZE(vars); i++) {
+               d = debugfs_create_u32(vars[i].name, S_IRUGO, dir, vars[i].v);
+               if (IS_ERR(d))
+                       return PTR_ERR(d);
+       }
+       return 0;
+}
+__initcall(debugfs_fpuemu);
+#endif