#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/unistd.h>
+#include <asm/sn/arch.h>
#define SMP_DEBUG 0
{
}
-static void __devinit
+static void __cpuinit
smp_callin (void)
{
int cpuid, phys_id, itc_master;
fix_b0_for_bsp();
lock_ipi_calllock();
+ spin_lock(&vector_lock);
+ /* Setup the per cpu irq handling data structures */
+ __setup_vector_irq(cpuid);
cpu_set(cpuid, cpu_online_map);
unlock_ipi_calllock();
per_cpu(cpu_state, cpuid) = CPU_ONLINE;
+ spin_unlock(&vector_lock);
smp_setup_percpu_timer();
/*
* Activate a secondary processor. head.S calls this.
*/
-int __devinit
+int __cpuinit
start_secondary (void *unused)
{
/* Early console may use I/O ports */
int cpu;
};
-void
+void __cpuinit
do_fork_idle(struct work_struct *work)
{
struct create_idle *c_idle =
complete(&c_idle->done);
}
-static int __devinit
+static int __cpuinit
do_boot_cpu (int sapicid, int cpu)
{
int timeout;
set_cpei_target_cpu(new_cpei_cpu);
desc = irq_desc + ia64_cpe_irq;
/*
- * Switch for now, immediatly, we need to do fake intr
+ * Switch for now, immediately, we need to do fake intr
* as other interrupts, but need to study CPEI behaviour with
* polling before making changes.
*/
return (-EBUSY);
}
+ if (ia64_platform_is("sn2")) {
+ if (!sn_cpu_disable_allowed(cpu))
+ return -EBUSY;
+ }
+
cpu_clear(cpu, cpu_online_map);
if (migrate_platform_irqs(cpu)) {
}
}
-int __devinit
+int __cpuinit
__cpu_up (unsigned int cpu)
{
int ret;
}
/*
- * Assume that CPU's have been discovered by some platform-dependent interface. For
+ * Assume that CPUs have been discovered by some platform-dependent interface. For
* SoftSDV/Lion, that would be ACPI.
*
* Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
} *ap_startup;
long sal_ret;
- /* Tell SAL where to drop the AP's. */
+ /* Tell SAL where to drop the APs. */
ap_startup = (struct fptr *) start_ap;
sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);