Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.25

[linux-2.6] / arch / ia64 / kernel / setup.c

diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index ebd1a09f32016b870ccb758dac93f1ade566f866..4aa9eaea76c373bcab89dfa1d058984272030456 100644 (file)
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -690,7 +690,7 @@ get_model_name(__u8 family, __u8 model)
        if (overflow++ == 0)
                printk(KERN_ERR
                       "%s: Table overflow. Some processor model information will be missing\n",
-                      __FUNCTION__);
+                      __func__);
        return "Unknown";
 }
 
@@ -785,7 +785,7 @@ get_max_cacheline_size (void)
         status = ia64_pal_cache_summary(&levels, &unique_caches);
         if (status != 0) {
                 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
-                       __FUNCTION__, status);
+                       __func__, status);
                 max = SMP_CACHE_BYTES;
                /* Safest setup for "flush_icache_range()" */
                ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
@@ -798,7 +798,7 @@ get_max_cacheline_size (void)
                if (status != 0) {
                        printk(KERN_ERR
                               "%s: ia64_pal_cache_config_info(l=%lu, 2) failed (status=%ld)\n",
-                              __FUNCTION__, l, status);
+                              __func__, l, status);
                        max = SMP_CACHE_BYTES;
                        /* The safest setup for "flush_icache_range()" */
                        cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
@@ -814,7 +814,7 @@ get_max_cacheline_size (void)
                        if (status != 0) {
                                printk(KERN_ERR
                                "%s: ia64_pal_cache_config_info(l=%lu, 1) failed (status=%ld)\n",
-                                       __FUNCTION__, l, status);
+                                       __func__, l, status);
                                /* The safest setup for "flush_icache_range()" */
                                cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
                        }