/spare/repo/netdev-2.6 branch 'e100'

[linux-2.6] / arch / i386 / power / cpu.c

diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index cf337c673d92a23d2d3ed339ec6e3065998a0a5e..c547c1af6fa1a86ea8e25f4dd62332c3f3302faa 100644 (file)
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -22,9 +22,11 @@
 #include <linux/device.h>
 #include <linux/suspend.h>
 #include <linux/acpi.h>
+
 #include <asm/uaccess.h>
 #include <asm/acpi.h>
 #include <asm/tlbflush.h>
+#include <asm/processor.h>
 
 static struct saved_context saved_context;
 
@@ -33,8 +35,6 @@ unsigned long saved_context_esp, saved_context_ebp;
 unsigned long saved_context_esi, saved_context_edi;
 unsigned long saved_context_eflags;
 
-extern void enable_sep_cpu(void *);
-
 void __save_processor_state(struct saved_context *ctxt)
 {
        kernel_fpu_begin();
@@ -44,7 +44,6 @@ void __save_processor_state(struct saved_context *ctxt)
         */
        asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
        asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
-       asm volatile ("sldt %0" : "=m" (ctxt->ldt));
        asm volatile ("str %0"  : "=m" (ctxt->tr));
 
        /*
@@ -94,20 +93,19 @@ static void fix_processor_context(void)
         * Now maybe reload the debug registers
         */
        if (current->thread.debugreg[7]){
-                loaddebug(&current->thread, 0);
-                loaddebug(&current->thread, 1);
-                loaddebug(&current->thread, 2);
-                loaddebug(&current->thread, 3);
-                /* no 4 and 5 */
-                loaddebug(&current->thread, 6);
-                loaddebug(&current->thread, 7);
+               set_debugreg(current->thread.debugreg[0], 0);
+               set_debugreg(current->thread.debugreg[1], 1);
+               set_debugreg(current->thread.debugreg[2], 2);
+               set_debugreg(current->thread.debugreg[3], 3);
+               /* no 4 and 5 */
+               set_debugreg(current->thread.debugreg[6], 6);
+               set_debugreg(current->thread.debugreg[7], 7);
        }
 
 }
 
 void __restore_processor_state(struct saved_context *ctxt)
 {
-
        /*
         * control registers
         */
@@ -116,6 +114,13 @@ void __restore_processor_state(struct saved_context *ctxt)
        asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2));
        asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0));
 
+       /*
+        * now restore the descriptor tables to their proper values
+        * ltr is done i fix_processor_context().
+        */
+       asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
+       asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
+
        /*
         * segment registers
         */
@@ -124,22 +129,15 @@ void __restore_processor_state(struct saved_context *ctxt)
        asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs));
        asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
 
-       /*
-        * now restore the descriptor tables to their proper values
-        * ltr is done i fix_processor_context().
-        */
-       asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
-       asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
-       asm volatile ("lldt %0" :: "m" (ctxt->ldt));
-
        /*
         * sysenter MSRs
         */
        if (boot_cpu_has(X86_FEATURE_SEP))
-               enable_sep_cpu(NULL);
+               enable_sep_cpu();
 
        fix_processor_context();
        do_fpu_end();
+       mtrr_ap_init();
 }
 
 void restore_processor_state(void)