Merge master.kernel.org:/home/rmk/linux-2.6-arm

[linux-2.6] / arch / i386 / power / cpu.c

diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index 4e19c43e09541bbbb3d429bdcbd1acd0556d3ea2..b27c5acc79d01fbd5ef053add840609bb4215365 100644 (file)
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -8,25 +8,8 @@
  */
 
 #include <linux/config.h>
-#include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/spinlock.h>
-#include <linux/poll.h>
-#include <linux/delay.h>
-#include <linux/sysrq.h>
-#include <linux/proc_fs.h>
-#include <linux/irq.h>
-#include <linux/pm.h>
-#include <linux/device.h>
 #include <linux/suspend.h>
-#include <linux/acpi.h>
-
-#include <asm/uaccess.h>
-#include <asm/acpi.h>
-#include <asm/tlbflush.h>
-#include <asm/processor.h>
 
 static struct saved_context saved_context;
 
@@ -42,17 +25,17 @@ void __save_processor_state(struct saved_context *ctxt)
        /*
         * descriptor tables
         */
-       asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
-       asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
-       asm volatile ("str %0"  : "=m" (ctxt->tr));
+       store_gdt(&ctxt->gdt_limit);
+       store_idt(&ctxt->idt_limit);
+       store_tr(ctxt->tr);
 
        /*
         * segment registers
         */
-       asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
-       asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
-       asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));
-       asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));
+       savesegment(es, ctxt->es);
+       savesegment(fs, ctxt->fs);
+       savesegment(gs, ctxt->gs);
+       savesegment(ss, ctxt->ss);
 
        /*
         * control registers 
@@ -84,7 +67,6 @@ static void fix_processor_context(void)
        struct tss_struct * t = &per_cpu(init_tss, cpu);
 
        set_tss_desc(cpu,t);    /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
-        per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;
 
        load_TR_desc();                         /* This does ltr */
        load_LDT(&current->active_mm->context); /* This does lldt */
@@ -118,16 +100,16 @@ void __restore_processor_state(struct saved_context *ctxt)
         * now restore the descriptor tables to their proper values
         * ltr is done i fix_processor_context().
         */
-       asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
-       asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
+       load_gdt(&ctxt->gdt_limit);
+       load_idt(&ctxt->idt_limit);
 
        /*
         * segment registers
         */
-       asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
-       asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));
-       asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs));
-       asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
+       loadsegment(es, ctxt->es);
+       loadsegment(fs, ctxt->fs);
+       loadsegment(gs, ctxt->gs);
+       loadsegment(ss, ctxt->ss);
 
        /*
         * sysenter MSRs