]> err.no Git - linux-2.6/blobdiff - arch/i386/kernel/cpu/amd.c
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...
[linux-2.6] / arch / i386 / kernel / cpu / amd.c
index 2d47db48297218ee61c6b7b09576aa538561e97a..c7ba455d5ac77d97747f1c13a4f5ac6737bfb48d 100644 (file)
@@ -53,6 +53,8 @@ static __cpuinit int amd_apic_timer_broken(void)
        return 0;
 }
 
+int force_mwait __cpuinitdata;
+
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 {
        u32 l, h;
@@ -229,6 +231,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 
        switch (c->x86) {
        case 15:
+       /* Use K8 tuning for Fam10h and Fam11h */
+       case 0x10:
+       case 0x11:
                set_bit(X86_FEATURE_K8, c->x86_capability);
                break;
        case 6:
@@ -270,11 +275,22 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
        }
 #endif
 
-       if (cpuid_eax(0x80000000) >= 0x80000006)
-               num_cache_leaves = 3;
+       if (cpuid_eax(0x80000000) >= 0x80000006) {
+               if ((c->x86 == 0x10) && (cpuid_edx(0x80000006) & 0xf000))
+                       num_cache_leaves = 4;
+               else
+                       num_cache_leaves = 3;
+       }
 
        if (amd_apic_timer_broken())
                set_bit(X86_FEATURE_LAPIC_TIMER_BROKEN, c->x86_capability);
+
+       if (c->x86 == 0x10 && !force_mwait)
+               clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
+
+       /* K6s reports MCEs but don't actually have all the MSRs */
+       if (c->x86 < 6)
+               clear_bit(X86_FEATURE_MCE, c->x86_capability);
 }
 
 static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
@@ -314,13 +330,3 @@ int __init amd_init_cpu(void)
        cpu_devs[X86_VENDOR_AMD] = &amd_cpu_dev;
        return 0;
 }
-
-//early_arch_initcall(amd_init_cpu);
-
-static int __init amd_exit_cpu(void)
-{
-       cpu_devs[X86_VENDOR_AMD] = NULL;
-       return 0;
-}
-
-late_initcall(amd_exit_cpu);