.text
-#ifdef CONFIG_BLKFIN_CACHE_LOCK
+#ifdef CONFIG_BFIN_ICACHE_LOCK
/* When you come here, it is assumed that
* R0 - Which way to be locked
[--SP]=( R7:0,P5:0 );
- P1.H = (IMEM_CONTROL >> 16);
- P1.L = (IMEM_CONTROL & 0xFFFF);
- P5.H = (ICPLB_ADDR0 >> 16);
- P5.L = (ICPLB_ADDR0 & 0xFFFF);
- P4.H = (ICPLB_DATA0 >> 16);
- P4.L = (ICPLB_DATA0 & 0xFFFF);
+ P1.H = HI(IMEM_CONTROL);
+ P1.L = LO(IMEM_CONTROL);
+ P5.H = HI(ICPLB_ADDR0);
+ P5.L = LO(ICPLB_ADDR0);
+ P4.H = HI(ICPLB_DATA0);
+ P4.L = LO(ICPLB_DATA0);
R7 = R0;
/* If the code of interest already resides in the cache
( R7:0,P5:0 ) = [SP++];
RTS;
+ENDPROC(_cache_grab_lock)
/* After the execution of critical code, the code is now locked into
* the cache way. Now we need to set ILOC.
[--SP]=( R7:0,P5:0 );
- P1.H = (IMEM_CONTROL >> 16);
- P1.L = (IMEM_CONTROL & 0xFFFF);
+ P1.H = HI(IMEM_CONTROL);
+ P1.L = LO(IMEM_CONTROL);
/* Disable the Interrupts*/
CLI R3;
( R7:0,P5:0 ) = [SP++];
RTS;
+ENDPROC(_cache_lock)
-#endif /* BLKFIN_CACHE_LOCK */
+#endif /* BFIN_ICACHE_LOCK */
/* Return the ILOC bits of IMEM_CONTROL
*/
ENTRY(_read_iloc)
-
- P1.H = (IMEM_CONTROL >> 16);
- P1.L = (IMEM_CONTROL & 0xFFFF);
+ P1.H = HI(IMEM_CONTROL);
+ P1.L = LO(IMEM_CONTROL);
R1 = 0xF;
R0 = [P1];
R0 = R0 >> 3;
R0 = R0 & R1;
RTS;
+ENDPROC(_read_iloc)