[ARM] 3739/1: genirq updates: irq_chip, add and use irq_chip.name

[linux-2.6] / arch / arm / plat-omap / gpio.c

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index cd1e508f90c18d99ec0eb1c2d49f86b638179478..cd7f973fb286618e23c1370dd56b532e9b5cbc15 100644 (file)
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -11,7 +11,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/sched.h>
@@ -540,29 +539,44 @@ static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
 static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
 {
        void __iomem *reg = bank->base;
+       int inv = 0;
+       u32 l;
+       u32 mask;
 
        switch (bank->method) {
        case METHOD_MPUIO:
                reg += OMAP_MPUIO_GPIO_MASKIT;
+               mask = 0xffff;
+               inv = 1;
                break;
        case METHOD_GPIO_1510:
                reg += OMAP1510_GPIO_INT_MASK;
+               mask = 0xffff;
+               inv = 1;
                break;
        case METHOD_GPIO_1610:
                reg += OMAP1610_GPIO_IRQENABLE1;
+               mask = 0xffff;
                break;
        case METHOD_GPIO_730:
                reg += OMAP730_GPIO_INT_MASK;
+               mask = 0xffffffff;
+               inv = 1;
                break;
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_IRQENABLE1;
+               mask = 0xffffffff;
                break;
        default:
                BUG();
                return 0;
        }
 
-       return __raw_readl(reg);
+       l = __raw_readl(reg);
+       if (inv)
+               l = ~l;
+       l &= mask;
+       return l;
 }
 
 static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable)
@@ -769,7 +783,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
 
        desc->chip->ack(irq);
 
-       bank = (struct gpio_bank *) desc->data;
+       bank = get_irq_data(irq);
        if (bank->method == METHOD_MPUIO)
                isr_reg = bank->base + OMAP_MPUIO_GPIO_INT;
 #ifdef CONFIG_ARCH_OMAP15XX
@@ -836,7 +850,8 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
                        /* Don't run the handler if it's already running
                         * or was disabled lazely.
                         */
-                       if (unlikely((d->disable_depth || d->running))) {
+                       if (unlikely((d->depth ||
+                                     (d->status & IRQ_INPROGRESS)))) {
                                irq_mask = 1 <<
                                        (gpio_irq - bank->virtual_irq_start);
                                /* The unmasking will be done by
@@ -845,22 +860,22 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
                                 * it's already running.
                                 */
                                _enable_gpio_irqbank(bank, irq_mask, 0);
-                               if (!d->disable_depth) {
+                               if (!d->depth) {
                                        /* Level triggered interrupts
                                         * won't ever be reentered
                                         */
                                        BUG_ON(level_mask & irq_mask);
-                                       d->pending = 1;
+                                       d->status |= IRQ_PENDING;
                                }
                                continue;
                        }
-                       d->running = 1;
+
                        desc_handle_irq(gpio_irq, d, regs);
-                       d->running = 0;
-                       if (unlikely(d->pending && !d->disable_depth)) {
+
+                       if (unlikely((d->status & IRQ_PENDING) && !d->depth)) {
                                irq_mask = 1 <<
                                        (gpio_irq - bank->virtual_irq_start);
-                               d->pending = 0;
+                               d->status &= ~IRQ_PENDING;
                                _enable_gpio_irqbank(bank, irq_mask, 1);
                                retrigger |= irq_mask;
                        }
@@ -929,7 +944,8 @@ static void mpuio_unmask_irq(unsigned int irq)
        _set_gpio_irqenable(bank, gpio, 1);
 }
 
-static struct irqchip gpio_irq_chip = {
+static struct irq_chip gpio_irq_chip = {
+       .name           = "GPIO",
        .ack            = gpio_ack_irq,
        .mask           = gpio_mask_irq,
        .unmask         = gpio_unmask_irq,
@@ -937,10 +953,11 @@ static struct irqchip gpio_irq_chip = {
        .set_wake       = gpio_wake_enable,
 };
 
-static struct irqchip mpuio_irq_chip = {
+static struct irq_chip mpuio_irq_chip = {
+       .name   = "MPUIO",
        .ack    = mpuio_ack_irq,
        .mask   = mpuio_mask_irq,
-       .unmask = mpuio_unmask_irq
+       .unmask = mpuio_unmask_irq
 };
 
 static int initialized;