[POWERPC] 83xx: Add device tree source for Wind River SBC834x board.

[linux-2.6] / arch / arm / mach-pxa / time.c

diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 7916311547cad0f8a31e4543c0d5d6d846f4ce28..fbfa1920353d8c9c12ef5535342d8bb2b4b5f5fd 100644 (file)
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -23,6 +23,7 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/mach-types.h>
 
 /*
  * This is PXA's sched_clock implementation. This has a resolution
@@ -67,6 +68,7 @@ pxa_ost0_interrupt(int irq, void *dev_id)
        if (c->mode == CLOCK_EVT_MODE_ONESHOT) {
                /* Disarm the compare/match, signal the event. */
                OIER &= ~OIER_E0;
+               OSSR = OSSR_M0;
                c->event_handler(c);
        } else if (c->mode == CLOCK_EVT_MODE_PERIODIC) {
                /* Call the event handler as many times as necessary
@@ -99,9 +101,9 @@ pxa_ost0_interrupt(int irq, void *dev_id)
                 * anything that might put us "very close".
         */
 #define MIN_OSCR_DELTA 16
-       do {
+               do {
                        OSSR = OSSR_M0;
-               next_match = (OSMR0 += LATCH);
+                       next_match = (OSMR0 += LATCH);
                        c->event_handler(c);
                } while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA)
                         && (c->mode == CLOCK_EVT_MODE_PERIODIC));
@@ -113,14 +115,16 @@ pxa_ost0_interrupt(int irq, void *dev_id)
 static int
 pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
 {
-       unsigned long irqflags;
+       unsigned long flags, next, oscr;
 
-       raw_local_irq_save(irqflags);
-       OSMR0 = OSCR + delta;
-       OSSR = OSSR_M0;
+       raw_local_irq_save(flags);
        OIER |= OIER_E0;
-       raw_local_irq_restore(irqflags);
-       return 0;
+       next = OSCR + delta;
+       OSMR0 = next;
+       oscr = OSCR;
+       raw_local_irq_restore(flags);
+
+       return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
 
 static void
@@ -131,15 +135,16 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
        switch (mode) {
        case CLOCK_EVT_MODE_PERIODIC:
                raw_local_irq_save(irqflags);
-               OSMR0 = OSCR + LATCH;
                OSSR = OSSR_M0;
                OIER |= OIER_E0;
+               OSMR0 = OSCR + LATCH;
                raw_local_irq_restore(irqflags);
                break;
 
        case CLOCK_EVT_MODE_ONESHOT:
                raw_local_irq_save(irqflags);
                OIER &= ~OIER_E0;
+               OSSR = OSSR_M0;
                raw_local_irq_restore(irqflags);
                break;
 
@@ -148,8 +153,12 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
                /* initializing, released, or preparing for suspend */
                raw_local_irq_save(irqflags);
                OIER &= ~OIER_E0;
+               OSSR = OSSR_M0;
                raw_local_irq_restore(irqflags);
                break;
+
+       case CLOCK_EVT_MODE_RESUME:
+               break;
        }
 }
 
@@ -186,20 +195,29 @@ static struct irqaction pxa_ost0_irq = {
 
 static void __init pxa_timer_init(void)
 {
+       unsigned long clock_tick_rate;
+
        OIER = 0;
        OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-       set_oscr2ns_scale(CLOCK_TICK_RATE);
+       if (cpu_is_pxa21x() || cpu_is_pxa25x())
+               clock_tick_rate = 3686400;
+       else if (machine_is_mainstone())
+               clock_tick_rate = 3249600;
+       else
+               clock_tick_rate = 3250000;
+
+       set_oscr2ns_scale(clock_tick_rate);
 
        ckevt_pxa_osmr0.mult =
-               div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
+               div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
        ckevt_pxa_osmr0.max_delta_ns =
                clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
        ckevt_pxa_osmr0.min_delta_ns =
                clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1;
 
        cksrc_pxa_oscr0.mult =
-               clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_pxa_oscr0.shift);
+               clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
 
        setup_irq(IRQ_OST0, &pxa_ost0_irq);