Merge branch 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstrea...

[linux-2.6] / arch / arm / mach-ns9xxx / board-a9m9750dev.c

diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 25289884a6079d45a4df8b7ae7461865e251bde4..0f65177f9e5fafabcd897ee610915d1e4409d49a 100644 (file)
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -13,6 +13,7 @@
 #include <linux/irq.h>
 
 #include <asm/mach/map.h>
+#include <asm/gpio.h>
 
 #include <asm/arch-ns9xxx/board.h>
 #include <asm/arch-ns9xxx/regs-sys.h>
@@ -44,7 +45,13 @@ static void a9m9750dev_fpga_ack_irq(unsigned int irq)
 
 static void a9m9750dev_fpga_mask_irq(unsigned int irq)
 {
-       FPGA_IER &= ~(1 << (irq - FPGA_IRQ(0)));
+       u8 ier;
+
+       ier = __raw_readb(FPGA_IER);
+
+       ier &= ~(1 << (irq - FPGA_IRQ(0)));
+
+       __raw_writeb(ier, FPGA_IER);
 }
 
 static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
@@ -55,7 +62,13 @@ static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
 
 static void a9m9750dev_fpga_unmask_irq(unsigned int irq)
 {
-       FPGA_IER |= 1 << (irq - FPGA_IRQ(0));
+       u8 ier;
+
+       ier = __raw_readb(FPGA_IER);
+
+       ier |= 1 << (irq - FPGA_IRQ(0));
+
+       __raw_writeb(ier, FPGA_IER);
 }
 
 static struct irq_chip a9m9750dev_fpga_chip = {
@@ -68,30 +81,34 @@ static struct irq_chip a9m9750dev_fpga_chip = {
 static void a9m9750dev_fpga_demux_handler(unsigned int irq,
                struct irq_desc *desc)
 {
-       int stat = FPGA_ISR;
+       u8 stat = __raw_readb(FPGA_ISR);
+
+       desc->chip->mask_ack(irq);
 
        while (stat != 0) {
                int irqno = fls(stat) - 1;
+               struct irq_desc *fpgadesc;
 
                stat &= ~(1 << irqno);
 
-               desc = irq_desc + FPGA_IRQ(irqno);
+               fpgadesc = irq_desc + FPGA_IRQ(irqno);
 
-               desc_handle_irq(irqno, desc);
+               desc_handle_irq(FPGA_IRQ(irqno), fpgadesc);
        }
+
+       desc->chip->unmask(irq);
 }
 
 void __init board_a9m9750dev_init_irq(void)
 {
-       u32 reg;
+       u32 eic;
        int i;
 
-       /*
-        * configure gpio for IRQ_EXT2
-        * use GPIO 11, because GPIO 32 is used for the LCD
-        */
-       /* XXX: proper GPIO handling */
-       BBU_GC(2) &= ~0x2000;
+       if (gpio_request(11, "board a9m9750dev extirq2") == 0)
+               ns9xxx_gpio_configure(11, 0, 1);
+       else
+               printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n",
+                               __func__);
 
        for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
                set_irq_chip(i, &a9m9750dev_fpga_chip);
@@ -100,10 +117,10 @@ void __init board_a9m9750dev_init_irq(void)
        }
 
        /* IRQ_EXT2: level sensitive + active low */
-       reg = SYS_EIC(2);
-       REGSET(reg, SYS_EIC, PLTY, AL);
-       REGSET(reg, SYS_EIC, LVEDG, LEVEL);
-       SYS_EIC(2) = reg;
+       eic = __raw_readl(SYS_EIC(2));
+       REGSET(eic, SYS_EIC, PLTY, AL);
+       REGSET(eic, SYS_EIC, LVEDG, LEVEL);
+       __raw_writel(eic, SYS_EIC(2));
 
        set_irq_chained_handler(IRQ_EXT2,
                        a9m9750dev_fpga_demux_handler);
@@ -167,33 +184,33 @@ void __init board_a9m9750dev_init_machine(void)
        u32 reg;
 
        /* setup static CS0: memory base ... */
-       REGSETIM(SYS_SMCSSMB(0), SYS_SMCSSMB, CSxB,
-                       NS9XXX_CSxSTAT_PHYS(0) >> 12);
+       reg = __raw_readl(SYS_SMCSSMB(0));
+       REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12);
+       __raw_writel(reg, SYS_SMCSSMB(0));
 
        /* ... and mask */
-       reg = SYS_SMCSSMM(0);
+       reg = __raw_readl(SYS_SMCSSMM(0));
        REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff);
        REGSET(reg, SYS_SMCSSMM, CSEx, EN);
-       SYS_SMCSSMM(0) = reg;
+       __raw_writel(reg, SYS_SMCSSMM(0));
 
        /* setup static CS0: memory configuration */
-       reg = MEM_SMC(0);
-       REGSET(reg, MEM_SMC, WSMC, OFF);
+       reg = __raw_readl(MEM_SMC(0));
+       REGSET(reg, MEM_SMC, PSMC, OFF);
        REGSET(reg, MEM_SMC, BSMC, OFF);
        REGSET(reg, MEM_SMC, EW, OFF);
        REGSET(reg, MEM_SMC, PB, 1);
        REGSET(reg, MEM_SMC, PC, AL);
        REGSET(reg, MEM_SMC, PM, DIS);
        REGSET(reg, MEM_SMC, MW, 8);
-       MEM_SMC(0) = reg;
+       __raw_writel(reg, MEM_SMC(0));
 
        /* setup static CS0: timing */
-       MEM_SMWED(0) = 0x2;
-       MEM_SMOED(0) = 0x2;
-       MEM_SMRD(0) = 0x6;
-       MEM_SMWD(0) = 0x6;
+       __raw_writel(0x2, MEM_SMWED(0));
+       __raw_writel(0x2, MEM_SMOED(0));
+       __raw_writel(0x6, MEM_SMRD(0));
+       __raw_writel(0x6, MEM_SMWD(0));
 
        platform_add_devices(board_a9m9750dev_devices,
                        ARRAY_SIZE(board_a9m9750dev_devices));
 }
-