Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6

[linux-2.6] / arch / arm / mach-iop13xx / irq.c

diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index 5791addd436bd656c740df80716d2bc4df33ff86..69f07b25b3c9d752b364c718fbfc859a0c0d419e 100644 (file)
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -30,77 +30,65 @@
 
 /* INTCTL0 CP6 R0 Page 4
  */
-static inline u32 read_intctl_0(void)
+static u32 read_intctl_0(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val));
        return val;
 }
-static inline void write_intctl_0(u32 val)
+static void write_intctl_0(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val));
 }
 
 /* INTCTL1 CP6 R1 Page 4
  */
-static inline u32 read_intctl_1(void)
+static u32 read_intctl_1(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val));
        return val;
 }
-static inline void write_intctl_1(u32 val)
+static void write_intctl_1(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val));
 }
 
 /* INTCTL2 CP6 R2 Page 4
  */
-static inline u32 read_intctl_2(void)
+static u32 read_intctl_2(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val));
        return val;
 }
-static inline void write_intctl_2(u32 val)
+static void write_intctl_2(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val));
 }
 
 /* INTCTL3 CP6 R3 Page 4
  */
-static inline u32 read_intctl_3(void)
+static u32 read_intctl_3(void)
 {
        u32 val;
        asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val));
        return val;
 }
-static inline void write_intctl_3(u32 val)
+static void write_intctl_3(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val));
 }
 
 /* INTSTR0 CP6 R0 Page 5
  */
-static inline u32 read_intstr_0(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c0, c5, 0":"=r" (val));
-       return val;
-}
-static inline void write_intstr_0(u32 val)
+static void write_intstr_0(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val));
 }
 
 /* INTSTR1 CP6 R1 Page 5
  */
-static inline u32 read_intstr_1(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c1, c5, 0":"=r" (val));
-       return val;
-}
 static void write_intstr_1(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val));
@@ -108,12 +96,6 @@ static void write_intstr_1(u32 val)
 
 /* INTSTR2 CP6 R2 Page 5
  */
-static inline u32 read_intstr_2(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c2, c5, 0":"=r" (val));
-       return val;
-}
 static void write_intstr_2(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val));
@@ -121,12 +103,6 @@ static void write_intstr_2(u32 val)
 
 /* INTSTR3 CP6 R3 Page 5
  */
-static inline u32 read_intstr_3(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c3, c5, 0":"=r" (val));
-       return val;
-}
 static void write_intstr_3(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val));
@@ -134,12 +110,6 @@ static void write_intstr_3(u32 val)
 
 /* INTBASE CP6 R0 Page 2
  */
-static inline u32 read_intbase(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c0, c2, 0":"=r" (val));
-       return val;
-}
 static void write_intbase(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val));
@@ -147,12 +117,6 @@ static void write_intbase(u32 val)
 
 /* INTSIZE CP6 R2 Page 2
  */
-static inline u32 read_intsize(void)
-{
-       u32 val;
-       asm volatile("mrc p6, 0, %0, c2, c2, 0":"=r" (val));
-       return val;
-}
 static void write_intsize(u32 val)
 {
        asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val));