* we have to handle all timer interrupts in one place.
*/
static void
-h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
{
unsigned int mask, irq;
mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT);
if ( mask & TSTAT_T0INT ) {
- write_seqlock(&xtime_lock);
timer_tick();
- write_sequnlock(&xtime_lock);
if( mask == TSTAT_T0INT )
return;
}
}
/*
- * mask multiplexed timer irq's
+ * mask multiplexed timer IRQs
*/
static void inline mask_timerx_irq (u32 irq)
{
}
/*
- * unmask multiplexed timer irq's
+ * unmask multiplexed timer IRQs
*/
static void inline unmask_timerx_irq (u32 irq)
{
CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit;
}
-static struct irqchip h7202_timerx_chip = {
+static struct irq_chip h7202_timerx_chip = {
.ack = mask_timerx_irq,
.mask = mask_timerx_irq,
.unmask = unmask_timerx_irq,
static struct irqaction h7202_timer_irq = {
.name = "h7202 Timer Tick",
- .flags = IRQF_DISABLED | IRQF_TIMER,
+ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = h7202_timer_interrupt,
};
irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
mask_timerx_irq(irq);
set_irq_chip(irq, &h7202_timerx_chip);
- set_irq_handler(irq, do_edge_IRQ);
+ set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID );
}
set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);