-#define SND_SOC_DAITDM_LRDW(l,r) ((l << 8) | r)
-
-/*
- * DAI hardware clock ratios
- * bit clock can either be a generated by dividing mclk or
- * by multiplying sample rate, hence there are 2 definitions below
- * depending on codec type.
- */
-/* ratio of sample rate to mclk/sysclk */
-#define SND_SOC_FS_ALL 0xffff /* all mclk supported */
-
-/* bit clock dividers */
-#define SND_SOC_FSBD(x) (1 << (x - 1)) /* ratio mclk:bclk */
-#define SND_SOC_FSBD_REAL(x) (ffs(x))
-
-/* bit clock ratio to (sample rate * channels * word size) */
-#define SND_SOC_FSBW(x) (1 << (x - 1))
-#define SND_SOC_FSBW_REAL(x) (ffs(x))
-/* all bclk ratios supported */
-#define SND_SOC_FSB_ALL ~0ULL
-
-/*
- * DAI hardware flags
- */
-/* use bfs mclk divider mode (BCLK = MCLK / x) */
-#define SND_SOC_DAI_BFS_DIV 0x1
-/* use bfs rate mulitplier (BCLK = RATE * x)*/
-#define SND_SOC_DAI_BFS_RATE 0x2
-/* use bfs rcw multiplier (BCLK = RATE * CHN * WORD SIZE) */
-#define SND_SOC_DAI_BFS_RCW 0x4
-/* capture and playback can use different clocks */
-#define SND_SOC_DAI_ASYNC 0x8