-#define ipg_w32(val32,reg) iowrite32((val32), ioaddr + (reg))
-#define ipg_w16(val16,reg) iowrite16((val16), ioaddr + (reg))
-#define ipg_w8(val8,reg) iowrite8((val8), ioaddr + (reg))
+#define ipg_w32(val32, reg) iowrite32((val32), ioaddr + (reg))
+#define ipg_w16(val16, reg) iowrite16((val16), ioaddr + (reg))
+#define ipg_w8(val8, reg) iowrite8((val8), ioaddr + (reg))
-//variable record -- index by leading revision/length
-//Revision/Length(=N*4), Address1, Data1, Address2, Data2,...,AddressN,DataN
+/*
+ * Variable record -- index by leading revision/length
+ * Revision/Length(=N*4), Address1, Data1, Address2, Data2,...,AddressN,DataN
+ */
/*--------------------------------------------------------------------------
(0x4000|(15*4)), 31, 0x0001, 27, 0x01e0, 31, 0x0002, 22, 0x85bd, 24, 0xfff2,
27, 0x0c10, 28, 0x0c10, 29, 0x2c10, 31, 0x0003, 23, 0x92f6,
31, 0x0000, 23, 0x003d, 30, 0x00de, 20, 0x20e7, 9, 0x0700,
--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------
(0x4000|(15*4)), 31, 0x0001, 27, 0x01e0, 31, 0x0002, 22, 0x85bd, 24, 0xfff2,
27, 0x0c10, 28, 0x0c10, 29, 0x2c10, 31, 0x0003, 23, 0x92f6,
31, 0x0000, 23, 0x003d, 30, 0x00de, 20, 0x20e7, 9, 0x0700,
--------------------------------------------------------------------------*/
(0x4000 | (07 * 4)), 31, 0x0001, 27, 0x01e0, 31, 0x0002, 27, 0xeb8e, 31,
0x0000,
30, 0x005e, 9, 0x0700,
(0x4000 | (07 * 4)), 31, 0x0001, 27, 0x01e0, 31, 0x0002, 27, 0xeb8e, 31,
0x0000,
30, 0x005e, 9, 0x0700,
(0x4100 | (07 * 4)), 31, 0x0001, 27, 0x01e0, 31, 0x0002, 27, 0xeb8e, 31,
0x0000,
30, 0x005e, 9, 0x0700,
(0x4100 | (07 * 4)), 31, 0x0001, 27, 0x01e0, 31, 0x0002, 27, 0xeb8e, 31,
0x0000,
30, 0x005e, 9, 0x0700,
* Read a register from the Physical Layer device located
* on the IPG NIC, using the IPG PHYCTRL register.
*/
* Read a register from the Physical Layer device located
* on the IPG NIC, using the IPG PHYCTRL register.
*/
mode |= IPG_AC_LED_SPEED; /* Write Asic Control Bit 27 */
ipg_w32(mode, ASIC_CTRL);
}
mode |= IPG_AC_LED_SPEED; /* Write Asic Control Bit 27 */
ipg_w32(mode, ASIC_CTRL);
}
/* To accomodate a problem in 10Mbps operation,
* set a global flag if PHY running in 10Mbps mode.
/* To accomodate a problem in 10Mbps operation,
* set a global flag if PHY running in 10Mbps mode.
"no TX flow control, no RX flow control.\n", dev->name);
mac_ctrl_val &= ~IPG_MC_DUPLEX_SELECT_FD &
"no TX flow control, no RX flow control.\n", dev->name);
mac_ctrl_val &= ~IPG_MC_DUPLEX_SELECT_FD &
/* NIC to be configured in promiscuous mode. */
receivemode = IPG_RM_RECEIVEALLFRAMES;
} else if ((dev->flags & IFF_ALLMULTI) ||
/* NIC to be configured in promiscuous mode. */
receivemode = IPG_RM_RECEIVEALLFRAMES;
} else if ((dev->flags & IFF_ALLMULTI) ||
(dev->mc_count > IPG_MULTICAST_HASHTABLE_SIZE))) {
/* NIC to be configured to receive all multicast
* frames. */
receivemode |= IPG_RM_RECEIVEMULTICAST;
(dev->mc_count > IPG_MULTICAST_HASHTABLE_SIZE))) {
/* NIC to be configured to receive all multicast
* frames. */
receivemode |= IPG_RM_RECEIVEMULTICAST;
/* NIC to be configured to receive selected
* multicast addresses. */
receivemode |= IPG_RM_RECEIVEMULTICASTHASH;
/* NIC to be configured to receive selected
* multicast addresses. */
receivemode |= IPG_RM_RECEIVEMULTICASTHASH;
rxfd->frag_info = cpu_to_le64(pci_map_single(sp->pdev, skb->data,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE));
rxfd->frag_info = cpu_to_le64(pci_map_single(sp->pdev, skb->data,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE));
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
ipg_w32((u32) sp->txd_map, TFD_LIST_PTR_0);
ipg_w32(0x00000000, TFD_LIST_PTR_1);
ipg_w32((u32) sp->txd_map, TFD_LIST_PTR_0);
ipg_w32(0x00000000, TFD_LIST_PTR_1);
struct ipg_tx *txfd = sp->txd + dirty;
IPG_DEBUG_MSG("TFC = %16.16lx\n", (unsigned long) txfd->tfc);
struct ipg_tx *txfd = sp->txd + dirty;
IPG_DEBUG_MSG("TFC = %16.16lx\n", (unsigned long) txfd->tfc);
le64_to_cpu(txfd->frag_info) & ~IPG_TFI_FRAGLEN,
skb->len, PCI_DMA_TODEVICE);
le64_to_cpu(txfd->frag_info) & ~IPG_TFI_FRAGLEN,
skb->len, PCI_DMA_TODEVICE);
- initial status is jumboindex=-1 and jumbosize=0
- 1. jumboindex = -1 and jumbosize=0 : previous jumbo frame has been done.
- 2. jumboindex != -1 and jumbosize != 0 : jumbo frame is not over size and receiving
- 3. jumboindex = -1 and jumbosize != 0 : jumbo frame is over size, already dump
- previous receiving and need to continue dumping the current one
-*/
+ * initial status is jumboindex=-1 and jumbosize=0
+ * 1. jumboindex = -1 and jumbosize=0 : previous jumbo frame has been done.
+ * 2. jumboindex != -1 and jumbosize != 0 : jumbo frame is not over size and receiving
+ * 3. jumboindex = -1 and jumbosize != 0 : jumbo frame is over size, already dump
+ * previous receiving and need to continue dumping the current one
+ */
- Frame_NoStart_NoEnd = 0,
- Frame_WithStart = 1,
- Frame_WithEnd = 10,
- Frame_WithStart_WithEnd = 11
+ FRAME_NO_START_NO_END = 0,
+ FRAME_WITH_START = 1,
+ FRAME_WITH_END = 10,
+ FRAME_WITH_START_WITH_END = 11
struct ipg_nic_private *sp = netdev_priv(dev);
unsigned int entry = sp->rx_current % IPG_RFDLIST_LENGTH;
struct ipg_nic_private *sp = netdev_priv(dev);
unsigned int entry = sp->rx_current % IPG_RFDLIST_LENGTH;
struct ipg_rx *rxfd = sp->rxd + entry;
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info & ~IPG_RFI_FRAGLEN),
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
struct ipg_rx *rxfd = sp->rxd + entry;
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info & ~IPG_RFI_FRAGLEN),
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
{
struct ipg_nic_private *sp = netdev_priv(dev);
struct ipg_rx *rxfd = sp->rxd + (sp->rx_current % IPG_RFDLIST_LENGTH);
{
struct ipg_nic_private *sp = netdev_priv(dev);
struct ipg_rx *rxfd = sp->rxd + (sp->rx_current % IPG_RFDLIST_LENGTH);
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info & ~IPG_RFI_FRAGLEN),
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info & ~IPG_RFI_FRAGLEN),
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
}
static void ipg_nic_rx_with_start_and_end(struct net_device *dev,
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
}
static void ipg_nic_rx_with_start_and_end(struct net_device *dev,
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
- if (jumbo->FoundStart) {
- IPG_DEV_KFREE_SKB(jumbo->skb);
- jumbo->FoundStart = 0;
- jumbo->CurrentSize = 0;
+ if (jumbo->found_start) {
+ dev_kfree_skb_irq(jumbo->skb);
+ jumbo->found_start = 0;
+ jumbo->current_size = 0;
- // 1: found error, 0 no error
- if (ipg_nic_rx_check_error(dev) != NormalPacket)
+ /* 1: found error, 0 no error */
+ if (ipg_nic_rx_check_error(dev) != NORMAL_PACKET)
framelen = le64_to_cpu(rxfd->rfs) & IPG_RFS_RXFRAMELEN;
if (framelen > IPG_RXFRAG_SIZE)
framelen = IPG_RXFRAG_SIZE;
framelen = le64_to_cpu(rxfd->rfs) & IPG_RFS_RXFRAMELEN;
if (framelen > IPG_RXFRAG_SIZE)
framelen = IPG_RXFRAG_SIZE;
}
static void ipg_nic_rx_with_start(struct net_device *dev,
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
}
static void ipg_nic_rx_with_start(struct net_device *dev,
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
- // 1: found error, 0 no error
- if (ipg_nic_rx_check_error(dev) != NormalPacket)
+ /* 1: found error, 0 no error */
+ if (ipg_nic_rx_check_error(dev) != NORMAL_PACKET)
pci_unmap_single(pdev, le64_to_cpu(rxfd->frag_info & ~IPG_RFI_FRAGLEN),
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
skb_put(skb, IPG_RXFRAG_SIZE);
pci_unmap_single(pdev, le64_to_cpu(rxfd->frag_info & ~IPG_RFI_FRAGLEN),
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
skb_put(skb, IPG_RXFRAG_SIZE);
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
- //1: found error, 0 no error
- if (ipg_nic_rx_check_error(dev) == NormalPacket) {
- struct sk_buff *skb = sp->RxBuff[entry];
+ /* 1: found error, 0 no error */
+ if (ipg_nic_rx_check_error(dev) == NORMAL_PACKET) {
+ struct sk_buff *skb = sp->rx_buff[entry];
int framelen, endframelen;
framelen = le64_to_cpu(rxfd->rfs) & IPG_RFS_RXFRAMELEN;
int framelen, endframelen;
framelen = le64_to_cpu(rxfd->rfs) & IPG_RFS_RXFRAMELEN;
/*
if (framelen > IPG_RXFRAG_SIZE)
framelen=IPG_RXFRAG_SIZE;
*/
if (framelen > IPG_RXSUPPORT_SIZE)
/*
if (framelen > IPG_RXFRAG_SIZE)
framelen=IPG_RXFRAG_SIZE;
*/
if (framelen > IPG_RXSUPPORT_SIZE)
- memcpy(skb_put(jumbo->skb, endframeLen),
- skb->data, endframeLen);
+ memcpy(skb_put(jumbo->skb, endframelen),
+ skb->data, endframelen);
- IPG_DEV_KFREE_SKB(jumbo->skb);
- jumbo->FoundStart = 0;
- jumbo->CurrentSize = 0;
+ dev_kfree_skb_irq(jumbo->skb);
+ jumbo->found_start = 0;
+ jumbo->current_size = 0;
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
struct ipg_nic_private *sp,
struct ipg_rx *rxfd, unsigned entry)
{
- //1: found error, 0 no error
- if (ipg_nic_rx_check_error(dev) == NormalPacket) {
- struct sk_buff *skb = sp->RxBuff[entry];
+ /* 1: found error, 0 no error */
+ if (ipg_nic_rx_check_error(dev) == NORMAL_PACKET) {
+ struct sk_buff *skb = sp->rx_buff[entry];
- if (jumbo->FoundStart) {
- jumbo->CurrentSize += IPG_RXFRAG_SIZE;
- if (jumbo->CurrentSize <= IPG_RXSUPPORT_SIZE) {
+ if (jumbo->found_start) {
+ jumbo->current_size += IPG_RXFRAG_SIZE;
+ if (jumbo->current_size <= IPG_RXSUPPORT_SIZE) {
memcpy(skb_put(jumbo->skb,
IPG_RXFRAG_SIZE),
skb->data, IPG_RXFRAG_SIZE);
memcpy(skb_put(jumbo->skb,
IPG_RXFRAG_SIZE),
skb->data, IPG_RXFRAG_SIZE);
- IPG_DEV_KFREE_SKB(jumbo->skb);
- jumbo->FoundStart = 0;
- jumbo->CurrentSize = 0;
+ dev_kfree_skb_irq(jumbo->skb);
+ jumbo->found_start = 0;
+ jumbo->current_size = 0;
- case Frame_WithStart_WithEnd:
- ipg_nic_rx_with_start_and_end(dev, tp, rxfd, entry);
+ case FRAME_WITH_START_WITH_END:
+ ipg_nic_rx_with_start_and_end(dev, sp, rxfd, entry);
- case Frame_WithStart:
- ipg_nic_rx_with_start(dev, tp, rxfd, entry);
+ case FRAME_WITH_START:
+ ipg_nic_rx_with_start(dev, sp, rxfd, entry);
- case Frame_WithEnd:
- ipg_nic_rx_with_end(dev, tp, rxfd, entry);
+ case FRAME_WITH_END:
+ ipg_nic_rx_with_end(dev, sp, rxfd, entry);
- case Frame_NoStart_NoEnd:
- ipg_nic_rx_no_start_no_end(dev, tp, rxfd, entry);
+ case FRAME_NO_START_NO_END:
+ ipg_nic_rx_no_start_no_end(dev, sp, rxfd, entry);
for (i = 0; i < IPG_MAXRFDPROCESS_COUNT; i++, curr++) {
unsigned int entry = curr % IPG_RFDLIST_LENGTH;
for (i = 0; i < IPG_MAXRFDPROCESS_COUNT; i++, curr++) {
unsigned int entry = curr % IPG_RFDLIST_LENGTH;
le64_to_cpu(info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
le64_to_cpu(info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
/* Set the buffer's protocol field to Ethernet. */
skb->protocol = eth_type_trans(skb, dev);
/* Set the buffer's protocol field to Ethernet. */
skb->protocol = eth_type_trans(skb, dev);
- /* If the frame contains an IP/TCP/UDP frame,
- * determine if upper layer must check IP/TCP/UDP
- * checksums.
- *
- * NOTE: DO NOT RELY ON THE TCP/UDP CHECKSUM
- * VERIFICATION FOR SILICON REVISIONS B3
- * AND EARLIER!
- *
- if ((le64_to_cpu(rxfd->rfs &
- (IPG_RFS_TCPDETECTED | IPG_RFS_UDPDETECTED |
- IPG_RFS_IPDETECTED))) &&
- !(le64_to_cpu(rxfd->rfs &
- (IPG_RFS_TCPERROR | IPG_RFS_UDPERROR |
- IPG_RFS_IPERROR)))) {
- * Indicate IP checksums were performed
- * by the IPG.
- *
- skb->ip_summed = CHECKSUM_UNNECESSARY;
- } else
+ /* The IPG encountered an error with (or
+ * there were no) IP/TCP/UDP checksums.
+ * This may or may not indicate an invalid
+ * IP/TCP/UDP frame was received. Let the
+ * upper layer decide.
- {
- /* The IPG encountered an error with (or
- * there were no) IP/TCP/UDP checksums.
- * This may or may not indicate an invalid
- * IP/TCP/UDP frame was received. Let the
- * upper layer decide.
- */
- skb->ip_summed = CHECKSUM_NONE;
- }
+ skb->ip_summed = CHECKSUM_NONE;
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
pci_unmap_single(sp->pdev,
le64_to_cpu(rxfd->frag_info) & ~IPG_RFI_FRAGLEN,
sp->rx_buf_sz, PCI_DMA_FROMDEVICE);
struct ipg_tx *txfd = sp->txd + i;
pci_unmap_single(sp->pdev,
le64_to_cpu(txfd->frag_info) & ~IPG_TFI_FRAGLEN,
struct ipg_tx *txfd = sp->txd + i;
pci_unmap_single(sp->pdev,
le64_to_cpu(txfd->frag_info) & ~IPG_TFI_FRAGLEN,
/* Clear all TFC fields, except TFDDONE. */
txfd->tfc = cpu_to_le64(IPG_TFC_TFDDONE);
/* Specify the TFC field within the TFD. */
txfd->tfc |= cpu_to_le64(IPG_TFC_WORDALIGNDISABLED |
/* Clear all TFC fields, except TFDDONE. */
txfd->tfc = cpu_to_le64(IPG_TFC_TFDDONE);
/* Specify the TFC field within the TFD. */
txfd->tfc |= cpu_to_le64(IPG_TFC_WORDALIGNDISABLED |
/* Request TxComplete interrupts at an interval defined
* by the constant IPG_FRAMESBETWEENTXCOMPLETES.
/* Request TxComplete interrupts at an interval defined
* by the constant IPG_FRAMESBETWEENTXCOMPLETES.
static int read_eeprom(struct net_device *dev, int eep_addr)
{
void __iomem *ioaddr = ipg_ioaddr(dev);
static int read_eeprom(struct net_device *dev, int eep_addr)
{
void __iomem *ioaddr = ipg_ioaddr(dev);