err.no Git - linux-2.6/blob - sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <sound/driver.h>
  25 #include <linux/init.h>
  26 #include <linux/delay.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/slab.h>
  29 #include <linux/pci.h>
  30 #include <linux/firmware.h>
  31 #include <linux/moduleparam.h>
  32
  33 #include <sound/core.h>
  34 #include <sound/control.h>
  35 #include <sound/pcm.h>
  36 #include <sound/info.h>
  37 #include <sound/asoundef.h>
  38 #include <sound/rawmidi.h>
  39 #include <sound/hwdep.h>
  40 #include <sound/initval.h>
  41 #include <sound/hdsp.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/current.h>
  45 #include <asm/io.h>
  46
  47 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  48 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  49 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  50
  51 module_param_array(index, int, NULL, 0444);
  52 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  53 module_param_array(id, charp, NULL, 0444);
  54 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  55 module_param_array(enable, bool, NULL, 0444);
  56 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  58 MODULE_DESCRIPTION("RME Hammerfall DSP");
  59 MODULE_LICENSE("GPL");
  60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  61                 "{RME HDSP-9652},"
  62                 "{RME HDSP-9632}}");
  63
  64 #define HDSP_MAX_CHANNELS        26
  65 #define HDSP_MAX_DS_CHANNELS     14
  66 #define HDSP_MAX_QS_CHANNELS     8
  67 #define DIGIFACE_SS_CHANNELS     26
  68 #define DIGIFACE_DS_CHANNELS     14
  69 #define MULTIFACE_SS_CHANNELS    18
  70 #define MULTIFACE_DS_CHANNELS    14
  71 #define H9652_SS_CHANNELS        26
  72 #define H9652_DS_CHANNELS        14
  73 /* This does not include possible Analog Extension Boards
  74    AEBs are detected at card initialization
  75 */
  76 #define H9632_SS_CHANNELS        12
  77 #define H9632_DS_CHANNELS        8
  78 #define H9632_QS_CHANNELS        4
  79
  80 /* Write registers. These are defined as byte-offsets from the iobase value.
  81  */
  82 #define HDSP_resetPointer               0
  83 #define HDSP_freqReg                    0
  84 #define HDSP_outputBufferAddress        32
  85 #define HDSP_inputBufferAddress         36
  86 #define HDSP_controlRegister            64
  87 #define HDSP_interruptConfirmation      96
  88 #define HDSP_outputEnable               128
  89 #define HDSP_control2Reg                256
  90 #define HDSP_midiDataOut0               352
  91 #define HDSP_midiDataOut1               356
  92 #define HDSP_fifoData                   368
  93 #define HDSP_inputEnable                384
  94
  95 /* Read registers. These are defined as byte-offsets from the iobase value
  96  */
  97
  98 #define HDSP_statusRegister    0
  99 #define HDSP_timecode        128
 100 #define HDSP_status2Register 192
 101 #define HDSP_midiDataOut0    352
 102 #define HDSP_midiDataOut1    356
 103 #define HDSP_midiDataIn0     360
 104 #define HDSP_midiDataIn1     364
 105 #define HDSP_midiStatusOut0  384
 106 #define HDSP_midiStatusOut1  388
 107 #define HDSP_midiStatusIn0   392
 108 #define HDSP_midiStatusIn1   396
 109 #define HDSP_fifoStatus      400
 110
 111 /* the meters are regular i/o-mapped registers, but offset
 112    considerably from the rest. the peak registers are reset
 113    when read; the least-significant 4 bits are full-scale counters;
 114    the actual peak value is in the most-significant 24 bits.
 115 */
 116
 117 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 118 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 119 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 120 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 121 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 122
 123
 124 /* This is for H9652 cards
 125    Peak values are read downward from the base
 126    Rms values are read upward
 127    There are rms values for the outputs too
 128    26*3 values are read in ss mode
 129    14*3 in ds mode, with no gap between values
 130 */
 131 #define HDSP_9652_peakBase      7164
 132 #define HDSP_9652_rmsBase       4096
 133
 134 /* c.f. the hdsp_9632_meters_t struct */
 135 #define HDSP_9632_metersBase    4096
 136
 137 #define HDSP_IO_EXTENT     7168
 138
 139 /* control2 register bits */
 140
 141 #define HDSP_TMS                0x01
 142 #define HDSP_TCK                0x02
 143 #define HDSP_TDI                0x04
 144 #define HDSP_JTAG               0x08
 145 #define HDSP_PWDN               0x10
 146 #define HDSP_PROGRAM            0x020
 147 #define HDSP_CONFIG_MODE_0      0x040
 148 #define HDSP_CONFIG_MODE_1      0x080
 149 #define HDSP_VERSION_BIT        0x100
 150 #define HDSP_BIGENDIAN_MODE     0x200
 151 #define HDSP_RD_MULTIPLE        0x400
 152 #define HDSP_9652_ENABLE_MIXER  0x800
 153 #define HDSP_TDO                0x10000000
 154
 155 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 156 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 157
 158 /* Control Register bits */
 159
 160 #define HDSP_Start                (1<<0)  /* start engine */
 161 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 162 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 163 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 164 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 165 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 166 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 167 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 168 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 169 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 170 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 171 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 172 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 173 #define HDSP_SyncRef2             (1<<13)
 174 #define HDSP_SPDIFInputSelect0    (1<<14)
 175 #define HDSP_SPDIFInputSelect1    (1<<15)
 176 #define HDSP_SyncRef0             (1<<16)
 177 #define HDSP_SyncRef1             (1<<17)
 178 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 179 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 180 #define HDSP_Midi0InterruptEnable (1<<22)
 181 #define HDSP_Midi1InterruptEnable (1<<23)
 182 #define HDSP_LineOut              (1<<24)
 183 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 184 #define HDSP_ADGain1              (1<<26)
 185 #define HDSP_DAGain0              (1<<27)
 186 #define HDSP_DAGain1              (1<<28)
 187 #define HDSP_PhoneGain0           (1<<29)
 188 #define HDSP_PhoneGain1           (1<<30)
 189 #define HDSP_QuadSpeed            (1<<31)
 190
 191 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 192 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 193 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 194 #define HDSP_ADGainLowGain     0
 195
 196 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 197 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 198 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 199 #define HDSP_DAGainMinus10dBV    0
 200
 201 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 202 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 203 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 204 #define HDSP_PhoneGainMinus12dB  0
 205
 206 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 207 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 208
 209 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 210 #define HDSP_SPDIFInputADAT1    0
 211 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 212 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 213 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 214
 215 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 216 #define HDSP_SyncRef_ADAT1       0
 217 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 218 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 219 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 220 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 221 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 222
 223 /* Sample Clock Sources */
 224
 225 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 226 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 227 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 228 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 229 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 230 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 231 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 232 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 233 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 234 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 235
 236 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 237
 238 #define HDSP_SYNC_FROM_WORD      0
 239 #define HDSP_SYNC_FROM_SPDIF     1
 240 #define HDSP_SYNC_FROM_ADAT1     2
 241 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 242 #define HDSP_SYNC_FROM_ADAT2     4
 243 #define HDSP_SYNC_FROM_ADAT3     5
 244
 245 /* SyncCheck status */
 246
 247 #define HDSP_SYNC_CHECK_NO_LOCK 0
 248 #define HDSP_SYNC_CHECK_LOCK    1
 249 #define HDSP_SYNC_CHECK_SYNC    2
 250
 251 /* AutoSync references - used by "autosync_ref" control switch */
 252
 253 #define HDSP_AUTOSYNC_FROM_WORD      0
 254 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 255 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 256 #define HDSP_AUTOSYNC_FROM_NONE      3
 257 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 258 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 259 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 260
 261 /* Possible sources of S/PDIF input */
 262
 263 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 264 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 265 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 266 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 267
 268 #define HDSP_Frequency32KHz    HDSP_Frequency0
 269 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 270 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 271 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 272 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 273 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 274 /* For H9632 cards */
 275 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 276 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 277 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 278 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 279         return 104857600000000 / rate; // 100 MHz
 280         return 110100480000000 / rate; // 105 MHz
 281 */
 282 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 283
 284 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 285 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 286
 287 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 288 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 289
 290 /* Status Register bits */
 291
 292 #define HDSP_audioIRQPending    (1<<0)
 293 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 294 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 295 #define HDSP_Lock1              (1<<2)
 296 #define HDSP_Lock0              (1<<3)
 297 #define HDSP_SPDIFSync          (1<<4)
 298 #define HDSP_TimecodeLock       (1<<5)
 299 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 300 #define HDSP_Sync2              (1<<16)
 301 #define HDSP_Sync1              (1<<17)
 302 #define HDSP_Sync0              (1<<18)
 303 #define HDSP_DoubleSpeedStatus  (1<<19)
 304 #define HDSP_ConfigError        (1<<20)
 305 #define HDSP_DllError           (1<<21)
 306 #define HDSP_spdifFrequency0    (1<<22)
 307 #define HDSP_spdifFrequency1    (1<<23)
 308 #define HDSP_spdifFrequency2    (1<<24)
 309 #define HDSP_SPDIFErrorFlag     (1<<25)
 310 #define HDSP_BufferID           (1<<26)
 311 #define HDSP_TimecodeSync       (1<<27)
 312 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 313 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 314 #define HDSP_midi0IRQPending    (1<<30)
 315 #define HDSP_midi1IRQPending    (1<<31)
 316
 317 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 318
 319 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 320 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 321 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 322
 323 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 324 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 325 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 326
 327 /* This is for H9632 cards */
 328 #define HDSP_spdifFrequency128KHz   HDSP_spdifFrequencyMask
 329 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 330 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 331
 332 /* Status2 Register bits */
 333
 334 #define HDSP_version0     (1<<0)
 335 #define HDSP_version1     (1<<1)
 336 #define HDSP_version2     (1<<2)
 337 #define HDSP_wc_lock      (1<<3)
 338 #define HDSP_wc_sync      (1<<4)
 339 #define HDSP_inp_freq0    (1<<5)
 340 #define HDSP_inp_freq1    (1<<6)
 341 #define HDSP_inp_freq2    (1<<7)
 342 #define HDSP_SelSyncRef0  (1<<8)
 343 #define HDSP_SelSyncRef1  (1<<9)
 344 #define HDSP_SelSyncRef2  (1<<10)
 345
 346 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 347
 348 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 349 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 350 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 351 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 352 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 353 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 354 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 355 /* FIXME : more values for 9632 cards ? */
 356
 357 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 358 #define HDSP_SelSyncRef_ADAT1      0
 359 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 360 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 361 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 362 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 363 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 364
 365 /* Card state flags */
 366
 367 #define HDSP_InitializationComplete  (1<<0)
 368 #define HDSP_FirmwareLoaded          (1<<1)
 369 #define HDSP_FirmwareCached          (1<<2)
 370
 371 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 372
 373 #define HDSP_LONG_WAIT   5000
 374 #define HDSP_SHORT_WAIT  30
 375
 376 #define UNITY_GAIN                       32768
 377 #define MINUS_INFINITY_GAIN              0
 378
 379 /* the size of a substream (1 mono data stream) */
 380
 381 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 382 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 383
 384 /* the size of the area we need to allocate for DMA transfers. the
 385    size is the same regardless of the number of channels - the
 386    Multiface still uses the same memory area.
 387
 388    Note that we allocate 1 more channel than is apparently needed
 389    because the h/w seems to write 1 byte beyond the end of the last
 390    page. Sigh.
 391 */
 392
 393 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 394 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 395
 396 /* use hotplug firmeare loader? */
 397 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
 398 #if !defined(HDSP_USE_HWDEP_LOADER) && !defined(CONFIG_SND_HDSP)
 399 #define HDSP_FW_LOADER
 400 #endif
 401 #endif
 402
 403 struct hdsp_9632_meters {
 404     u32 input_peak[16];
 405     u32 playback_peak[16];
 406     u32 output_peak[16];
 407     u32 xxx_peak[16];
 408     u32 padding[64];
 409     u32 input_rms_low[16];
 410     u32 playback_rms_low[16];
 411     u32 output_rms_low[16];
 412     u32 xxx_rms_low[16];
 413     u32 input_rms_high[16];
 414     u32 playback_rms_high[16];
 415     u32 output_rms_high[16];
 416     u32 xxx_rms_high[16];
 417 };
 418
 419 struct hdsp_midi {
 420     struct hdsp             *hdsp;
 421     int                      id;
 422     struct snd_rawmidi           *rmidi;
 423     struct snd_rawmidi_substream *input;
 424     struct snd_rawmidi_substream *output;
 425     char                     istimer; /* timer in use */
 426     struct timer_list        timer;
 427     spinlock_t               lock;
 428     int                      pending;
 429 };
 430
 431 struct hdsp {
 432         spinlock_t            lock;
 433         struct snd_pcm_substream *capture_substream;
 434         struct snd_pcm_substream *playback_substream;
 435         struct hdsp_midi      midi[2];
 436         struct tasklet_struct midi_tasklet;
 437         int                   use_midi_tasklet;
 438         int                   precise_ptr;
 439         u32                   control_register;      /* cached value */
 440         u32                   control2_register;     /* cached value */
 441         u32                   creg_spdif;
 442         u32                   creg_spdif_stream;
 443         int                   clock_source_locked;
 444         char                 *card_name;             /* digiface/multiface */
 445         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 446         unsigned short        firmware_rev;
 447         unsigned short        state;                 /* stores state bits */
 448         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
 449         size_t                period_bytes;          /* guess what this is */
 450         unsigned char         max_channels;
 451         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 452         unsigned char         ds_in_channels;
 453         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 454         unsigned char         qs_out_channels;
 455         unsigned char         ds_out_channels;
 456         unsigned char         ss_out_channels;
 457
 458         struct snd_dma_buffer capture_dma_buf;
 459         struct snd_dma_buffer playback_dma_buf;
 460         unsigned char        *capture_buffer;       /* suitably aligned address */
 461         unsigned char        *playback_buffer;      /* suitably aligned address */
 462
 463         pid_t                 capture_pid;
 464         pid_t                 playback_pid;
 465         int                   running;
 466         int                   system_sample_rate;
 467         char                 *channel_map;
 468         int                   dev;
 469         int                   irq;
 470         unsigned long         port;
 471         void __iomem         *iobase;
 472         struct snd_card *card;
 473         struct snd_pcm *pcm;
 474         struct snd_hwdep          *hwdep;
 475         struct pci_dev       *pci;
 476         struct snd_kcontrol *spdif_ctl;
 477         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 478         unsigned int          dds_value; /* last value written to freq register */
 479 };
 480
 481 /* These tables map the ALSA channels 1..N to the channels that we
 482    need to use in order to find the relevant channel buffer. RME
 483    refer to this kind of mapping as between "the ADAT channel and
 484    the DMA channel." We index it using the logical audio channel,
 485    and the value is the DMA channel (i.e. channel buffer number)
 486    where the data for that channel can be read/written from/to.
 487 */
 488
 489 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 490         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 491         18, 19, 20, 21, 22, 23, 24, 25
 492 };
 493
 494 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 495         /* Analog */
 496         0, 1, 2, 3, 4, 5, 6, 7,
 497         /* ADAT 2 */
 498         16, 17, 18, 19, 20, 21, 22, 23,
 499         /* SPDIF */
 500         24, 25,
 501         -1, -1, -1, -1, -1, -1, -1, -1
 502 };
 503
 504 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 505         /* ADAT channels are remapped */
 506         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 507         /* channels 12 and 13 are S/PDIF */
 508         24, 25,
 509         /* others don't exist */
 510         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 511 };
 512
 513 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 514         /* ADAT channels */
 515         0, 1, 2, 3, 4, 5, 6, 7,
 516         /* SPDIF */
 517         8, 9,
 518         /* Analog */
 519         10, 11,
 520         /* AO4S-192 and AI4S-192 extension boards */
 521         12, 13, 14, 15,
 522         /* others don't exist */
 523         -1, -1, -1, -1, -1, -1, -1, -1,
 524         -1, -1
 525 };
 526
 527 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 528         /* ADAT */
 529         1, 3, 5, 7,
 530         /* SPDIF */
 531         8, 9,
 532         /* Analog */
 533         10, 11,
 534         /* AO4S-192 and AI4S-192 extension boards */
 535         12, 13, 14, 15,
 536         /* others don't exist */
 537         -1, -1, -1, -1, -1, -1, -1, -1,
 538         -1, -1, -1, -1, -1, -1
 539 };
 540
 541 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 542         /* ADAT is disabled in this mode */
 543         /* SPDIF */
 544         8, 9,
 545         /* Analog */
 546         10, 11,
 547         /* AO4S-192 and AI4S-192 extension boards */
 548         12, 13, 14, 15,
 549         /* others don't exist */
 550         -1, -1, -1, -1, -1, -1, -1, -1,
 551         -1, -1, -1, -1, -1, -1, -1, -1,
 552         -1, -1
 553 };
 554
 555 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 556 {
 557         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 558         dmab->dev.dev = snd_dma_pci_data(pci);
 559         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 560                 if (dmab->bytes >= size)
 561                         return 0;
 562         }
 563         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 564                                 size, dmab) < 0)
 565                 return -ENOMEM;
 566         return 0;
 567 }
 568
 569 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 570 {
 571         if (dmab->area) {
 572                 dmab->dev.dev = NULL; /* make it anonymous */
 573                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 574         }
 575 }
 576
 577
 578 static struct pci_device_id snd_hdsp_ids[] = {
 579         {
 580                 .vendor = PCI_VENDOR_ID_XILINX,
 581                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 582                 .subvendor = PCI_ANY_ID,
 583                 .subdevice = PCI_ANY_ID,
 584         }, /* RME Hammerfall-DSP */
 585         { 0, },
 586 };
 587
 588 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 589
 590 /* prototypes */
 591 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 592 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 593 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 594 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 595 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 596 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 597 static int hdsp_autosync_ref(struct hdsp *hdsp);
 598 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 599 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 600
 601 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 602 {
 603         switch (hdsp->firmware_rev) {
 604         case 0xa:
 605                 return (64 * out) + (32 + (in));
 606         case 0x96:
 607         case 0x97:
 608         case 0x98:
 609                 return (32 * out) + (16 + (in));
 610         default:
 611                 return (52 * out) + (26 + (in));
 612         }
 613 }
 614
 615 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 616 {
 617         switch (hdsp->firmware_rev) {
 618         case 0xa:
 619                 return (64 * out) + in;
 620         case 0x96:
 621         case 0x97:
 622         case 0x98:
 623                 return (32 * out) + in;
 624         default:
 625                 return (52 * out) + in;
 626         }
 627 }
 628
 629 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 630 {
 631         writel(val, hdsp->iobase + reg);
 632 }
 633
 634 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 635 {
 636         return readl (hdsp->iobase + reg);
 637 }
 638
 639 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 640 {
 641
 642         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 643         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
 644                 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
 645                 hdsp->state &= ~HDSP_FirmwareLoaded;
 646                 return -EIO;
 647         }
 648         return 0;
 649
 650 }
 651
 652 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 653
 654         int i;
 655         unsigned long flags;
 656
 657         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 658
 659                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 660
 661                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 662                 hdsp_write (hdsp, HDSP_fifoData, 0);
 663
 664                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 665                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 666                         return -EIO;
 667                 }
 668
 669                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 670
 671                 for (i = 0; i < 24413; ++i) {
 672                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
 673                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 674                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 675                                 return -EIO;
 676                         }
 677                 }
 678
 679                 ssleep(3);
 680
 681                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 682                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
 683                         return -EIO;
 684                 }
 685
 686 #ifdef SNDRV_BIG_ENDIAN
 687                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 688 #else
 689                 hdsp->control2_register = 0;
 690 #endif
 691                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 692                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 693
 694         }
 695         if (hdsp->state & HDSP_InitializationComplete) {
 696                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 697                 spin_lock_irqsave(&hdsp->lock, flags);
 698                 snd_hdsp_set_defaults(hdsp);
 699                 spin_unlock_irqrestore(&hdsp->lock, flags);
 700         }
 701
 702         hdsp->state |= HDSP_FirmwareLoaded;
 703
 704         return 0;
 705 }
 706
 707 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 708 {
 709         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 710
 711                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
 712                 hdsp_write (hdsp, HDSP_fifoData, 0);
 713                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
 714                         return -EIO;
 715
 716                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 717                 hdsp_write (hdsp, HDSP_fifoData, 0);
 718
 719                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
 720                         hdsp->io_type = Multiface;
 721                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
 722                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 723                         hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
 724                 } else {
 725                         hdsp->io_type = Digiface;
 726                 }
 727         } else {
 728                 /* firmware was already loaded, get iobox type */
 729                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 730                         hdsp->io_type = Multiface;
 731                 else
 732                         hdsp->io_type = Digiface;
 733         }
 734         return 0;
 735 }
 736
 737
 738 #ifdef HDSP_FW_LOADER
 739 static int __devinit hdsp_request_fw_loader(struct hdsp *hdsp);
 740 #endif
 741
 742 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 743 {
 744         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 745                 return 0;
 746         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 747                 hdsp->state &= ~HDSP_FirmwareLoaded;
 748                 if (! load_on_demand)
 749                         return -EIO;
 750                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 751                 /* try to load firmware */
 752                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 753 #ifdef HDSP_FW_LOADER
 754                         if (! hdsp_request_fw_loader(hdsp))
 755                                 return 0;
 756 #endif
 757                         snd_printk(KERN_ERR
 758                                    "Hammerfall-DSP: No firmware loaded nor "
 759                                    "cached, please upload firmware.\n");
 760                         return -EIO;
 761                 }
 762                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 763                         snd_printk(KERN_ERR
 764                                    "Hammerfall-DSP: Firmware loading from "
 765                                    "cache failed, please upload manually.\n");
 766                         return -EIO;
 767                 }
 768         }
 769         return 0;
 770 }
 771
 772
 773 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 774 {
 775         int i;
 776
 777         /* the fifoStatus registers reports on how many words
 778            are available in the command FIFO.
 779         */
 780
 781         for (i = 0; i < timeout; i++) {
 782
 783                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 784                         return 0;
 785
 786                 /* not very friendly, but we only do this during a firmware
 787                    load and changing the mixer, so we just put up with it.
 788                 */
 789
 790                 udelay (100);
 791         }
 792
 793         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 794                     count, timeout);
 795         return -1;
 796 }
 797
 798 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 799 {
 800         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 801                 return 0;
 802
 803         return hdsp->mixer_matrix[addr];
 804 }
 805
 806 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 807 {
 808         unsigned int ad;
 809
 810         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 811                 return -1;
 812
 813         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 814
 815                 /* from martin bjornsen:
 816
 817                    "You can only write dwords to the
 818                    mixer memory which contain two
 819                    mixer values in the low and high
 820                    word. So if you want to change
 821                    value 0 you have to read value 1
 822                    from the cache and write both to
 823                    the first dword in the mixer
 824                    memory."
 825                 */
 826
 827                 if (hdsp->io_type == H9632 && addr >= 512)
 828                         return 0;
 829
 830                 if (hdsp->io_type == H9652 && addr >= 1352)
 831                         return 0;
 832
 833                 hdsp->mixer_matrix[addr] = data;
 834
 835
 836                 /* `addr' addresses a 16-bit wide address, but
 837                    the address space accessed via hdsp_write
 838                    uses byte offsets. put another way, addr
 839                    varies from 0 to 1351, but to access the
 840                    corresponding memory location, we need
 841                    to access 0 to 2703 ...
 842                 */
 843                 ad = addr/2;
 844
 845                 hdsp_write (hdsp, 4096 + (ad*4),
 846                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 847                             hdsp->mixer_matrix[addr&0x7fe]);
 848
 849                 return 0;
 850
 851         } else {
 852
 853                 ad = (addr << 16) + data;
 854
 855                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 856                         return -1;
 857
 858                 hdsp_write (hdsp, HDSP_fifoData, ad);
 859                 hdsp->mixer_matrix[addr] = data;
 860
 861         }
 862
 863         return 0;
 864 }
 865
 866 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 867 {
 868         unsigned long flags;
 869         int ret = 1;
 870
 871         spin_lock_irqsave(&hdsp->lock, flags);
 872         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 873             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 874                 ret = 0;
 875         spin_unlock_irqrestore(&hdsp->lock, flags);
 876         return ret;
 877 }
 878
 879 static int hdsp_external_sample_rate (struct hdsp *hdsp)
 880 {
 881         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
 882         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
 883
 884         switch (rate_bits) {
 885         case HDSP_systemFrequency32:   return 32000;
 886         case HDSP_systemFrequency44_1: return 44100;
 887         case HDSP_systemFrequency48:   return 48000;
 888         case HDSP_systemFrequency64:   return 64000;
 889         case HDSP_systemFrequency88_2: return 88200;
 890         case HDSP_systemFrequency96:   return 96000;
 891         default:
 892                 return 0;
 893         }
 894 }
 895
 896 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 897 {
 898         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 899         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 900
 901         if (status & HDSP_SPDIFErrorFlag)
 902                 return 0;
 903
 904         switch (rate_bits) {
 905         case HDSP_spdifFrequency32KHz: return 32000;
 906         case HDSP_spdifFrequency44_1KHz: return 44100;
 907         case HDSP_spdifFrequency48KHz: return 48000;
 908         case HDSP_spdifFrequency64KHz: return 64000;
 909         case HDSP_spdifFrequency88_2KHz: return 88200;
 910         case HDSP_spdifFrequency96KHz: return 96000;
 911         case HDSP_spdifFrequency128KHz:
 912                 if (hdsp->io_type == H9632) return 128000;
 913                 break;
 914         case HDSP_spdifFrequency176_4KHz:
 915                 if (hdsp->io_type == H9632) return 176400;
 916                 break;
 917         case HDSP_spdifFrequency192KHz:
 918                 if (hdsp->io_type == H9632) return 192000;
 919                 break;
 920         default:
 921                 break;
 922         }
 923         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
 924         return 0;
 925 }
 926
 927 static void hdsp_compute_period_size(struct hdsp *hdsp)
 928 {
 929         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
 930 }
 931
 932 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
 933 {
 934         int position;
 935
 936         position = hdsp_read(hdsp, HDSP_statusRegister);
 937
 938         if (!hdsp->precise_ptr)
 939                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
 940
 941         position &= HDSP_BufferPositionMask;
 942         position /= 4;
 943         position &= (hdsp->period_bytes/2) - 1;
 944         return position;
 945 }
 946
 947 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
 948 {
 949         hdsp_write (hdsp, HDSP_resetPointer, 0);
 950         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
 951                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
 952                  * requires (?) to write again DDS value after a reset pointer
 953                  * (at least, it works like this) */
 954                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
 955 }
 956
 957 static void hdsp_start_audio(struct hdsp *s)
 958 {
 959         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
 960         hdsp_write(s, HDSP_controlRegister, s->control_register);
 961 }
 962
 963 static void hdsp_stop_audio(struct hdsp *s)
 964 {
 965         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
 966         hdsp_write(s, HDSP_controlRegister, s->control_register);
 967 }
 968
 969 static void hdsp_silence_playback(struct hdsp *hdsp)
 970 {
 971         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
 972 }
 973
 974 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
 975 {
 976         int n;
 977
 978         spin_lock_irq(&s->lock);
 979
 980         frames >>= 7;
 981         n = 0;
 982         while (frames) {
 983                 n++;
 984                 frames >>= 1;
 985         }
 986
 987         s->control_register &= ~HDSP_LatencyMask;
 988         s->control_register |= hdsp_encode_latency(n);
 989
 990         hdsp_write(s, HDSP_controlRegister, s->control_register);
 991
 992         hdsp_compute_period_size(s);
 993
 994         spin_unlock_irq(&s->lock);
 995
 996         return 0;
 997 }
 998
 999 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1000 {
1001         u64 n;
1002         u32 r;
1003
1004         if (rate >= 112000)
1005                 rate /= 4;
1006         else if (rate >= 56000)
1007                 rate /= 2;
1008
1009         n = DDS_NUMERATOR;
1010         div64_32(&n, rate, &r);
1011         /* n should be less than 2^32 for being written to FREQ register */
1012         snd_assert((n >> 32) == 0);
1013         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1014            value to write it after a reset */
1015         hdsp->dds_value = n;
1016         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1017 }
1018
1019 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1020 {
1021         int reject_if_open = 0;
1022         int current_rate;
1023         int rate_bits;
1024
1025         /* ASSUMPTION: hdsp->lock is either held, or
1026            there is no need for it (e.g. during module
1027            initialization).
1028         */
1029
1030         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1031                 if (called_internally) {
1032                         /* request from ctl or card initialization */
1033                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1034                         return -1;
1035                 } else {
1036                         /* hw_param request while in AutoSync mode */
1037                         int external_freq = hdsp_external_sample_rate(hdsp);
1038                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1039
1040                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1041                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1042                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1043                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1044                         else if (rate != external_freq) {
1045                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1046                                 return -1;
1047                         }
1048                 }
1049         }
1050
1051         current_rate = hdsp->system_sample_rate;
1052
1053         /* Changing from a "single speed" to a "double speed" rate is
1054            not allowed if any substreams are open. This is because
1055            such a change causes a shift in the location of
1056            the DMA buffers and a reduction in the number of available
1057            buffers.
1058
1059            Note that a similar but essentially insoluble problem
1060            exists for externally-driven rate changes. All we can do
1061            is to flag rate changes in the read/write routines.  */
1062
1063         if (rate > 96000 && hdsp->io_type != H9632)
1064                 return -EINVAL;
1065
1066         switch (rate) {
1067         case 32000:
1068                 if (current_rate > 48000)
1069                         reject_if_open = 1;
1070                 rate_bits = HDSP_Frequency32KHz;
1071                 break;
1072         case 44100:
1073                 if (current_rate > 48000)
1074                         reject_if_open = 1;
1075                 rate_bits = HDSP_Frequency44_1KHz;
1076                 break;
1077         case 48000:
1078                 if (current_rate > 48000)
1079                         reject_if_open = 1;
1080                 rate_bits = HDSP_Frequency48KHz;
1081                 break;
1082         case 64000:
1083                 if (current_rate <= 48000 || current_rate > 96000)
1084                         reject_if_open = 1;
1085                 rate_bits = HDSP_Frequency64KHz;
1086                 break;
1087         case 88200:
1088                 if (current_rate <= 48000 || current_rate > 96000)
1089                         reject_if_open = 1;
1090                 rate_bits = HDSP_Frequency88_2KHz;
1091                 break;
1092         case 96000:
1093                 if (current_rate <= 48000 || current_rate > 96000)
1094                         reject_if_open = 1;
1095                 rate_bits = HDSP_Frequency96KHz;
1096                 break;
1097         case 128000:
1098                 if (current_rate < 128000)
1099                         reject_if_open = 1;
1100                 rate_bits = HDSP_Frequency128KHz;
1101                 break;
1102         case 176400:
1103                 if (current_rate < 128000)
1104                         reject_if_open = 1;
1105                 rate_bits = HDSP_Frequency176_4KHz;
1106                 break;
1107         case 192000:
1108                 if (current_rate < 128000)
1109                         reject_if_open = 1;
1110                 rate_bits = HDSP_Frequency192KHz;
1111                 break;
1112         default:
1113                 return -EINVAL;
1114         }
1115
1116         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1117                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1118                             hdsp->capture_pid,
1119                             hdsp->playback_pid);
1120                 return -EBUSY;
1121         }
1122
1123         hdsp->control_register &= ~HDSP_FrequencyMask;
1124         hdsp->control_register |= rate_bits;
1125         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1126
1127         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1128         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1129                 hdsp_set_dds_value(hdsp, rate);
1130
1131         if (rate >= 128000) {
1132                 hdsp->channel_map = channel_map_H9632_qs;
1133         } else if (rate > 48000) {
1134                 if (hdsp->io_type == H9632)
1135                         hdsp->channel_map = channel_map_H9632_ds;
1136                 else
1137                         hdsp->channel_map = channel_map_ds;
1138         } else {
1139                 switch (hdsp->io_type) {
1140                 case Multiface:
1141                         hdsp->channel_map = channel_map_mf_ss;
1142                         break;
1143                 case Digiface:
1144                 case H9652:
1145                         hdsp->channel_map = channel_map_df_ss;
1146                         break;
1147                 case H9632:
1148                         hdsp->channel_map = channel_map_H9632_ss;
1149                         break;
1150                 default:
1151                         /* should never happen */
1152                         break;
1153                 }
1154         }
1155
1156         hdsp->system_sample_rate = rate;
1157
1158         return 0;
1159 }
1160
1161 /*----------------------------------------------------------------------------
1162    MIDI
1163   ----------------------------------------------------------------------------*/
1164
1165 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1166 {
1167         /* the hardware already does the relevant bit-mask with 0xff */
1168         if (id)
1169                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1170         else
1171                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1172 }
1173
1174 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1175 {
1176         /* the hardware already does the relevant bit-mask with 0xff */
1177         if (id)
1178                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1179         else
1180                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1181 }
1182
1183 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1184 {
1185         if (id)
1186                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1187         else
1188                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1189 }
1190
1191 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1192 {
1193         int fifo_bytes_used;
1194
1195         if (id)
1196                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1197         else
1198                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1199
1200         if (fifo_bytes_used < 128)
1201                 return  128 - fifo_bytes_used;
1202         else
1203                 return 0;
1204 }
1205
1206 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1207 {
1208         while (snd_hdsp_midi_input_available (hdsp, id))
1209                 snd_hdsp_midi_read_byte (hdsp, id);
1210 }
1211
1212 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1213 {
1214         unsigned long flags;
1215         int n_pending;
1216         int to_write;
1217         int i;
1218         unsigned char buf[128];
1219
1220         /* Output is not interrupt driven */
1221
1222         spin_lock_irqsave (&hmidi->lock, flags);
1223         if (hmidi->output) {
1224                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1225                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1226                                 if (n_pending > (int)sizeof (buf))
1227                                         n_pending = sizeof (buf);
1228
1229                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1230                                         for (i = 0; i < to_write; ++i)
1231                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1232                                 }
1233                         }
1234                 }
1235         }
1236         spin_unlock_irqrestore (&hmidi->lock, flags);
1237         return 0;
1238 }
1239
1240 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1241 {
1242         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1243         unsigned long flags;
1244         int n_pending;
1245         int i;
1246
1247         spin_lock_irqsave (&hmidi->lock, flags);
1248         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1249                 if (hmidi->input) {
1250                         if (n_pending > (int)sizeof (buf))
1251                                 n_pending = sizeof (buf);
1252                         for (i = 0; i < n_pending; ++i)
1253                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1254                         if (n_pending)
1255                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1256                 } else {
1257                         /* flush the MIDI input FIFO */
1258                         while (--n_pending)
1259                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1260                 }
1261         }
1262         hmidi->pending = 0;
1263         if (hmidi->id)
1264                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1265         else
1266                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1267         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1268         spin_unlock_irqrestore (&hmidi->lock, flags);
1269         return snd_hdsp_midi_output_write (hmidi);
1270 }
1271
1272 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1273 {
1274         struct hdsp *hdsp;
1275         struct hdsp_midi *hmidi;
1276         unsigned long flags;
1277         u32 ie;
1278
1279         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1280         hdsp = hmidi->hdsp;
1281         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1282         spin_lock_irqsave (&hdsp->lock, flags);
1283         if (up) {
1284                 if (!(hdsp->control_register & ie)) {
1285                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1286                         hdsp->control_register |= ie;
1287                 }
1288         } else {
1289                 hdsp->control_register &= ~ie;
1290                 tasklet_kill(&hdsp->midi_tasklet);
1291         }
1292
1293         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1294         spin_unlock_irqrestore (&hdsp->lock, flags);
1295 }
1296
1297 static void snd_hdsp_midi_output_timer(unsigned long data)
1298 {
1299         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1300         unsigned long flags;
1301
1302         snd_hdsp_midi_output_write(hmidi);
1303         spin_lock_irqsave (&hmidi->lock, flags);
1304
1305         /* this does not bump hmidi->istimer, because the
1306            kernel automatically removed the timer when it
1307            expired, and we are now adding it back, thus
1308            leaving istimer wherever it was set before.
1309         */
1310
1311         if (hmidi->istimer) {
1312                 hmidi->timer.expires = 1 + jiffies;
1313                 add_timer(&hmidi->timer);
1314         }
1315
1316         spin_unlock_irqrestore (&hmidi->lock, flags);
1317 }
1318
1319 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1320 {
1321         struct hdsp_midi *hmidi;
1322         unsigned long flags;
1323
1324         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1325         spin_lock_irqsave (&hmidi->lock, flags);
1326         if (up) {
1327                 if (!hmidi->istimer) {
1328                         init_timer(&hmidi->timer);
1329                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1330                         hmidi->timer.data = (unsigned long) hmidi;
1331                         hmidi->timer.expires = 1 + jiffies;
1332                         add_timer(&hmidi->timer);
1333                         hmidi->istimer++;
1334                 }
1335         } else {
1336                 if (hmidi->istimer && --hmidi->istimer <= 0)
1337                         del_timer (&hmidi->timer);
1338         }
1339         spin_unlock_irqrestore (&hmidi->lock, flags);
1340         if (up)
1341                 snd_hdsp_midi_output_write(hmidi);
1342 }
1343
1344 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1345 {
1346         struct hdsp_midi *hmidi;
1347
1348         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1349         spin_lock_irq (&hmidi->lock);
1350         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1351         hmidi->input = substream;
1352         spin_unlock_irq (&hmidi->lock);
1353
1354         return 0;
1355 }
1356
1357 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1358 {
1359         struct hdsp_midi *hmidi;
1360
1361         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1362         spin_lock_irq (&hmidi->lock);
1363         hmidi->output = substream;
1364         spin_unlock_irq (&hmidi->lock);
1365
1366         return 0;
1367 }
1368
1369 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1370 {
1371         struct hdsp_midi *hmidi;
1372
1373         snd_hdsp_midi_input_trigger (substream, 0);
1374
1375         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1376         spin_lock_irq (&hmidi->lock);
1377         hmidi->input = NULL;
1378         spin_unlock_irq (&hmidi->lock);
1379
1380         return 0;
1381 }
1382
1383 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1384 {
1385         struct hdsp_midi *hmidi;
1386
1387         snd_hdsp_midi_output_trigger (substream, 0);
1388
1389         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1390         spin_lock_irq (&hmidi->lock);
1391         hmidi->output = NULL;
1392         spin_unlock_irq (&hmidi->lock);
1393
1394         return 0;
1395 }
1396
1397 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1398 {
1399         .open =         snd_hdsp_midi_output_open,
1400         .close =        snd_hdsp_midi_output_close,
1401         .trigger =      snd_hdsp_midi_output_trigger,
1402 };
1403
1404 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1405 {
1406         .open =         snd_hdsp_midi_input_open,
1407         .close =        snd_hdsp_midi_input_close,
1408         .trigger =      snd_hdsp_midi_input_trigger,
1409 };
1410
1411 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1412 {
1413         char buf[32];
1414
1415         hdsp->midi[id].id = id;
1416         hdsp->midi[id].rmidi = NULL;
1417         hdsp->midi[id].input = NULL;
1418         hdsp->midi[id].output = NULL;
1419         hdsp->midi[id].hdsp = hdsp;
1420         hdsp->midi[id].istimer = 0;
1421         hdsp->midi[id].pending = 0;
1422         spin_lock_init (&hdsp->midi[id].lock);
1423
1424         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1425         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1426                 return -1;
1427
1428         sprintf (hdsp->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1);
1429         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1430
1431         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1432         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1433
1434         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1435                 SNDRV_RAWMIDI_INFO_INPUT |
1436                 SNDRV_RAWMIDI_INFO_DUPLEX;
1437
1438         return 0;
1439 }
1440
1441 /*-----------------------------------------------------------------------------
1442   Control Interface
1443   ----------------------------------------------------------------------------*/
1444
1445 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1446 {
1447         u32 val = 0;
1448         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1449         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1450         if (val & HDSP_SPDIFProfessional)
1451                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1452         else
1453                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1454         return val;
1455 }
1456
1457 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1458 {
1459         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1460                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1461         if (val & HDSP_SPDIFProfessional)
1462                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1463         else
1464                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1465 }
1466
1467 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1468 {
1469         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1470         uinfo->count = 1;
1471         return 0;
1472 }
1473
1474 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1475 {
1476         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1477
1478         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1479         return 0;
1480 }
1481
1482 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1483 {
1484         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1485         int change;
1486         u32 val;
1487
1488         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1489         spin_lock_irq(&hdsp->lock);
1490         change = val != hdsp->creg_spdif;
1491         hdsp->creg_spdif = val;
1492         spin_unlock_irq(&hdsp->lock);
1493         return change;
1494 }
1495
1496 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1497 {
1498         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1499         uinfo->count = 1;
1500         return 0;
1501 }
1502
1503 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1504 {
1505         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1506
1507         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1508         return 0;
1509 }
1510
1511 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1512 {
1513         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1514         int change;
1515         u32 val;
1516
1517         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1518         spin_lock_irq(&hdsp->lock);
1519         change = val != hdsp->creg_spdif_stream;
1520         hdsp->creg_spdif_stream = val;
1521         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1522         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1523         spin_unlock_irq(&hdsp->lock);
1524         return change;
1525 }
1526
1527 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1528 {
1529         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1530         uinfo->count = 1;
1531         return 0;
1532 }
1533
1534 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1535 {
1536         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1537         return 0;
1538 }
1539
1540 #define HDSP_SPDIF_IN(xname, xindex) \
1541 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1542   .name = xname, \
1543   .index = xindex, \
1544   .info = snd_hdsp_info_spdif_in, \
1545   .get = snd_hdsp_get_spdif_in, \
1546   .put = snd_hdsp_put_spdif_in }
1547
1548 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1549 {
1550         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1551 }
1552
1553 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1554 {
1555         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1556         hdsp->control_register |= hdsp_encode_spdif_in(in);
1557         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1558         return 0;
1559 }
1560
1561 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1562 {
1563         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1564         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1565
1566         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1567         uinfo->count = 1;
1568         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1569         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1570                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1571         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1572         return 0;
1573 }
1574
1575 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1576 {
1577         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1578
1579         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1580         return 0;
1581 }
1582
1583 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1584 {
1585         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1586         int change;
1587         unsigned int val;
1588
1589         if (!snd_hdsp_use_is_exclusive(hdsp))
1590                 return -EBUSY;
1591         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1592         spin_lock_irq(&hdsp->lock);
1593         change = val != hdsp_spdif_in(hdsp);
1594         if (change)
1595                 hdsp_set_spdif_input(hdsp, val);
1596         spin_unlock_irq(&hdsp->lock);
1597         return change;
1598 }
1599
1600 #define HDSP_SPDIF_OUT(xname, xindex) \
1601 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1602   .info = snd_hdsp_info_spdif_bits, \
1603   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1604
1605 static int hdsp_spdif_out(struct hdsp *hdsp)
1606 {
1607         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1608 }
1609
1610 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1611 {
1612         if (out)
1613                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1614         else
1615                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1616         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1617         return 0;
1618 }
1619
1620 static int snd_hdsp_info_spdif_bits(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1621 {
1622         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1623         uinfo->count = 1;
1624         uinfo->value.integer.min = 0;
1625         uinfo->value.integer.max = 1;
1626         return 0;
1627 }
1628
1629 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1630 {
1631         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1632
1633         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1634         return 0;
1635 }
1636
1637 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1638 {
1639         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1640         int change;
1641         unsigned int val;
1642
1643         if (!snd_hdsp_use_is_exclusive(hdsp))
1644                 return -EBUSY;
1645         val = ucontrol->value.integer.value[0] & 1;
1646         spin_lock_irq(&hdsp->lock);
1647         change = (int)val != hdsp_spdif_out(hdsp);
1648         hdsp_set_spdif_output(hdsp, val);
1649         spin_unlock_irq(&hdsp->lock);
1650         return change;
1651 }
1652
1653 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1654 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1655   .info = snd_hdsp_info_spdif_bits, \
1656   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1657
1658 static int hdsp_spdif_professional(struct hdsp *hdsp)
1659 {
1660         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1661 }
1662
1663 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1664 {
1665         if (val)
1666                 hdsp->control_register |= HDSP_SPDIFProfessional;
1667         else
1668                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1669         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1670         return 0;
1671 }
1672
1673 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1674 {
1675         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1676
1677         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1678         return 0;
1679 }
1680
1681 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1682 {
1683         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1684         int change;
1685         unsigned int val;
1686
1687         if (!snd_hdsp_use_is_exclusive(hdsp))
1688                 return -EBUSY;
1689         val = ucontrol->value.integer.value[0] & 1;
1690         spin_lock_irq(&hdsp->lock);
1691         change = (int)val != hdsp_spdif_professional(hdsp);
1692         hdsp_set_spdif_professional(hdsp, val);
1693         spin_unlock_irq(&hdsp->lock);
1694         return change;
1695 }
1696
1697 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1698 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1699   .info = snd_hdsp_info_spdif_bits, \
1700   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1701
1702 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1703 {
1704         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1705 }
1706
1707 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1708 {
1709         if (val)
1710                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1711         else
1712                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1713         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1714         return 0;
1715 }
1716
1717 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1718 {
1719         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1720
1721         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1722         return 0;
1723 }
1724
1725 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1726 {
1727         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1728         int change;
1729         unsigned int val;
1730
1731         if (!snd_hdsp_use_is_exclusive(hdsp))
1732                 return -EBUSY;
1733         val = ucontrol->value.integer.value[0] & 1;
1734         spin_lock_irq(&hdsp->lock);
1735         change = (int)val != hdsp_spdif_emphasis(hdsp);
1736         hdsp_set_spdif_emphasis(hdsp, val);
1737         spin_unlock_irq(&hdsp->lock);
1738         return change;
1739 }
1740
1741 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1742 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1743   .info = snd_hdsp_info_spdif_bits, \
1744   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1745
1746 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1747 {
1748         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1749 }
1750
1751 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1752 {
1753         if (val)
1754                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1755         else
1756                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1757         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1758         return 0;
1759 }
1760
1761 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1762 {
1763         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1764
1765         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1766         return 0;
1767 }
1768
1769 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1770 {
1771         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1772         int change;
1773         unsigned int val;
1774
1775         if (!snd_hdsp_use_is_exclusive(hdsp))
1776                 return -EBUSY;
1777         val = ucontrol->value.integer.value[0] & 1;
1778         spin_lock_irq(&hdsp->lock);
1779         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1780         hdsp_set_spdif_nonaudio(hdsp, val);
1781         spin_unlock_irq(&hdsp->lock);
1782         return change;
1783 }
1784
1785 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1786 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1787   .name = xname, \
1788   .index = xindex, \
1789   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1790   .info = snd_hdsp_info_spdif_sample_rate, \
1791   .get = snd_hdsp_get_spdif_sample_rate \
1792 }
1793
1794 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1795 {
1796         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1797         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1798
1799         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1800         uinfo->count = 1;
1801         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1802         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1803                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1804         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1805         return 0;
1806 }
1807
1808 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1809 {
1810         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1811
1812         switch (hdsp_spdif_sample_rate(hdsp)) {
1813         case 32000:
1814                 ucontrol->value.enumerated.item[0] = 0;
1815                 break;
1816         case 44100:
1817                 ucontrol->value.enumerated.item[0] = 1;
1818                 break;
1819         case 48000:
1820                 ucontrol->value.enumerated.item[0] = 2;
1821                 break;
1822         case 64000:
1823                 ucontrol->value.enumerated.item[0] = 3;
1824                 break;
1825         case 88200:
1826                 ucontrol->value.enumerated.item[0] = 4;
1827                 break;
1828         case 96000:
1829                 ucontrol->value.enumerated.item[0] = 5;
1830                 break;
1831         case 128000:
1832                 ucontrol->value.enumerated.item[0] = 7;
1833                 break;
1834         case 176400:
1835                 ucontrol->value.enumerated.item[0] = 8;
1836                 break;
1837         case 192000:
1838                 ucontrol->value.enumerated.item[0] = 9;
1839                 break;
1840         default:
1841                 ucontrol->value.enumerated.item[0] = 6;
1842         }
1843         return 0;
1844 }
1845
1846 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1847 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1848   .name = xname, \
1849   .index = xindex, \
1850   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1851   .info = snd_hdsp_info_system_sample_rate, \
1852   .get = snd_hdsp_get_system_sample_rate \
1853 }
1854
1855 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1856 {
1857         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1858         uinfo->count = 1;
1859         return 0;
1860 }
1861
1862 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1863 {
1864         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1865
1866         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1867         return 0;
1868 }
1869
1870 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1871 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1872   .name = xname, \
1873   .index = xindex, \
1874   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1875   .info = snd_hdsp_info_autosync_sample_rate, \
1876   .get = snd_hdsp_get_autosync_sample_rate \
1877 }
1878
1879 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1880 {
1881         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1882         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1883         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1884         uinfo->count = 1;
1885         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1886         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1887                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1888         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1889         return 0;
1890 }
1891
1892 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1893 {
1894         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1895
1896         switch (hdsp_external_sample_rate(hdsp)) {
1897         case 32000:
1898                 ucontrol->value.enumerated.item[0] = 0;
1899                 break;
1900         case 44100:
1901                 ucontrol->value.enumerated.item[0] = 1;
1902                 break;
1903         case 48000:
1904                 ucontrol->value.enumerated.item[0] = 2;
1905                 break;
1906         case 64000:
1907                 ucontrol->value.enumerated.item[0] = 3;
1908                 break;
1909         case 88200:
1910                 ucontrol->value.enumerated.item[0] = 4;
1911                 break;
1912         case 96000:
1913                 ucontrol->value.enumerated.item[0] = 5;
1914                 break;
1915         case 128000:
1916                 ucontrol->value.enumerated.item[0] = 7;
1917                 break;
1918         case 176400:
1919                 ucontrol->value.enumerated.item[0] = 8;
1920                 break;
1921         case 192000:
1922                 ucontrol->value.enumerated.item[0] = 9;
1923                 break;
1924         default:
1925                 ucontrol->value.enumerated.item[0] = 6;
1926         }
1927         return 0;
1928 }
1929
1930 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1931 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1932   .name = xname, \
1933   .index = xindex, \
1934   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1935   .info = snd_hdsp_info_system_clock_mode, \
1936   .get = snd_hdsp_get_system_clock_mode \
1937 }
1938
1939 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1940 {
1941         if (hdsp->control_register & HDSP_ClockModeMaster)
1942                 return 0;
1943         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1944                         return 0;
1945         return 1;
1946 }
1947
1948 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1949 {
1950         static char *texts[] = {"Master", "Slave" };
1951
1952         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1953         uinfo->count = 1;
1954         uinfo->value.enumerated.items = 2;
1955         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1956                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1957         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1958         return 0;
1959 }
1960
1961 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1962 {
1963         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1964
1965         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
1966         return 0;
1967 }
1968
1969 #define HDSP_CLOCK_SOURCE(xname, xindex) \
1970 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1971   .name = xname, \
1972   .index = xindex, \
1973   .info = snd_hdsp_info_clock_source, \
1974   .get = snd_hdsp_get_clock_source, \
1975   .put = snd_hdsp_put_clock_source \
1976 }
1977
1978 static int hdsp_clock_source(struct hdsp *hdsp)
1979 {
1980         if (hdsp->control_register & HDSP_ClockModeMaster) {
1981                 switch (hdsp->system_sample_rate) {
1982                 case 32000:
1983                         return 1;
1984                 case 44100:
1985                         return 2;
1986                 case 48000:
1987                         return 3;
1988                 case 64000:
1989                         return 4;
1990                 case 88200:
1991                         return 5;
1992                 case 96000:
1993                         return 6;
1994                 case 128000:
1995                         return 7;
1996                 case 176400:
1997                         return 8;
1998                 case 192000:
1999                         return 9;
2000                 default:
2001                         return 3;
2002                 }
2003         } else {
2004                 return 0;
2005         }
2006 }
2007
2008 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2009 {
2010         int rate;
2011         switch (mode) {
2012         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2013                 if (hdsp_external_sample_rate(hdsp) != 0) {
2014                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2015                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2016                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2017                         return 0;
2018                     }
2019                 }
2020                 return -1;
2021         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2022                 rate = 32000;
2023                 break;
2024         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2025                 rate = 44100;
2026                 break;
2027         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2028                 rate = 48000;
2029                 break;
2030         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2031                 rate = 64000;
2032                 break;
2033         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2034                 rate = 88200;
2035                 break;
2036         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2037                 rate = 96000;
2038                 break;
2039         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2040                 rate = 128000;
2041                 break;
2042         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2043                 rate = 176400;
2044                 break;
2045         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2046                 rate = 192000;
2047                 break;
2048         default:
2049                 rate = 48000;
2050         }
2051         hdsp->control_register |= HDSP_ClockModeMaster;
2052         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2053         hdsp_set_rate(hdsp, rate, 1);
2054         return 0;
2055 }
2056
2057 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2058 {
2059         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2060         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2061
2062         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2063         uinfo->count = 1;
2064         if (hdsp->io_type == H9632)
2065             uinfo->value.enumerated.items = 10;
2066         else
2067             uinfo->value.enumerated.items = 7;
2068         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2069                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2070         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2071         return 0;
2072 }
2073
2074 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2075 {
2076         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2077
2078         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2079         return 0;
2080 }
2081
2082 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2083 {
2084         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2085         int change;
2086         int val;
2087
2088         if (!snd_hdsp_use_is_exclusive(hdsp))
2089                 return -EBUSY;
2090         val = ucontrol->value.enumerated.item[0];
2091         if (val < 0) val = 0;
2092         if (hdsp->io_type == H9632) {
2093                 if (val > 9)
2094                         val = 9;
2095         } else {
2096                 if (val > 6)
2097                         val = 6;
2098         }
2099         spin_lock_irq(&hdsp->lock);
2100         if (val != hdsp_clock_source(hdsp))
2101                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2102         else
2103                 change = 0;
2104         spin_unlock_irq(&hdsp->lock);
2105         return change;
2106 }
2107
2108 static int snd_hdsp_info_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2109 {
2110         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2111         uinfo->count = 1;
2112         uinfo->value.integer.min = 0;
2113         uinfo->value.integer.max = 1;
2114         return 0;
2115 }
2116
2117 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2118 {
2119         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2120
2121         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2122         return 0;
2123 }
2124
2125 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2126 {
2127         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2128         int change;
2129
2130         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2131         if (change)
2132                 hdsp->clock_source_locked = ucontrol->value.integer.value[0];
2133         return change;
2134 }
2135
2136 #define HDSP_DA_GAIN(xname, xindex) \
2137 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2138   .name = xname, \
2139   .index = xindex, \
2140   .info = snd_hdsp_info_da_gain, \
2141   .get = snd_hdsp_get_da_gain, \
2142   .put = snd_hdsp_put_da_gain \
2143 }
2144
2145 static int hdsp_da_gain(struct hdsp *hdsp)
2146 {
2147         switch (hdsp->control_register & HDSP_DAGainMask) {
2148         case HDSP_DAGainHighGain:
2149                 return 0;
2150         case HDSP_DAGainPlus4dBu:
2151                 return 1;
2152         case HDSP_DAGainMinus10dBV:
2153                 return 2;
2154         default:
2155                 return 1;
2156         }
2157 }
2158
2159 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2160 {
2161         hdsp->control_register &= ~HDSP_DAGainMask;
2162         switch (mode) {
2163         case 0:
2164                 hdsp->control_register |= HDSP_DAGainHighGain;
2165                 break;
2166         case 1:
2167                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2168                 break;
2169         case 2:
2170                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2171                 break;
2172         default:
2173                 return -1;
2174
2175         }
2176         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2177         return 0;
2178 }
2179
2180 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2181 {
2182         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2183
2184         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2185         uinfo->count = 1;
2186         uinfo->value.enumerated.items = 3;
2187         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2188                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2189         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2190         return 0;
2191 }
2192
2193 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2194 {
2195         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2196
2197         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2198         return 0;
2199 }
2200
2201 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2202 {
2203         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2204         int change;
2205         int val;
2206
2207         if (!snd_hdsp_use_is_exclusive(hdsp))
2208                 return -EBUSY;
2209         val = ucontrol->value.enumerated.item[0];
2210         if (val < 0) val = 0;
2211         if (val > 2) val = 2;
2212         spin_lock_irq(&hdsp->lock);
2213         if (val != hdsp_da_gain(hdsp))
2214                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2215         else
2216                 change = 0;
2217         spin_unlock_irq(&hdsp->lock);
2218         return change;
2219 }
2220
2221 #define HDSP_AD_GAIN(xname, xindex) \
2222 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2223   .name = xname, \
2224   .index = xindex, \
2225   .info = snd_hdsp_info_ad_gain, \
2226   .get = snd_hdsp_get_ad_gain, \
2227   .put = snd_hdsp_put_ad_gain \
2228 }
2229
2230 static int hdsp_ad_gain(struct hdsp *hdsp)
2231 {
2232         switch (hdsp->control_register & HDSP_ADGainMask) {
2233         case HDSP_ADGainMinus10dBV:
2234                 return 0;
2235         case HDSP_ADGainPlus4dBu:
2236                 return 1;
2237         case HDSP_ADGainLowGain:
2238                 return 2;
2239         default:
2240                 return 1;
2241         }
2242 }
2243
2244 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2245 {
2246         hdsp->control_register &= ~HDSP_ADGainMask;
2247         switch (mode) {
2248         case 0:
2249                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2250                 break;
2251         case 1:
2252                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2253                 break;
2254         case 2:
2255                 hdsp->control_register |= HDSP_ADGainLowGain;
2256                 break;
2257         default:
2258                 return -1;
2259
2260         }
2261         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2262         return 0;
2263 }
2264
2265 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2266 {
2267         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2268
2269         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2270         uinfo->count = 1;
2271         uinfo->value.enumerated.items = 3;
2272         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2273                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2274         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2275         return 0;
2276 }
2277
2278 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2279 {
2280         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2281
2282         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2283         return 0;
2284 }
2285
2286 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2287 {
2288         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2289         int change;
2290         int val;
2291
2292         if (!snd_hdsp_use_is_exclusive(hdsp))
2293                 return -EBUSY;
2294         val = ucontrol->value.enumerated.item[0];
2295         if (val < 0) val = 0;
2296         if (val > 2) val = 2;
2297         spin_lock_irq(&hdsp->lock);
2298         if (val != hdsp_ad_gain(hdsp))
2299                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2300         else
2301                 change = 0;
2302         spin_unlock_irq(&hdsp->lock);
2303         return change;
2304 }
2305
2306 #define HDSP_PHONE_GAIN(xname, xindex) \
2307 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2308   .name = xname, \
2309   .index = xindex, \
2310   .info = snd_hdsp_info_phone_gain, \
2311   .get = snd_hdsp_get_phone_gain, \
2312   .put = snd_hdsp_put_phone_gain \
2313 }
2314
2315 static int hdsp_phone_gain(struct hdsp *hdsp)
2316 {
2317         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2318         case HDSP_PhoneGain0dB:
2319                 return 0;
2320         case HDSP_PhoneGainMinus6dB:
2321                 return 1;
2322         case HDSP_PhoneGainMinus12dB:
2323                 return 2;
2324         default:
2325                 return 0;
2326         }
2327 }
2328
2329 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2330 {
2331         hdsp->control_register &= ~HDSP_PhoneGainMask;
2332         switch (mode) {
2333         case 0:
2334                 hdsp->control_register |= HDSP_PhoneGain0dB;
2335                 break;
2336         case 1:
2337                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2338                 break;
2339         case 2:
2340                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2341                 break;
2342         default:
2343                 return -1;
2344
2345         }
2346         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2347         return 0;
2348 }
2349
2350 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2351 {
2352         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2353
2354         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2355         uinfo->count = 1;
2356         uinfo->value.enumerated.items = 3;
2357         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2358                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2359         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2360         return 0;
2361 }
2362
2363 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2364 {
2365         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2366
2367         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2368         return 0;
2369 }
2370
2371 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2372 {
2373         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2374         int change;
2375         int val;
2376
2377         if (!snd_hdsp_use_is_exclusive(hdsp))
2378                 return -EBUSY;
2379         val = ucontrol->value.enumerated.item[0];
2380         if (val < 0) val = 0;
2381         if (val > 2) val = 2;
2382         spin_lock_irq(&hdsp->lock);
2383         if (val != hdsp_phone_gain(hdsp))
2384                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2385         else
2386                 change = 0;
2387         spin_unlock_irq(&hdsp->lock);
2388         return change;
2389 }
2390
2391 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2392 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2393   .name = xname, \
2394   .index = xindex, \
2395   .info = snd_hdsp_info_xlr_breakout_cable, \
2396   .get = snd_hdsp_get_xlr_breakout_cable, \
2397   .put = snd_hdsp_put_xlr_breakout_cable \
2398 }
2399
2400 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2401 {
2402         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2403                 return 1;
2404         return 0;
2405 }
2406
2407 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2408 {
2409         if (mode)
2410                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2411         else
2412                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2413         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2414         return 0;
2415 }
2416
2417 static int snd_hdsp_info_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2418 {
2419         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2420         uinfo->count = 1;
2421         uinfo->value.integer.min = 0;
2422         uinfo->value.integer.max = 1;
2423         return 0;
2424 }
2425
2426 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2427 {
2428         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2429
2430         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2431         return 0;
2432 }
2433
2434 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2435 {
2436         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2437         int change;
2438         int val;
2439
2440         if (!snd_hdsp_use_is_exclusive(hdsp))
2441                 return -EBUSY;
2442         val = ucontrol->value.integer.value[0] & 1;
2443         spin_lock_irq(&hdsp->lock);
2444         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2445         hdsp_set_xlr_breakout_cable(hdsp, val);
2446         spin_unlock_irq(&hdsp->lock);
2447         return change;
2448 }
2449
2450 /* (De)activates old RME Analog Extension Board
2451    These are connected to the internal ADAT connector
2452    Switching this on desactivates external ADAT
2453 */
2454 #define HDSP_AEB(xname, xindex) \
2455 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2456   .name = xname, \
2457   .index = xindex, \
2458   .info = snd_hdsp_info_aeb, \
2459   .get = snd_hdsp_get_aeb, \
2460   .put = snd_hdsp_put_aeb \
2461 }
2462
2463 static int hdsp_aeb(struct hdsp *hdsp)
2464 {
2465         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2466                 return 1;
2467         return 0;
2468 }
2469
2470 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2471 {
2472         if (mode)
2473                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2474         else
2475                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2476         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2477         return 0;
2478 }
2479
2480 static int snd_hdsp_info_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2481 {
2482         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2483         uinfo->count = 1;
2484         uinfo->value.integer.min = 0;
2485         uinfo->value.integer.max = 1;
2486         return 0;
2487 }
2488
2489 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2490 {
2491         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2492
2493         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2494         return 0;
2495 }
2496
2497 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2498 {
2499         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2500         int change;
2501         int val;
2502
2503         if (!snd_hdsp_use_is_exclusive(hdsp))
2504                 return -EBUSY;
2505         val = ucontrol->value.integer.value[0] & 1;
2506         spin_lock_irq(&hdsp->lock);
2507         change = (int)val != hdsp_aeb(hdsp);
2508         hdsp_set_aeb(hdsp, val);
2509         spin_unlock_irq(&hdsp->lock);
2510         return change;
2511 }
2512
2513 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2514 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2515   .name = xname, \
2516   .index = xindex, \
2517   .info = snd_hdsp_info_pref_sync_ref, \
2518   .get = snd_hdsp_get_pref_sync_ref, \
2519   .put = snd_hdsp_put_pref_sync_ref \
2520 }
2521
2522 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2523 {
2524         /* Notice that this looks at the requested sync source,
2525            not the one actually in use.
2526         */
2527
2528         switch (hdsp->control_register & HDSP_SyncRefMask) {
2529         case HDSP_SyncRef_ADAT1:
2530                 return HDSP_SYNC_FROM_ADAT1;
2531         case HDSP_SyncRef_ADAT2:
2532                 return HDSP_SYNC_FROM_ADAT2;
2533         case HDSP_SyncRef_ADAT3:
2534                 return HDSP_SYNC_FROM_ADAT3;
2535         case HDSP_SyncRef_SPDIF:
2536                 return HDSP_SYNC_FROM_SPDIF;
2537         case HDSP_SyncRef_WORD:
2538                 return HDSP_SYNC_FROM_WORD;
2539         case HDSP_SyncRef_ADAT_SYNC:
2540                 return HDSP_SYNC_FROM_ADAT_SYNC;
2541         default:
2542                 return HDSP_SYNC_FROM_WORD;
2543         }
2544         return 0;
2545 }
2546
2547 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2548 {
2549         hdsp->control_register &= ~HDSP_SyncRefMask;
2550         switch (pref) {
2551         case HDSP_SYNC_FROM_ADAT1:
2552                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2553                 break;
2554         case HDSP_SYNC_FROM_ADAT2:
2555                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2556                 break;
2557         case HDSP_SYNC_FROM_ADAT3:
2558                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2559                 break;
2560         case HDSP_SYNC_FROM_SPDIF:
2561                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2562                 break;
2563         case HDSP_SYNC_FROM_WORD:
2564                 hdsp->control_register |= HDSP_SyncRef_WORD;
2565                 break;
2566         case HDSP_SYNC_FROM_ADAT_SYNC:
2567                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2568                 break;
2569         default:
2570                 return -1;
2571         }
2572         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2573         return 0;
2574 }
2575
2576 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2577 {
2578         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2579         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2580
2581         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2582         uinfo->count = 1;
2583
2584         switch (hdsp->io_type) {
2585         case Digiface:
2586         case H9652:
2587                 uinfo->value.enumerated.items = 6;
2588                 break;
2589         case Multiface:
2590                 uinfo->value.enumerated.items = 4;
2591                 break;
2592         case H9632:
2593                 uinfo->value.enumerated.items = 3;
2594                 break;
2595         default:
2596                 uinfo->value.enumerated.items = 0;
2597                 break;
2598         }
2599
2600         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2601                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2602         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2603         return 0;
2604 }
2605
2606 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2607 {
2608         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2609
2610         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2611         return 0;
2612 }
2613
2614 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2615 {
2616         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2617         int change, max;
2618         unsigned int val;
2619
2620         if (!snd_hdsp_use_is_exclusive(hdsp))
2621                 return -EBUSY;
2622
2623         switch (hdsp->io_type) {
2624         case Digiface:
2625         case H9652:
2626                 max = 6;
2627                 break;
2628         case Multiface:
2629                 max = 4;
2630                 break;
2631         case H9632:
2632                 max = 3;
2633                 break;
2634         default:
2635                 return -EIO;
2636         }
2637
2638         val = ucontrol->value.enumerated.item[0] % max;
2639         spin_lock_irq(&hdsp->lock);
2640         change = (int)val != hdsp_pref_sync_ref(hdsp);
2641         hdsp_set_pref_sync_ref(hdsp, val);
2642         spin_unlock_irq(&hdsp->lock);
2643         return change;
2644 }
2645
2646 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2647 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2648   .name = xname, \
2649   .index = xindex, \
2650   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2651   .info = snd_hdsp_info_autosync_ref, \
2652   .get = snd_hdsp_get_autosync_ref, \
2653 }
2654
2655 static int hdsp_autosync_ref(struct hdsp *hdsp)
2656 {
2657         /* This looks at the autosync selected sync reference */
2658         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2659
2660         switch (status2 & HDSP_SelSyncRefMask) {
2661         case HDSP_SelSyncRef_WORD:
2662                 return HDSP_AUTOSYNC_FROM_WORD;
2663         case HDSP_SelSyncRef_ADAT_SYNC:
2664                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2665         case HDSP_SelSyncRef_SPDIF:
2666                 return HDSP_AUTOSYNC_FROM_SPDIF;
2667         case HDSP_SelSyncRefMask:
2668                 return HDSP_AUTOSYNC_FROM_NONE;
2669         case HDSP_SelSyncRef_ADAT1:
2670                 return HDSP_AUTOSYNC_FROM_ADAT1;
2671         case HDSP_SelSyncRef_ADAT2:
2672                 return HDSP_AUTOSYNC_FROM_ADAT2;
2673         case HDSP_SelSyncRef_ADAT3:
2674                 return HDSP_AUTOSYNC_FROM_ADAT3;
2675         default:
2676                 return HDSP_AUTOSYNC_FROM_WORD;
2677         }
2678         return 0;
2679 }
2680
2681 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2682 {
2683         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2684
2685         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2686         uinfo->count = 1;
2687         uinfo->value.enumerated.items = 7;
2688         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2689                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2690         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2691         return 0;
2692 }
2693
2694 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2695 {
2696         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2697
2698         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2699         return 0;
2700 }
2701
2702 #define HDSP_LINE_OUT(xname, xindex) \
2703 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2704   .name = xname, \
2705   .index = xindex, \
2706   .info = snd_hdsp_info_line_out, \
2707   .get = snd_hdsp_get_line_out, \
2708   .put = snd_hdsp_put_line_out \
2709 }
2710
2711 static int hdsp_line_out(struct hdsp *hdsp)
2712 {
2713         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2714 }
2715
2716 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2717 {
2718         if (out)
2719                 hdsp->control_register |= HDSP_LineOut;
2720         else
2721                 hdsp->control_register &= ~HDSP_LineOut;
2722         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2723         return 0;
2724 }
2725
2726 static int snd_hdsp_info_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2727 {
2728         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2729         uinfo->count = 1;
2730         uinfo->value.integer.min = 0;
2731         uinfo->value.integer.max = 1;
2732         return 0;
2733 }
2734
2735 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2736 {
2737         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2738
2739         spin_lock_irq(&hdsp->lock);
2740         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2741         spin_unlock_irq(&hdsp->lock);
2742         return 0;
2743 }
2744
2745 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2746 {
2747         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2748         int change;
2749         unsigned int val;
2750
2751         if (!snd_hdsp_use_is_exclusive(hdsp))
2752                 return -EBUSY;
2753         val = ucontrol->value.integer.value[0] & 1;
2754         spin_lock_irq(&hdsp->lock);
2755         change = (int)val != hdsp_line_out(hdsp);
2756         hdsp_set_line_output(hdsp, val);
2757         spin_unlock_irq(&hdsp->lock);
2758         return change;
2759 }
2760
2761 #define HDSP_PRECISE_POINTER(xname, xindex) \
2762 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2763   .name = xname, \
2764   .index = xindex, \
2765   .info = snd_hdsp_info_precise_pointer, \
2766   .get = snd_hdsp_get_precise_pointer, \
2767   .put = snd_hdsp_put_precise_pointer \
2768 }
2769
2770 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2771 {
2772         if (precise)
2773                 hdsp->precise_ptr = 1;
2774         else
2775                 hdsp->precise_ptr = 0;
2776         return 0;
2777 }
2778
2779 static int snd_hdsp_info_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2780 {
2781         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2782         uinfo->count = 1;
2783         uinfo->value.integer.min = 0;
2784         uinfo->value.integer.max = 1;
2785         return 0;
2786 }
2787
2788 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2789 {
2790         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2791
2792         spin_lock_irq(&hdsp->lock);
2793         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2794         spin_unlock_irq(&hdsp->lock);
2795         return 0;
2796 }
2797
2798 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2799 {
2800         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2801         int change;
2802         unsigned int val;
2803
2804         if (!snd_hdsp_use_is_exclusive(hdsp))
2805                 return -EBUSY;
2806         val = ucontrol->value.integer.value[0] & 1;
2807         spin_lock_irq(&hdsp->lock);
2808         change = (int)val != hdsp->precise_ptr;
2809         hdsp_set_precise_pointer(hdsp, val);
2810         spin_unlock_irq(&hdsp->lock);
2811         return change;
2812 }
2813
2814 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2815 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2816   .name = xname, \
2817   .index = xindex, \
2818   .info = snd_hdsp_info_use_midi_tasklet, \
2819   .get = snd_hdsp_get_use_midi_tasklet, \
2820   .put = snd_hdsp_put_use_midi_tasklet \
2821 }
2822
2823 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2824 {
2825         if (use_tasklet)
2826                 hdsp->use_midi_tasklet = 1;
2827         else
2828                 hdsp->use_midi_tasklet = 0;
2829         return 0;
2830 }
2831
2832 static int snd_hdsp_info_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2833 {
2834         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2835         uinfo->count = 1;
2836         uinfo->value.integer.min = 0;
2837         uinfo->value.integer.max = 1;
2838         return 0;
2839 }
2840
2841 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2842 {
2843         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2844
2845         spin_lock_irq(&hdsp->lock);
2846         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2847         spin_unlock_irq(&hdsp->lock);
2848         return 0;
2849 }
2850
2851 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2852 {
2853         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2854         int change;
2855         unsigned int val;
2856
2857         if (!snd_hdsp_use_is_exclusive(hdsp))
2858                 return -EBUSY;
2859         val = ucontrol->value.integer.value[0] & 1;
2860         spin_lock_irq(&hdsp->lock);
2861         change = (int)val != hdsp->use_midi_tasklet;
2862         hdsp_set_use_midi_tasklet(hdsp, val);
2863         spin_unlock_irq(&hdsp->lock);
2864         return change;
2865 }
2866
2867 #define HDSP_MIXER(xname, xindex) \
2868 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2869   .name = xname, \
2870   .index = xindex, \
2871   .device = 0, \
2872   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2873                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2874   .info = snd_hdsp_info_mixer, \
2875   .get = snd_hdsp_get_mixer, \
2876   .put = snd_hdsp_put_mixer \
2877 }
2878
2879 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2880 {
2881         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2882         uinfo->count = 3;
2883         uinfo->value.integer.min = 0;
2884         uinfo->value.integer.max = 65536;
2885         uinfo->value.integer.step = 1;
2886         return 0;
2887 }
2888
2889 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2890 {
2891         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2892         int source;
2893         int destination;
2894         int addr;
2895
2896         source = ucontrol->value.integer.value[0];
2897         destination = ucontrol->value.integer.value[1];
2898
2899         if (source >= hdsp->max_channels)
2900                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2901         else
2902                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2903
2904         spin_lock_irq(&hdsp->lock);
2905         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2906         spin_unlock_irq(&hdsp->lock);
2907         return 0;
2908 }
2909
2910 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2911 {
2912         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2913         int change;
2914         int source;
2915         int destination;
2916         int gain;
2917         int addr;
2918
2919         if (!snd_hdsp_use_is_exclusive(hdsp))
2920                 return -EBUSY;
2921
2922         source = ucontrol->value.integer.value[0];
2923         destination = ucontrol->value.integer.value[1];
2924
2925         if (source >= hdsp->max_channels)
2926                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2927         else
2928                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2929
2930         gain = ucontrol->value.integer.value[2];
2931
2932         spin_lock_irq(&hdsp->lock);
2933         change = gain != hdsp_read_gain(hdsp, addr);
2934         if (change)
2935                 hdsp_write_gain(hdsp, addr, gain);
2936         spin_unlock_irq(&hdsp->lock);
2937         return change;
2938 }
2939
2940 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2941 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2942   .name = xname, \
2943   .index = xindex, \
2944   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2945   .info = snd_hdsp_info_sync_check, \
2946   .get = snd_hdsp_get_wc_sync_check \
2947 }
2948
2949 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2950 {
2951         static char *texts[] = {"No Lock", "Lock", "Sync" };
2952         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2953         uinfo->count = 1;
2954         uinfo->value.enumerated.items = 3;
2955         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2956                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2957         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2958         return 0;
2959 }
2960
2961 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2962 {
2963         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2964         if (status2 & HDSP_wc_lock) {
2965                 if (status2 & HDSP_wc_sync)
2966                         return 2;
2967                 else
2968                          return 1;
2969         } else
2970                 return 0;
2971         return 0;
2972 }
2973
2974 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2975 {
2976         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2977
2978         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2979         return 0;
2980 }
2981
2982 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2983 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2984   .name = xname, \
2985   .index = xindex, \
2986   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2987   .info = snd_hdsp_info_sync_check, \
2988   .get = snd_hdsp_get_spdif_sync_check \
2989 }
2990
2991 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2992 {
2993         int status = hdsp_read(hdsp, HDSP_statusRegister);
2994         if (status & HDSP_SPDIFErrorFlag)
2995                 return 0;
2996         else {
2997                 if (status & HDSP_SPDIFSync)
2998                         return 2;
2999                 else
3000                         return 1;
3001         }
3002         return 0;
3003 }
3004
3005 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3006 {
3007         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3008
3009         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3010         return 0;
3011 }
3012
3013 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3014 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3015   .name = xname, \
3016   .index = xindex, \
3017   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3018   .info = snd_hdsp_info_sync_check, \
3019   .get = snd_hdsp_get_adatsync_sync_check \
3020 }
3021
3022 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3023 {
3024         int status = hdsp_read(hdsp, HDSP_statusRegister);
3025         if (status & HDSP_TimecodeLock) {
3026                 if (status & HDSP_TimecodeSync)
3027                         return 2;
3028                 else
3029                         return 1;
3030         } else
3031                 return 0;
3032 }
3033
3034 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3035 {
3036         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3037
3038         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3039         return 0;
3040 }
3041
3042 #define HDSP_ADAT_SYNC_CHECK \
3043 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3044   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3045   .info = snd_hdsp_info_sync_check, \
3046   .get = snd_hdsp_get_adat_sync_check \
3047 }
3048
3049 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3050 {
3051         int status = hdsp_read(hdsp, HDSP_statusRegister);
3052
3053         if (status & (HDSP_Lock0>>idx)) {
3054                 if (status & (HDSP_Sync0>>idx))
3055                         return 2;
3056                 else
3057                         return 1;
3058         } else
3059                 return 0;
3060 }
3061
3062 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3063 {
3064         int offset;
3065         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3066
3067         offset = ucontrol->id.index - 1;
3068         snd_assert(offset >= 0);
3069
3070         switch (hdsp->io_type) {
3071         case Digiface:
3072         case H9652:
3073                 if (offset >= 3)
3074                         return -EINVAL;
3075                 break;
3076         case Multiface:
3077         case H9632:
3078                 if (offset >= 1)
3079                         return -EINVAL;
3080                 break;
3081         default:
3082                 return -EIO;
3083         }
3084
3085         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3086         return 0;
3087 }
3088
3089 #define HDSP_DDS_OFFSET(xname, xindex) \
3090 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3091   .name = xname, \
3092   .index = xindex, \
3093   .info = snd_hdsp_info_dds_offset, \
3094   .get = snd_hdsp_get_dds_offset, \
3095   .put = snd_hdsp_put_dds_offset \
3096 }
3097
3098 static int hdsp_dds_offset(struct hdsp *hdsp)
3099 {
3100         u64 n;
3101         u32 r;
3102         unsigned int dds_value = hdsp->dds_value;
3103         int system_sample_rate = hdsp->system_sample_rate;
3104
3105         n = DDS_NUMERATOR;
3106         /*
3107          * dds_value = n / rate
3108          * rate = n / dds_value
3109          */
3110         div64_32(&n, dds_value, &r);
3111         if (system_sample_rate >= 112000)
3112                 n *= 4;
3113         else if (system_sample_rate >= 56000)
3114                 n *= 2;
3115         return ((int)n) - system_sample_rate;
3116 }
3117
3118 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3119 {
3120         int rate = hdsp->system_sample_rate + offset_hz;
3121         hdsp_set_dds_value(hdsp, rate);
3122         return 0;
3123 }
3124
3125 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3126 {
3127         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3128         uinfo->count = 1;
3129         uinfo->value.integer.min = -5000;
3130         uinfo->value.integer.max = 5000;
3131         return 0;
3132 }
3133
3134 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3135 {
3136         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3137
3138         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3139         return 0;
3140 }
3141
3142 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3143 {
3144         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3145         int change;
3146         int val;
3147
3148         if (!snd_hdsp_use_is_exclusive(hdsp))
3149                 return -EBUSY;
3150         val = ucontrol->value.enumerated.item[0];
3151         spin_lock_irq(&hdsp->lock);
3152         if (val != hdsp_dds_offset(hdsp))
3153                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3154         else
3155                 change = 0;
3156         spin_unlock_irq(&hdsp->lock);
3157         return change;
3158 }
3159
3160 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3161 HDSP_DA_GAIN("DA Gain", 0),
3162 HDSP_AD_GAIN("AD Gain", 0),
3163 HDSP_PHONE_GAIN("Phones Gain", 0),
3164 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3165 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3166 };
3167
3168 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3169 {
3170         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3171         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3172         .info =         snd_hdsp_control_spdif_info,
3173         .get =          snd_hdsp_control_spdif_get,
3174         .put =          snd_hdsp_control_spdif_put,
3175 },
3176 {
3177         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3178         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3179         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3180         .info =         snd_hdsp_control_spdif_stream_info,
3181         .get =          snd_hdsp_control_spdif_stream_get,
3182         .put =          snd_hdsp_control_spdif_stream_put,
3183 },
3184 {
3185         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3186         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3187         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3188         .info =         snd_hdsp_control_spdif_mask_info,
3189         .get =          snd_hdsp_control_spdif_mask_get,
3190         .private_value = IEC958_AES0_NONAUDIO |
3191                          IEC958_AES0_PROFESSIONAL |
3192                          IEC958_AES0_CON_EMPHASIS,
3193 },
3194 {
3195         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3196         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3197         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3198         .info =         snd_hdsp_control_spdif_mask_info,
3199         .get =          snd_hdsp_control_spdif_mask_get,
3200         .private_value = IEC958_AES0_NONAUDIO |
3201                          IEC958_AES0_PROFESSIONAL |
3202                          IEC958_AES0_PRO_EMPHASIS,
3203 },
3204 HDSP_MIXER("Mixer", 0),
3205 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3206 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3207 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3208 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3209 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3210 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3211 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3212 {
3213         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3214         .name = "Sample Clock Source Locking",
3215         .info = snd_hdsp_info_clock_source_lock,
3216         .get = snd_hdsp_get_clock_source_lock,
3217         .put = snd_hdsp_put_clock_source_lock,
3218 },
3219 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3220 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3221 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3222 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3223 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3224 /* 'External Rate' complies with the alsa control naming scheme */
3225 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3226 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3227 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3228 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3229 HDSP_LINE_OUT("Line Out", 0),
3230 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3231 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3232 };
3233
3234 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3235 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3236
3237 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3238 {
3239         unsigned int idx;
3240         int err;
3241         struct snd_kcontrol *kctl;
3242
3243         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3244                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3245                         return err;
3246                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3247                         hdsp->spdif_ctl = kctl;
3248         }
3249
3250         /* ADAT SyncCheck status */
3251         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3252         snd_hdsp_adat_sync_check.index = 1;
3253         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3254                 return err;
3255         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3256                 for (idx = 1; idx < 3; ++idx) {
3257                         snd_hdsp_adat_sync_check.index = idx+1;
3258                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3259                                 return err;
3260                 }
3261         }
3262
3263         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3264         if (hdsp->io_type == H9632) {
3265                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3266                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3267                                 return err;
3268                 }
3269         }
3270
3271         /* AEB control for H96xx card */
3272         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3273                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3274                                 return err;
3275         }
3276
3277         return 0;
3278 }
3279
3280 /*------------------------------------------------------------
3281    /proc interface
3282  ------------------------------------------------------------*/
3283
3284 static void
3285 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3286 {
3287         struct hdsp *hdsp = (struct hdsp *) entry->private_data;
3288         unsigned int status;
3289         unsigned int status2;
3290         char *pref_sync_ref;
3291         char *autosync_ref;
3292         char *system_clock_mode;
3293         char *clock_source;
3294         int x;
3295
3296         if (hdsp_check_for_iobox (hdsp)) {
3297                 snd_iprintf(buffer, "No I/O box connected.\nPlease connect one and upload firmware.\n");
3298                 return;
3299         }
3300
3301         if (hdsp_check_for_firmware(hdsp, 0)) {
3302                 if (hdsp->state & HDSP_FirmwareCached) {
3303                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3304                                 snd_iprintf(buffer, "Firmware loading from cache failed, please upload manually.\n");
3305                                 return;
3306                         }
3307                 } else {
3308                         int err = -EINVAL;
3309 #ifdef HDSP_FW_LOADER
3310                         err = hdsp_request_fw_loader(hdsp);
3311 #endif
3312                         if (err < 0) {
3313                                 snd_iprintf(buffer,
3314                                             "No firmware loaded nor cached, "
3315                                             "please upload firmware.\n");
3316                                 return;
3317                         }
3318                 }
3319         }
3320
3321         status = hdsp_read(hdsp, HDSP_statusRegister);
3322         status2 = hdsp_read(hdsp, HDSP_status2Register);
3323
3324         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name, hdsp->card->number + 1);
3325         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3326                     hdsp->capture_buffer, hdsp->playback_buffer);
3327         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3328                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3329         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3330         snd_iprintf(buffer, "Control2 register: 0x%x\n", hdsp->control2_register);
3331         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3332         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3333         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3334         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3335         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3336         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3337         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3338         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3339
3340         snd_iprintf(buffer, "\n");
3341
3342         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3343
3344         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3345         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3346         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3347         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3348
3349         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3350
3351         snd_iprintf(buffer, "\n");
3352
3353
3354         switch (hdsp_clock_source(hdsp)) {
3355         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3356                 clock_source = "AutoSync";
3357                 break;
3358         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3359                 clock_source = "Internal 32 kHz";
3360                 break;
3361         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3362                 clock_source = "Internal 44.1 kHz";
3363                 break;
3364         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3365                 clock_source = "Internal 48 kHz";
3366                 break;
3367         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3368                 clock_source = "Internal 64 kHz";
3369                 break;
3370         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3371                 clock_source = "Internal 88.2 kHz";
3372                 break;
3373         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3374                 clock_source = "Internal 96 kHz";
3375                 break;
3376         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3377                 clock_source = "Internal 128 kHz";
3378                 break;
3379         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3380                 clock_source = "Internal 176.4 kHz";
3381                 break;
3382                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3383                 clock_source = "Internal 192 kHz";
3384                 break;
3385         default:
3386                 clock_source = "Error";
3387         }
3388         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3389
3390         if (hdsp_system_clock_mode(hdsp))
3391                 system_clock_mode = "Slave";
3392         else
3393                 system_clock_mode = "Master";
3394
3395         switch (hdsp_pref_sync_ref (hdsp)) {
3396         case HDSP_SYNC_FROM_WORD:
3397                 pref_sync_ref = "Word Clock";
3398                 break;
3399         case HDSP_SYNC_FROM_ADAT_SYNC:
3400                 pref_sync_ref = "ADAT Sync";
3401                 break;
3402         case HDSP_SYNC_FROM_SPDIF:
3403                 pref_sync_ref = "SPDIF";
3404                 break;
3405         case HDSP_SYNC_FROM_ADAT1:
3406                 pref_sync_ref = "ADAT1";
3407                 break;
3408         case HDSP_SYNC_FROM_ADAT2:
3409                 pref_sync_ref = "ADAT2";
3410                 break;
3411         case HDSP_SYNC_FROM_ADAT3:
3412                 pref_sync_ref = "ADAT3";
3413                 break;
3414         default:
3415                 pref_sync_ref = "Word Clock";
3416                 break;
3417         }
3418         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3419
3420         switch (hdsp_autosync_ref (hdsp)) {
3421         case HDSP_AUTOSYNC_FROM_WORD:
3422                 autosync_ref = "Word Clock";
3423                 break;
3424         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3425                 autosync_ref = "ADAT Sync";
3426                 break;
3427         case HDSP_AUTOSYNC_FROM_SPDIF:
3428                 autosync_ref = "SPDIF";
3429                 break;
3430         case HDSP_AUTOSYNC_FROM_NONE:
3431                 autosync_ref = "None";
3432                 break;
3433         case HDSP_AUTOSYNC_FROM_ADAT1:
3434                 autosync_ref = "ADAT1";
3435                 break;
3436         case HDSP_AUTOSYNC_FROM_ADAT2:
3437                 autosync_ref = "ADAT2";
3438                 break;
3439         case HDSP_AUTOSYNC_FROM_ADAT3:
3440                 autosync_ref = "ADAT3";
3441                 break;
3442         default:
3443                 autosync_ref = "---";
3444                 break;
3445         }
3446         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3447
3448         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3449
3450         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3451
3452         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3453         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3454
3455         snd_iprintf(buffer, "\n");
3456
3457         switch (hdsp_spdif_in(hdsp)) {
3458         case HDSP_SPDIFIN_OPTICAL:
3459                 snd_iprintf(buffer, "IEC958 input: Optical\n");
3460                 break;
3461         case HDSP_SPDIFIN_COAXIAL:
3462                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3463                 break;
3464         case HDSP_SPDIFIN_INTERNAL:
3465                 snd_iprintf(buffer, "IEC958 input: Internal\n");
3466                 break;
3467         case HDSP_SPDIFIN_AES:
3468                 snd_iprintf(buffer, "IEC958 input: AES\n");
3469                 break;
3470         default:
3471                 snd_iprintf(buffer, "IEC958 input: ???\n");
3472                 break;
3473         }
3474
3475         if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3476                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3477         else
3478                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3479
3480         if (hdsp->control_register & HDSP_SPDIFProfessional)
3481                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3482         else
3483                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3484
3485         if (hdsp->control_register & HDSP_SPDIFEmphasis)
3486                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3487         else
3488                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3489
3490         if (hdsp->control_register & HDSP_SPDIFNonAudio)
3491                 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3492         else
3493                 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3494         if ((x = hdsp_spdif_sample_rate (hdsp)) != 0)
3495                 snd_iprintf (buffer, "IEC958 sample rate: %d\n", x);
3496         else
3497                 snd_iprintf (buffer, "IEC958 sample rate: Error flag set\n");
3498
3499         snd_iprintf(buffer, "\n");
3500
3501         /* Sync Check */
3502         x = status & HDSP_Sync0;
3503         if (status & HDSP_Lock0)
3504                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3505         else
3506                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3507
3508         switch (hdsp->io_type) {
3509         case Digiface:
3510         case H9652:
3511                 x = status & HDSP_Sync1;
3512                 if (status & HDSP_Lock1)
3513                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3514                 else
3515                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3516                 x = status & HDSP_Sync2;
3517                 if (status & HDSP_Lock2)
3518                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3519                 else
3520                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3521                 break;
3522         default:
3523                 /* relax */
3524                 break;
3525         }
3526
3527         x = status & HDSP_SPDIFSync;
3528         if (status & HDSP_SPDIFErrorFlag)
3529                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3530         else
3531                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3532
3533         x = status2 & HDSP_wc_sync;
3534         if (status2 & HDSP_wc_lock)
3535                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3536         else
3537                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3538
3539         x = status & HDSP_TimecodeSync;
3540         if (status & HDSP_TimecodeLock)
3541                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3542         else
3543                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3544
3545         snd_iprintf(buffer, "\n");
3546
3547         /* Informations about H9632 specific controls */
3548         if (hdsp->io_type == H9632) {
3549                 char *tmp;
3550
3551                 switch (hdsp_ad_gain(hdsp)) {
3552                 case 0:
3553                         tmp = "-10 dBV";
3554                         break;
3555                 case 1:
3556                         tmp = "+4 dBu";
3557                         break;
3558                 default:
3559                         tmp = "Lo Gain";
3560                         break;
3561                 }
3562                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3563
3564                 switch (hdsp_da_gain(hdsp)) {
3565                 case 0:
3566                         tmp = "Hi Gain";
3567                         break;
3568                 case 1:
3569                         tmp = "+4 dBu";
3570                         break;
3571                 default:
3572                         tmp = "-10 dBV";
3573                         break;
3574                 }
3575                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3576
3577                 switch (hdsp_phone_gain(hdsp)) {
3578                 case 0:
3579                         tmp = "0 dB";
3580                         break;
3581                 case 1:
3582                         tmp = "-6 dB";
3583                         break;
3584                 default:
3585                         tmp = "-12 dB";
3586                         break;
3587                 }
3588                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3589
3590                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3591
3592                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3593                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3594                 else
3595                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3596                 snd_iprintf(buffer, "\n");
3597         }
3598
3599 }
3600
3601 static void __devinit snd_hdsp_proc_init(struct hdsp *hdsp)
3602 {
3603         struct snd_info_entry *entry;
3604
3605         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3606                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3607 }
3608
3609 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3610 {
3611         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3612         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3613 }
3614
3615 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
3616 {
3617         unsigned long pb_bus, cb_bus;
3618
3619         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3620             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3621                 if (hdsp->capture_dma_buf.area)
3622                         snd_dma_free_pages(&hdsp->capture_dma_buf);
3623                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3624                 return -ENOMEM;
3625         }
3626
3627         /* Align to bus-space 64K boundary */
3628
3629         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3630         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3631
3632         /* Tell the card where it is */
3633
3634         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3635         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3636
3637         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3638         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3639
3640         return 0;
3641 }
3642
3643 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3644 {
3645         unsigned int i;
3646
3647         /* ASSUMPTION: hdsp->lock is either held, or
3648            there is no need to hold it (e.g. during module
3649            initalization).
3650          */
3651
3652         /* set defaults:
3653
3654            SPDIF Input via Coax
3655            Master clock mode
3656            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3657                             which implies 2 4096 sample, 32Kbyte periods).
3658            Enable line out.
3659          */
3660
3661         hdsp->control_register = HDSP_ClockModeMaster |
3662                                  HDSP_SPDIFInputCoaxial |
3663                                  hdsp_encode_latency(7) |
3664                                  HDSP_LineOut;
3665
3666
3667         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3668
3669 #ifdef SNDRV_BIG_ENDIAN
3670         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3671 #else
3672         hdsp->control2_register = 0;
3673 #endif
3674         if (hdsp->io_type == H9652)
3675                 snd_hdsp_9652_enable_mixer (hdsp);
3676         else
3677                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3678
3679         hdsp_reset_hw_pointer(hdsp);
3680         hdsp_compute_period_size(hdsp);
3681
3682         /* silence everything */
3683
3684         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3685                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3686
3687         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3688                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3689                         return -EIO;
3690         }
3691
3692         /* H9632 specific defaults */
3693         if (hdsp->io_type == H9632) {
3694                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3695                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3696         }
3697
3698         /* set a default rate so that the channel map is set up.
3699          */
3700
3701         hdsp_set_rate(hdsp, 48000, 1);
3702
3703         return 0;
3704 }
3705
3706 static void hdsp_midi_tasklet(unsigned long arg)
3707 {
3708         struct hdsp *hdsp = (struct hdsp *)arg;
3709
3710         if (hdsp->midi[0].pending)
3711                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3712         if (hdsp->midi[1].pending)
3713                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3714 }
3715
3716 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3717 {
3718         struct hdsp *hdsp = (struct hdsp *) dev_id;
3719         unsigned int status;
3720         int audio;
3721         int midi0;
3722         int midi1;
3723         unsigned int midi0status;
3724         unsigned int midi1status;
3725         int schedule = 0;
3726
3727         status = hdsp_read(hdsp, HDSP_statusRegister);
3728
3729         audio = status & HDSP_audioIRQPending;
3730         midi0 = status & HDSP_midi0IRQPending;
3731         midi1 = status & HDSP_midi1IRQPending;
3732
3733         if (!audio && !midi0 && !midi1)
3734                 return IRQ_NONE;
3735
3736         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3737
3738         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3739         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3740
3741         if (audio) {
3742                 if (hdsp->capture_substream)
3743                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3744
3745                 if (hdsp->playback_substream)
3746                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3747         }
3748
3749         if (midi0 && midi0status) {
3750                 if (hdsp->use_midi_tasklet) {
3751                         /* we disable interrupts for this input until processing is done */
3752                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3753                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3754                         hdsp->midi[0].pending = 1;
3755                         schedule = 1;
3756                 } else {
3757                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
3758                 }
3759         }
3760         if (hdsp->io_type != Multiface && hdsp->io_type != H9632 && midi1 && midi1status) {
3761                 if (hdsp->use_midi_tasklet) {
3762                         /* we disable interrupts for this input until processing is done */
3763                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3764                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3765                         hdsp->midi[1].pending = 1;
3766                         schedule = 1;
3767                 } else {
3768                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
3769                 }
3770         }
3771         if (hdsp->use_midi_tasklet && schedule)
3772                 tasklet_hi_schedule(&hdsp->midi_tasklet);
3773         return IRQ_HANDLED;
3774 }
3775
3776 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3777 {
3778         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3779         return hdsp_hw_pointer(hdsp);
3780 }
3781
3782 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3783                                              int stream,
3784                                              int channel)
3785
3786 {
3787         int mapped_channel;
3788
3789         snd_assert(channel >= 0 && channel < hdsp->max_channels, return NULL);
3790
3791         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3792                 return NULL;
3793
3794         if (stream == SNDRV_PCM_STREAM_CAPTURE)
3795                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3796         else
3797                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3798 }
3799
3800 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3801                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3802 {
3803         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3804         char *channel_buf;
3805
3806         snd_assert(pos + count <= HDSP_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
3807
3808         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3809         snd_assert(channel_buf != NULL, return -EIO);
3810         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3811                 return -EFAULT;
3812         return count;
3813 }
3814
3815 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3816                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3817 {
3818         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3819         char *channel_buf;
3820
3821         snd_assert(pos + count <= HDSP_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
3822
3823         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3824         snd_assert(channel_buf != NULL, return -EIO);
3825         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
3826                 return -EFAULT;
3827         return count;
3828 }
3829
3830 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
3831                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
3832 {
3833         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3834         char *channel_buf;
3835
3836         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3837         snd_assert(channel_buf != NULL, return -EIO);
3838         memset(channel_buf + pos * 4, 0, count * 4);
3839         return count;
3840 }
3841
3842 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
3843 {
3844         struct snd_pcm_runtime *runtime = substream->runtime;
3845         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3846         struct snd_pcm_substream *other;
3847         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3848                 other = hdsp->capture_substream;
3849         else
3850                 other = hdsp->playback_substream;
3851         if (hdsp->running)
3852                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
3853         else
3854                 runtime->status->hw_ptr = 0;
3855         if (other) {
3856                 struct snd_pcm_substream *s;
3857                 struct snd_pcm_runtime *oruntime = other->runtime;
3858                 snd_pcm_group_for_each_entry(s, substream) {
3859                         if (s == other) {
3860                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
3861                                 break;
3862                         }
3863                 }
3864         }
3865         return 0;
3866 }
3867
3868 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
3869                                  struct snd_pcm_hw_params *params)
3870 {
3871         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3872         int err;
3873         pid_t this_pid;
3874         pid_t other_pid;
3875
3876         if (hdsp_check_for_iobox (hdsp))
3877                 return -EIO;
3878
3879         if (hdsp_check_for_firmware(hdsp, 1))
3880                 return -EIO;
3881
3882         spin_lock_irq(&hdsp->lock);
3883
3884         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3885                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
3886                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
3887                 this_pid = hdsp->playback_pid;
3888                 other_pid = hdsp->capture_pid;
3889         } else {
3890                 this_pid = hdsp->capture_pid;
3891                 other_pid = hdsp->playback_pid;
3892         }
3893
3894         if ((other_pid > 0) && (this_pid != other_pid)) {
3895
3896                 /* The other stream is open, and not by the same
3897                    task as this one. Make sure that the parameters
3898                    that matter are the same.
3899                  */
3900
3901                 if (params_rate(params) != hdsp->system_sample_rate) {
3902                         spin_unlock_irq(&hdsp->lock);
3903                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3904                         return -EBUSY;
3905                 }
3906
3907                 if (params_period_size(params) != hdsp->period_bytes / 4) {
3908                         spin_unlock_irq(&hdsp->lock);
3909                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3910                         return -EBUSY;
3911                 }
3912
3913                 /* We're fine. */
3914
3915                 spin_unlock_irq(&hdsp->lock);
3916                 return 0;
3917
3918         } else {
3919                 spin_unlock_irq(&hdsp->lock);
3920         }
3921
3922         /* how to make sure that the rate matches an externally-set one ?
3923          */
3924
3925         spin_lock_irq(&hdsp->lock);
3926         if (! hdsp->clock_source_locked) {
3927                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
3928                         spin_unlock_irq(&hdsp->lock);
3929                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3930                         return err;
3931                 }
3932         }
3933         spin_unlock_irq(&hdsp->lock);
3934
3935         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
3936                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3937                 return err;
3938         }
3939
3940         return 0;
3941 }
3942
3943 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
3944                                     struct snd_pcm_channel_info *info)
3945 {
3946         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3947         int mapped_channel;
3948
3949         snd_assert(info->channel < hdsp->max_channels, return -EINVAL);
3950
3951         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
3952                 return -EINVAL;
3953
3954         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
3955         info->first = 0;
3956         info->step = 32;
3957         return 0;
3958 }
3959
3960 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
3961                              unsigned int cmd, void *arg)
3962 {
3963         switch (cmd) {
3964         case SNDRV_PCM_IOCTL1_RESET:
3965                 return snd_hdsp_reset(substream);
3966         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3967                 return snd_hdsp_channel_info(substream, arg);
3968         default:
3969                 break;
3970         }
3971
3972         return snd_pcm_lib_ioctl(substream, cmd, arg);
3973 }
3974
3975 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
3976 {
3977         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3978         struct snd_pcm_substream *other;
3979         int running;
3980
3981         if (hdsp_check_for_iobox (hdsp))
3982                 return -EIO;
3983
3984         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
3985                 return -EIO;
3986
3987         spin_lock(&hdsp->lock);
3988         running = hdsp->running;
3989         switch (cmd) {
3990         case SNDRV_PCM_TRIGGER_START:
3991                 running |= 1 << substream->stream;
3992                 break;
3993         case SNDRV_PCM_TRIGGER_STOP:
3994                 running &= ~(1 << substream->stream);
3995                 break;
3996         default:
3997                 snd_BUG();
3998                 spin_unlock(&hdsp->lock);
3999                 return -EINVAL;
4000         }
4001         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4002                 other = hdsp->capture_substream;
4003         else
4004                 other = hdsp->playback_substream;
4005
4006         if (other) {
4007                 struct snd_pcm_substream *s;
4008                 snd_pcm_group_for_each_entry(s, substream) {
4009                         if (s == other) {
4010                                 snd_pcm_trigger_done(s, substream);
4011                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4012                                         running |= 1 << s->stream;
4013                                 else
4014                                         running &= ~(1 << s->stream);
4015                                 goto _ok;
4016                         }
4017                 }
4018                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4019                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4020                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4021                                 hdsp_silence_playback(hdsp);
4022                 } else {
4023                         if (running &&
4024                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4025                                 hdsp_silence_playback(hdsp);
4026                 }
4027         } else {
4028                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4029                                 hdsp_silence_playback(hdsp);
4030         }
4031  _ok:
4032         snd_pcm_trigger_done(substream, substream);
4033         if (!hdsp->running && running)
4034                 hdsp_start_audio(hdsp);
4035         else if (hdsp->running && !running)
4036                 hdsp_stop_audio(hdsp);
4037         hdsp->running = running;
4038         spin_unlock(&hdsp->lock);
4039
4040         return 0;
4041 }
4042
4043 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4044 {
4045         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4046         int result = 0;
4047
4048         if (hdsp_check_for_iobox (hdsp))
4049                 return -EIO;
4050
4051         if (hdsp_check_for_firmware(hdsp, 1))
4052                 return -EIO;
4053
4054         spin_lock_irq(&hdsp->lock);
4055         if (!hdsp->running)
4056                 hdsp_reset_hw_pointer(hdsp);
4057         spin_unlock_irq(&hdsp->lock);
4058         return result;
4059 }
4060
4061 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4062 {
4063         .info =                 (SNDRV_PCM_INFO_MMAP |
4064                                  SNDRV_PCM_INFO_MMAP_VALID |
4065                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4066                                  SNDRV_PCM_INFO_SYNC_START |
4067                                  SNDRV_PCM_INFO_DOUBLE),
4068 #ifdef SNDRV_BIG_ENDIAN
4069         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4070 #else
4071         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4072 #endif
4073         .rates =                (SNDRV_PCM_RATE_32000 |
4074                                  SNDRV_PCM_RATE_44100 |
4075                                  SNDRV_PCM_RATE_48000 |
4076                                  SNDRV_PCM_RATE_64000 |
4077                                  SNDRV_PCM_RATE_88200 |
4078                                  SNDRV_PCM_RATE_96000),
4079         .rate_min =             32000,
4080         .rate_max =             96000,
4081         .channels_min =         14,
4082         .channels_max =         HDSP_MAX_CHANNELS,
4083         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4084         .period_bytes_min =     (64 * 4) * 10,
4085         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4086         .periods_min =          2,
4087         .periods_max =          2,
4088         .fifo_size =            0
4089 };
4090
4091 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4092 {
4093         .info =                 (SNDRV_PCM_INFO_MMAP |
4094                                  SNDRV_PCM_INFO_MMAP_VALID |
4095                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4096                                  SNDRV_PCM_INFO_SYNC_START),
4097 #ifdef SNDRV_BIG_ENDIAN
4098         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4099 #else
4100         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4101 #endif
4102         .rates =                (SNDRV_PCM_RATE_32000 |
4103                                  SNDRV_PCM_RATE_44100 |
4104                                  SNDRV_PCM_RATE_48000 |
4105                                  SNDRV_PCM_RATE_64000 |
4106                                  SNDRV_PCM_RATE_88200 |
4107                                  SNDRV_PCM_RATE_96000),
4108         .rate_min =             32000,
4109         .rate_max =             96000,
4110         .channels_min =         14,
4111         .channels_max =         HDSP_MAX_CHANNELS,
4112         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4113         .period_bytes_min =     (64 * 4) * 10,
4114         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4115         .periods_min =          2,
4116         .periods_max =          2,
4117         .fifo_size =            0
4118 };
4119
4120 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4121
4122 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4123         .count = ARRAY_SIZE(hdsp_period_sizes),
4124         .list = hdsp_period_sizes,
4125         .mask = 0
4126 };
4127
4128 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4129
4130 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4131         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4132         .list = hdsp_9632_sample_rates,
4133         .mask = 0
4134 };
4135
4136 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4137                                         struct snd_pcm_hw_rule *rule)
4138 {
4139         struct hdsp *hdsp = rule->private;
4140         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4141         if (hdsp->io_type == H9632) {
4142                 unsigned int list[3];
4143                 list[0] = hdsp->qs_in_channels;
4144                 list[1] = hdsp->ds_in_channels;
4145                 list[2] = hdsp->ss_in_channels;
4146                 return snd_interval_list(c, 3, list, 0);
4147         } else {
4148                 unsigned int list[2];
4149                 list[0] = hdsp->ds_in_channels;
4150                 list[1] = hdsp->ss_in_channels;
4151                 return snd_interval_list(c, 2, list, 0);
4152         }
4153 }
4154
4155 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4156                                         struct snd_pcm_hw_rule *rule)
4157 {
4158         unsigned int list[3];
4159         struct hdsp *hdsp = rule->private;
4160         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4161         if (hdsp->io_type == H9632) {
4162                 list[0] = hdsp->qs_out_channels;
4163                 list[1] = hdsp->ds_out_channels;
4164                 list[2] = hdsp->ss_out_channels;
4165                 return snd_interval_list(c, 3, list, 0);
4166         } else {
4167                 list[0] = hdsp->ds_out_channels;
4168                 list[1] = hdsp->ss_out_channels;
4169         }
4170         return snd_interval_list(c, 2, list, 0);
4171 }
4172
4173 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4174                                              struct snd_pcm_hw_rule *rule)
4175 {
4176         struct hdsp *hdsp = rule->private;
4177         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4178         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4179         if (r->min > 96000 && hdsp->io_type == H9632) {
4180                 struct snd_interval t = {
4181                         .min = hdsp->qs_in_channels,
4182                         .max = hdsp->qs_in_channels,
4183                         .integer = 1,
4184                 };
4185                 return snd_interval_refine(c, &t);
4186         } else if (r->min > 48000 && r->max <= 96000) {
4187                 struct snd_interval t = {
4188                         .min = hdsp->ds_in_channels,
4189                         .max = hdsp->ds_in_channels,
4190                         .integer = 1,
4191                 };
4192                 return snd_interval_refine(c, &t);
4193         } else if (r->max < 64000) {
4194                 struct snd_interval t = {
4195                         .min = hdsp->ss_in_channels,
4196                         .max = hdsp->ss_in_channels,
4197                         .integer = 1,
4198                 };
4199                 return snd_interval_refine(c, &t);
4200         }
4201         return 0;
4202 }
4203
4204 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4205                                              struct snd_pcm_hw_rule *rule)
4206 {
4207         struct hdsp *hdsp = rule->private;
4208         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4209         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4210         if (r->min > 96000 && hdsp->io_type == H9632) {
4211                 struct snd_interval t = {
4212                         .min = hdsp->qs_out_channels,
4213                         .max = hdsp->qs_out_channels,
4214                         .integer = 1,
4215                 };
4216                 return snd_interval_refine(c, &t);
4217         } else if (r->min > 48000 && r->max <= 96000) {
4218                 struct snd_interval t = {
4219                         .min = hdsp->ds_out_channels,
4220                         .max = hdsp->ds_out_channels,
4221                         .integer = 1,
4222                 };
4223                 return snd_interval_refine(c, &t);
4224         } else if (r->max < 64000) {
4225                 struct snd_interval t = {
4226                         .min = hdsp->ss_out_channels,
4227                         .max = hdsp->ss_out_channels,
4228                         .integer = 1,
4229                 };
4230                 return snd_interval_refine(c, &t);
4231         }
4232         return 0;
4233 }
4234
4235 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4236                                              struct snd_pcm_hw_rule *rule)
4237 {
4238         struct hdsp *hdsp = rule->private;
4239         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4240         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4241         if (c->min >= hdsp->ss_out_channels) {
4242                 struct snd_interval t = {
4243                         .min = 32000,
4244                         .max = 48000,
4245                         .integer = 1,
4246                 };
4247                 return snd_interval_refine(r, &t);
4248         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4249                 struct snd_interval t = {
4250                         .min = 128000,
4251                         .max = 192000,
4252                         .integer = 1,
4253                 };
4254                 return snd_interval_refine(r, &t);
4255         } else if (c->max <= hdsp->ds_out_channels) {
4256                 struct snd_interval t = {
4257                         .min = 64000,
4258                         .max = 96000,
4259                         .integer = 1,
4260                 };
4261                 return snd_interval_refine(r, &t);
4262         }
4263         return 0;
4264 }
4265
4266 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4267                                              struct snd_pcm_hw_rule *rule)
4268 {
4269         struct hdsp *hdsp = rule->private;
4270         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4271         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4272         if (c->min >= hdsp->ss_in_channels) {
4273                 struct snd_interval t = {
4274                         .min = 32000,
4275                         .max = 48000,
4276                         .integer = 1,
4277                 };
4278                 return snd_interval_refine(r, &t);
4279         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4280                 struct snd_interval t = {
4281                         .min = 128000,
4282                         .max = 192000,
4283                         .integer = 1,
4284                 };
4285                 return snd_interval_refine(r, &t);
4286         } else if (c->max <= hdsp->ds_in_channels) {
4287                 struct snd_interval t = {
4288                         .min = 64000,
4289                         .max = 96000,
4290                         .integer = 1,
4291                 };
4292                 return snd_interval_refine(r, &t);
4293         }
4294         return 0;
4295 }
4296
4297 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4298 {
4299         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4300         struct snd_pcm_runtime *runtime = substream->runtime;
4301
4302         if (hdsp_check_for_iobox (hdsp))
4303                 return -EIO;
4304
4305         if (hdsp_check_for_firmware(hdsp, 1))
4306                 return -EIO;
4307
4308         spin_lock_irq(&hdsp->lock);
4309
4310         snd_pcm_set_sync(substream);
4311
4312         runtime->hw = snd_hdsp_playback_subinfo;
4313         runtime->dma_area = hdsp->playback_buffer;
4314         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4315
4316         hdsp->playback_pid = current->pid;
4317         hdsp->playback_substream = substream;
4318
4319         spin_unlock_irq(&hdsp->lock);
4320
4321         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4322         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4323         if (hdsp->clock_source_locked) {
4324                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4325         } else if (hdsp->io_type == H9632) {
4326                 runtime->hw.rate_max = 192000;
4327                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4328                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4329         }
4330         if (hdsp->io_type == H9632) {
4331                 runtime->hw.channels_min = hdsp->qs_out_channels;
4332                 runtime->hw.channels_max = hdsp->ss_out_channels;
4333         }
4334
4335         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4336                              snd_hdsp_hw_rule_out_channels, hdsp,
4337                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4338         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4339                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4340                              SNDRV_PCM_HW_PARAM_RATE, -1);
4341         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4342                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4343                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4344
4345         hdsp->creg_spdif_stream = hdsp->creg_spdif;
4346         hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4347         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4348                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4349         return 0;
4350 }
4351
4352 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4353 {
4354         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4355
4356         spin_lock_irq(&hdsp->lock);
4357
4358         hdsp->playback_pid = -1;
4359         hdsp->playback_substream = NULL;
4360
4361         spin_unlock_irq(&hdsp->lock);
4362
4363         hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4364         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4365                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4366         return 0;
4367 }
4368
4369
4370 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4371 {
4372         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4373         struct snd_pcm_runtime *runtime = substream->runtime;
4374
4375         if (hdsp_check_for_iobox (hdsp))
4376                 return -EIO;
4377
4378         if (hdsp_check_for_firmware(hdsp, 1))
4379                 return -EIO;
4380
4381         spin_lock_irq(&hdsp->lock);
4382
4383         snd_pcm_set_sync(substream);
4384
4385         runtime->hw = snd_hdsp_capture_subinfo;
4386         runtime->dma_area = hdsp->capture_buffer;
4387         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4388
4389         hdsp->capture_pid = current->pid;
4390         hdsp->capture_substream = substream;
4391
4392         spin_unlock_irq(&hdsp->lock);
4393
4394         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4395         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4396         if (hdsp->io_type == H9632) {
4397                 runtime->hw.channels_min = hdsp->qs_in_channels;
4398                 runtime->hw.channels_max = hdsp->ss_in_channels;
4399                 runtime->hw.rate_max = 192000;
4400                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4401                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4402         }
4403         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4404                              snd_hdsp_hw_rule_in_channels, hdsp,
4405                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4406         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4407                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4408                              SNDRV_PCM_HW_PARAM_RATE, -1);
4409         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4410                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4411                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4412         return 0;
4413 }
4414
4415 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4416 {
4417         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4418
4419         spin_lock_irq(&hdsp->lock);
4420
4421         hdsp->capture_pid = -1;
4422         hdsp->capture_substream = NULL;
4423
4424         spin_unlock_irq(&hdsp->lock);
4425         return 0;
4426 }
4427
4428 static int snd_hdsp_hwdep_dummy_op(struct snd_hwdep *hw, struct file *file)
4429 {
4430         /* we have nothing to initialize but the call is required */
4431         return 0;
4432 }
4433
4434
4435 /* helper functions for copying meter values */
4436 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4437 {
4438         u32 val = readl(src);
4439         return copy_to_user(dest, &val, 4);
4440 }
4441
4442 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4443 {
4444         u32 rms_low, rms_high;
4445         u64 rms;
4446         rms_low = readl(src_low);
4447         rms_high = readl(src_high);
4448         rms = ((u64)rms_high << 32) | rms_low;
4449         return copy_to_user(dest, &rms, 8);
4450 }
4451
4452 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4453 {
4454         u32 rms_low, rms_high;
4455         u64 rms;
4456         rms_low = readl(src_low) & 0xffffff00;
4457         rms_high = readl(src_high) & 0xffffff00;
4458         rms = ((u64)rms_high << 32) | rms_low;
4459         return copy_to_user(dest, &rms, 8);
4460 }
4461
4462 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4463 {
4464         int doublespeed = 0;
4465         int i, j, channels, ofs;
4466
4467         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4468                 doublespeed = 1;
4469         channels = doublespeed ? 14 : 26;
4470         for (i = 0, j = 0; i < 26; ++i) {
4471                 if (doublespeed && (i & 4))
4472                         continue;
4473                 ofs = HDSP_9652_peakBase - j * 4;
4474                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4475                         return -EFAULT;
4476                 ofs -= channels * 4;
4477                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4478                         return -EFAULT;
4479                 ofs -= channels * 4;
4480                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4481                         return -EFAULT;
4482                 ofs = HDSP_9652_rmsBase + j * 8;
4483                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4484                                 hdsp->iobase + ofs + 4))
4485                         return -EFAULT;
4486                 ofs += channels * 8;
4487                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4488                                 hdsp->iobase + ofs + 4))
4489                         return -EFAULT;
4490                 ofs += channels * 8;
4491                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4492                                 hdsp->iobase + ofs + 4))
4493                         return -EFAULT;
4494                 j++;
4495         }
4496         return 0;
4497 }
4498
4499 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4500 {
4501         int i, j;
4502         struct hdsp_9632_meters __iomem *m;
4503         int doublespeed = 0;
4504
4505         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4506                 doublespeed = 1;
4507         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4508         for (i = 0, j = 0; i < 16; ++i, ++j) {
4509                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4510                         return -EFAULT;
4511                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4512                         return -EFAULT;
4513                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4514                         return -EFAULT;
4515                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4516                                 &m->input_rms_high[j]))
4517                         return -EFAULT;
4518                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4519                                 &m->playback_rms_high[j]))
4520                         return -EFAULT;
4521                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4522                                 &m->output_rms_high[j]))
4523                         return -EFAULT;
4524                 if (doublespeed && i == 3) i += 4;
4525         }
4526         return 0;
4527 }
4528
4529 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4530 {
4531         int i;
4532
4533         for (i = 0; i < 26; i++) {
4534                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4535                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4536                         return -EFAULT;
4537                 if (copy_u32_le(&peak_rms->input_peaks[i],
4538                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4539                         return -EFAULT;
4540         }
4541         for (i = 0; i < 28; i++) {
4542                 if (copy_u32_le(&peak_rms->output_peaks[i],
4543                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4544                         return -EFAULT;
4545         }
4546         for (i = 0; i < 26; ++i) {
4547                 if (copy_u64_le(&peak_rms->playback_rms[i],
4548                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4549                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4550                         return -EFAULT;
4551                 if (copy_u64_le(&peak_rms->input_rms[i],
4552                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4553                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4554                         return -EFAULT;
4555         }
4556         return 0;
4557 }
4558
4559 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4560 {
4561         struct hdsp *hdsp = (struct hdsp *)hw->private_data;
4562         void __user *argp = (void __user *)arg;
4563
4564         switch (cmd) {
4565         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4566                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4567
4568                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4569                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4570                         return -EINVAL;
4571                 }
4572
4573                 switch (hdsp->io_type) {
4574                 case H9652:
4575                         return hdsp_9652_get_peak(hdsp, peak_rms);
4576                 case H9632:
4577                         return hdsp_9632_get_peak(hdsp, peak_rms);
4578                 default:
4579                         return hdsp_get_peak(hdsp, peak_rms);
4580                 }
4581         }
4582         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4583                 struct hdsp_config_info info;
4584                 unsigned long flags;
4585                 int i;
4586
4587                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4588                         snd_printk(KERN_ERR "Hammerfall-DSP: Firmware needs to be uploaded to the card.\n");
4589                         return -EINVAL;
4590                 }
4591                 spin_lock_irqsave(&hdsp->lock, flags);
4592                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4593                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4594                 if (hdsp->io_type != H9632)
4595                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4596                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4597                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != H9632) ? 3 : 1); ++i)
4598                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4599                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4600                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
4601                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
4602                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
4603                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
4604                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4605                 info.system_sample_rate = hdsp->system_sample_rate;
4606                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4607                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4608                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4609                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4610                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
4611                 if (hdsp->io_type == H9632) {
4612                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4613                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4614                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4615                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
4616
4617                 }
4618                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4619                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
4620                 spin_unlock_irqrestore(&hdsp->lock, flags);
4621                 if (copy_to_user(argp, &info, sizeof(info)))
4622                         return -EFAULT;
4623                 break;
4624         }
4625         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4626                 struct hdsp_9632_aeb h9632_aeb;
4627
4628                 if (hdsp->io_type != H9632) return -EINVAL;
4629                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4630                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4631                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4632                         return -EFAULT;
4633                 break;
4634         }
4635         case SNDRV_HDSP_IOCTL_GET_VERSION: {
4636                 struct hdsp_version hdsp_version;
4637                 int err;
4638
4639                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4640                 if (hdsp->io_type == Undefined) {
4641                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4642                                 return err;
4643                 }
4644                 hdsp_version.io_type = hdsp->io_type;
4645                 hdsp_version.firmware_rev = hdsp->firmware_rev;
4646                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4647                         return -EFAULT;
4648                 break;
4649         }
4650         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4651                 struct hdsp_firmware __user *firmware;
4652                 u32 __user *firmware_data;
4653                 int err;
4654
4655                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4656                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4657                 if (hdsp->io_type == Undefined) return -EINVAL;
4658
4659                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4660                         return -EBUSY;
4661
4662                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4663                 firmware = (struct hdsp_firmware __user *)argp;
4664
4665                 if (get_user(firmware_data, &firmware->firmware_data))
4666                         return -EFAULT;
4667
4668                 if (hdsp_check_for_iobox (hdsp))
4669                         return -EIO;
4670
4671                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
4672                         return -EFAULT;
4673
4674                 hdsp->state |= HDSP_FirmwareCached;
4675
4676                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4677                         return err;
4678
4679                 if (!(hdsp->state & HDSP_InitializationComplete)) {
4680                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4681                                 return err;
4682
4683                         snd_hdsp_initialize_channels(hdsp);
4684                         snd_hdsp_initialize_midi_flush(hdsp);
4685
4686                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4687                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4688                                 return err;
4689                         }
4690                 }
4691                 break;
4692         }
4693         case SNDRV_HDSP_IOCTL_GET_MIXER: {
4694                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4695                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4696                         return -EFAULT;
4697                 break;
4698         }
4699         default:
4700                 return -EINVAL;
4701         }
4702         return 0;
4703 }
4704
4705 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4706         .open =         snd_hdsp_playback_open,
4707         .close =        snd_hdsp_playback_release,
4708         .ioctl =        snd_hdsp_ioctl,
4709         .hw_params =    snd_hdsp_hw_params,
4710         .prepare =      snd_hdsp_prepare,
4711         .trigger =      snd_hdsp_trigger,
4712         .pointer =      snd_hdsp_hw_pointer,
4713         .copy =         snd_hdsp_playback_copy,
4714         .silence =      snd_hdsp_hw_silence,
4715 };
4716
4717 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4718         .open =         snd_hdsp_capture_open,
4719         .close =        snd_hdsp_capture_release,
4720         .ioctl =        snd_hdsp_ioctl,
4721         .hw_params =    snd_hdsp_hw_params,
4722         .prepare =      snd_hdsp_prepare,
4723         .trigger =      snd_hdsp_trigger,
4724         .pointer =      snd_hdsp_hw_pointer,
4725         .copy =         snd_hdsp_capture_copy,
4726 };
4727
4728 static int __devinit snd_hdsp_create_hwdep(struct snd_card *card,
4729                                            struct hdsp *hdsp)
4730 {
4731         struct snd_hwdep *hw;
4732         int err;
4733
4734         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4735                 return err;
4736
4737         hdsp->hwdep = hw;
4738         hw->private_data = hdsp;
4739         strcpy(hw->name, "HDSP hwdep interface");
4740
4741         hw->ops.open = snd_hdsp_hwdep_dummy_op;
4742         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4743         hw->ops.release = snd_hdsp_hwdep_dummy_op;
4744
4745         return 0;
4746 }
4747
4748 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4749 {
4750         struct snd_pcm *pcm;
4751         int err;
4752
4753         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4754                 return err;
4755
4756         hdsp->pcm = pcm;
4757         pcm->private_data = hdsp;
4758         strcpy(pcm->name, hdsp->card_name);
4759
4760         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4761         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4762
4763         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4764
4765         return 0;
4766 }
4767
4768 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4769 {
4770         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4771         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4772 }
4773
4774 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4775 {
4776         int i;
4777
4778         if (hdsp_fifo_wait (hdsp, 0, 100)) {
4779                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4780                 return -EIO;
4781         }
4782
4783         for (i = 0; i < hdsp->max_channels; ++i) {
4784                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4785                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4786         }
4787
4788         return 0;
4789 }
4790
4791 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
4792 {
4793         int status, aebi_channels, aebo_channels;
4794
4795         switch (hdsp->io_type) {
4796         case Digiface:
4797                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
4798                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
4799                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
4800                 break;
4801
4802         case H9652:
4803                 hdsp->card_name = "RME Hammerfall HDSP 9652";
4804                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
4805                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
4806                 break;
4807
4808         case H9632:
4809                 status = hdsp_read(hdsp, HDSP_statusRegister);
4810                 /* HDSP_AEBx bits are low when AEB are connected */
4811                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
4812                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
4813                 hdsp->card_name = "RME Hammerfall HDSP 9632";
4814                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
4815                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
4816                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
4817                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
4818                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
4819                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
4820                 break;
4821
4822         case Multiface:
4823                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
4824                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
4825                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
4826                 break;
4827
4828         default:
4829                 /* should never get here */
4830                 break;
4831         }
4832 }
4833
4834 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
4835 {
4836         snd_hdsp_flush_midi_input (hdsp, 0);
4837         snd_hdsp_flush_midi_input (hdsp, 1);
4838 }
4839
4840 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
4841 {
4842         int err;
4843
4844         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
4845                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
4846                 return err;
4847         }
4848
4849
4850         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
4851                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
4852                 return err;
4853         }
4854
4855         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
4856                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
4857                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
4858                         return err;
4859                 }
4860         }
4861
4862         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
4863                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
4864                 return err;
4865         }
4866
4867         snd_hdsp_proc_init(hdsp);
4868
4869         hdsp->system_sample_rate = -1;
4870         hdsp->playback_pid = -1;
4871         hdsp->capture_pid = -1;
4872         hdsp->capture_substream = NULL;
4873         hdsp->playback_substream = NULL;
4874
4875         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
4876                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
4877                 return err;
4878         }
4879
4880         if (!(hdsp->state & HDSP_InitializationComplete)) {
4881                 strcpy(card->shortname, "Hammerfall DSP");
4882                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
4883                         hdsp->port, hdsp->irq);
4884
4885                 if ((err = snd_card_register(card)) < 0) {
4886                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
4887                         return err;
4888                 }
4889                 hdsp->state |= HDSP_InitializationComplete;
4890         }
4891
4892         return 0;
4893 }
4894
4895 #ifdef HDSP_FW_LOADER
4896 /* load firmware via hotplug fw loader */
4897 static int __devinit hdsp_request_fw_loader(struct hdsp *hdsp)
4898 {
4899         const char *fwfile;
4900         const struct firmware *fw;
4901         int err;
4902
4903         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4904                 return 0;
4905         if (hdsp->io_type == Undefined) {
4906                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4907                         return err;
4908                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4909                         return 0;
4910         }
4911
4912         /* caution: max length of firmware filename is 30! */
4913         switch (hdsp->io_type) {
4914         case Multiface:
4915                 if (hdsp->firmware_rev == 0xa)
4916                         fwfile = "multiface_firmware.bin";
4917                 else
4918                         fwfile = "multiface_firmware_rev11.bin";
4919                 break;
4920         case Digiface:
4921                 if (hdsp->firmware_rev == 0xa)
4922                         fwfile = "digiface_firmware.bin";
4923                 else
4924                         fwfile = "digiface_firmware_rev11.bin";
4925                 break;
4926         default:
4927                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
4928                 return -EINVAL;
4929         }
4930
4931         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
4932                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
4933                 return -ENOENT;
4934         }
4935         if (fw->size < sizeof(hdsp->firmware_cache)) {
4936                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4937                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
4938                 release_firmware(fw);
4939                 return -EINVAL;
4940         }
4941
4942         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
4943
4944         release_firmware(fw);
4945
4946         hdsp->state |= HDSP_FirmwareCached;
4947
4948         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4949                 return err;
4950
4951         if (!(hdsp->state & HDSP_InitializationComplete)) {
4952                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4953                         return err;
4954
4955                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
4956                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
4957                         return err;
4958                 }
4959                 snd_hdsp_initialize_channels(hdsp);
4960                 snd_hdsp_initialize_midi_flush(hdsp);
4961                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4962                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4963                         return err;
4964                 }
4965         }
4966         return 0;
4967 }
4968 #endif
4969
4970 static int __devinit snd_hdsp_create(struct snd_card *card,
4971                                      struct hdsp *hdsp)
4972 {
4973         struct pci_dev *pci = hdsp->pci;
4974         int err;
4975         int is_9652 = 0;
4976         int is_9632 = 0;
4977
4978         hdsp->irq = -1;
4979         hdsp->state = 0;
4980         hdsp->midi[0].rmidi = NULL;
4981         hdsp->midi[1].rmidi = NULL;
4982         hdsp->midi[0].input = NULL;
4983         hdsp->midi[1].input = NULL;
4984         hdsp->midi[0].output = NULL;
4985         hdsp->midi[1].output = NULL;
4986         hdsp->midi[0].pending = 0;
4987         hdsp->midi[1].pending = 0;
4988         spin_lock_init(&hdsp->midi[0].lock);
4989         spin_lock_init(&hdsp->midi[1].lock);
4990         hdsp->iobase = NULL;
4991         hdsp->control_register = 0;
4992         hdsp->control2_register = 0;
4993         hdsp->io_type = Undefined;
4994         hdsp->max_channels = 26;
4995
4996         hdsp->card = card;
4997
4998         spin_lock_init(&hdsp->lock);
4999
5000         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5001
5002         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5003         hdsp->firmware_rev &= 0xff;
5004
5005         /* From Martin Bjoernsen :
5006             "It is important that the card's latency timer register in
5007             the PCI configuration space is set to a value much larger
5008             than 0 by the computer's BIOS or the driver.
5009             The windows driver always sets this 8 bit register [...]
5010             to its maximum 255 to avoid problems with some computers."
5011         */
5012         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5013
5014         strcpy(card->driver, "H-DSP");
5015         strcpy(card->mixername, "Xilinx FPGA");
5016
5017         if (hdsp->firmware_rev < 0xa)
5018                 return -ENODEV;
5019         else if (hdsp->firmware_rev < 0x64)
5020                 hdsp->card_name = "RME Hammerfall DSP";
5021         else if (hdsp->firmware_rev < 0x96) {
5022                 hdsp->card_name = "RME HDSP 9652";
5023                 is_9652 = 1;
5024         } else {
5025                 hdsp->card_name = "RME HDSP 9632";
5026                 hdsp->max_channels = 16;
5027                 is_9632 = 1;
5028         }
5029
5030         if ((err = pci_enable_device(pci)) < 0)
5031                 return err;
5032
5033         pci_set_master(hdsp->pci);
5034
5035         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5036                 return err;
5037         hdsp->port = pci_resource_start(pci, 0);
5038         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5039                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5040                 return -EBUSY;
5041         }
5042
5043         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5044                         "hdsp", hdsp)) {
5045                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5046                 return -EBUSY;
5047         }
5048
5049         hdsp->irq = pci->irq;
5050         hdsp->precise_ptr = 0;
5051         hdsp->use_midi_tasklet = 1;
5052         hdsp->dds_value = 0;
5053
5054         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5055                 return err;
5056
5057         if (!is_9652 && !is_9632) {
5058                 /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */
5059                 ssleep(2);
5060
5061                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5062 #ifdef HDSP_FW_LOADER
5063                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5064                                 /* we don't fail as this can happen
5065                                    if userspace is not ready for
5066                                    firmware upload
5067                                 */
5068                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5069                         else
5070                                 /* init is complete, we return */
5071                                 return 0;
5072 #endif
5073                         /* no iobox connected, we defer initialization */
5074                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5075                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5076                                 return err;
5077                         return 0;
5078                 } else {
5079                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5080                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5081                                 hdsp->io_type = Multiface;
5082                         else
5083                                 hdsp->io_type = Digiface;
5084                 }
5085         }
5086
5087         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5088                 return err;
5089
5090         if (is_9652)
5091                 hdsp->io_type = H9652;
5092
5093         if (is_9632)
5094                 hdsp->io_type = H9632;
5095
5096         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5097                 return err;
5098
5099         snd_hdsp_initialize_channels(hdsp);
5100         snd_hdsp_initialize_midi_flush(hdsp);
5101
5102         hdsp->state |= HDSP_FirmwareLoaded;
5103
5104         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5105                 return err;
5106
5107         return 0;
5108 }
5109
5110 static int snd_hdsp_free(struct hdsp *hdsp)
5111 {
5112         if (hdsp->port) {
5113                 /* stop the audio, and cancel all interrupts */
5114                 tasklet_kill(&hdsp->midi_tasklet);
5115                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5116                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5117         }
5118
5119         if (hdsp->irq >= 0)
5120                 free_irq(hdsp->irq, (void *)hdsp);
5121
5122         snd_hdsp_free_buffers(hdsp);
5123
5124         if (hdsp->iobase)
5125                 iounmap(hdsp->iobase);
5126
5127         if (hdsp->port)
5128                 pci_release_regions(hdsp->pci);
5129
5130         pci_disable_device(hdsp->pci);
5131         return 0;
5132 }
5133
5134 static void snd_hdsp_card_free(struct snd_card *card)
5135 {
5136         struct hdsp *hdsp = (struct hdsp *) card->private_data;
5137
5138         if (hdsp)
5139                 snd_hdsp_free(hdsp);
5140 }
5141
5142 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5143                                     const struct pci_device_id *pci_id)
5144 {
5145         static int dev;
5146         struct hdsp *hdsp;
5147         struct snd_card *card;
5148         int err;
5149
5150         if (dev >= SNDRV_CARDS)
5151                 return -ENODEV;
5152         if (!enable[dev]) {
5153                 dev++;
5154                 return -ENOENT;
5155         }
5156
5157         if (!(card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct hdsp))))
5158                 return -ENOMEM;
5159
5160         hdsp = (struct hdsp *) card->private_data;
5161         card->private_free = snd_hdsp_card_free;
5162         hdsp->dev = dev;
5163         hdsp->pci = pci;
5164         snd_card_set_dev(card, &pci->dev);
5165
5166         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5167                 snd_card_free(card);
5168                 return err;
5169         }
5170
5171         strcpy(card->shortname, "Hammerfall DSP");
5172         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5173                 hdsp->port, hdsp->irq);
5174
5175         if ((err = snd_card_register(card)) < 0) {
5176                 snd_card_free(card);
5177                 return err;
5178         }
5179         pci_set_drvdata(pci, card);
5180         dev++;
5181         return 0;
5182 }
5183
5184 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5185 {
5186         snd_card_free(pci_get_drvdata(pci));
5187         pci_set_drvdata(pci, NULL);
5188 }
5189
5190 static struct pci_driver driver = {
5191         .name =     "RME Hammerfall DSP",
5192         .id_table = snd_hdsp_ids,
5193         .probe =    snd_hdsp_probe,
5194         .remove = __devexit_p(snd_hdsp_remove),
5195 };
5196
5197 static int __init alsa_card_hdsp_init(void)
5198 {
5199         return pci_register_driver(&driver);
5200 }
5201
5202 static void __exit alsa_card_hdsp_exit(void)
5203 {
5204         pci_unregister_driver(&driver);
5205 }
5206
5207 module_init(alsa_card_hdsp_init)
5208 module_exit(alsa_card_hdsp_exit)