err.no Git - linux-2.6/blob - sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/slab.h>
  28 #include <linux/pci.h>
  29 #include <linux/firmware.h>
  30 #include <linux/moduleparam.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/pcm.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/rawmidi.h>
  38 #include <sound/hwdep.h>
  39 #include <sound/initval.h>
  40 #include <sound/hdsp.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/current.h>
  44 #include <asm/io.h>
  45
  46 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  47 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  48 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  49
  50 module_param_array(index, int, NULL, 0444);
  51 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  52 module_param_array(id, charp, NULL, 0444);
  53 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  54 module_param_array(enable, bool, NULL, 0444);
  55 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  56 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  57 MODULE_DESCRIPTION("RME Hammerfall DSP");
  58 MODULE_LICENSE("GPL");
  59 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  60                 "{RME HDSP-9652},"
  61                 "{RME HDSP-9632}}");
  62 #ifdef HDSP_FW_LOADER
  63 MODULE_FIRMWARE("multiface_firmware.bin");
  64 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
  65 MODULE_FIRMWARE("digiface_firmware.bin");
  66 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
  67 #endif
  68
  69 #define HDSP_MAX_CHANNELS        26
  70 #define HDSP_MAX_DS_CHANNELS     14
  71 #define HDSP_MAX_QS_CHANNELS     8
  72 #define DIGIFACE_SS_CHANNELS     26
  73 #define DIGIFACE_DS_CHANNELS     14
  74 #define MULTIFACE_SS_CHANNELS    18
  75 #define MULTIFACE_DS_CHANNELS    14
  76 #define H9652_SS_CHANNELS        26
  77 #define H9652_DS_CHANNELS        14
  78 /* This does not include possible Analog Extension Boards
  79    AEBs are detected at card initialization
  80 */
  81 #define H9632_SS_CHANNELS        12
  82 #define H9632_DS_CHANNELS        8
  83 #define H9632_QS_CHANNELS        4
  84
  85 /* Write registers. These are defined as byte-offsets from the iobase value.
  86  */
  87 #define HDSP_resetPointer               0
  88 #define HDSP_freqReg                    0
  89 #define HDSP_outputBufferAddress        32
  90 #define HDSP_inputBufferAddress         36
  91 #define HDSP_controlRegister            64
  92 #define HDSP_interruptConfirmation      96
  93 #define HDSP_outputEnable               128
  94 #define HDSP_control2Reg                256
  95 #define HDSP_midiDataOut0               352
  96 #define HDSP_midiDataOut1               356
  97 #define HDSP_fifoData                   368
  98 #define HDSP_inputEnable                384
  99
 100 /* Read registers. These are defined as byte-offsets from the iobase value
 101  */
 102
 103 #define HDSP_statusRegister    0
 104 #define HDSP_timecode        128
 105 #define HDSP_status2Register 192
 106 #define HDSP_midiDataIn0     360
 107 #define HDSP_midiDataIn1     364
 108 #define HDSP_midiStatusOut0  384
 109 #define HDSP_midiStatusOut1  388
 110 #define HDSP_midiStatusIn0   392
 111 #define HDSP_midiStatusIn1   396
 112 #define HDSP_fifoStatus      400
 113
 114 /* the meters are regular i/o-mapped registers, but offset
 115    considerably from the rest. the peak registers are reset
 116    when read; the least-significant 4 bits are full-scale counters;
 117    the actual peak value is in the most-significant 24 bits.
 118 */
 119
 120 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 121 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 122 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 123 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 124 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 125
 126
 127 /* This is for H9652 cards
 128    Peak values are read downward from the base
 129    Rms values are read upward
 130    There are rms values for the outputs too
 131    26*3 values are read in ss mode
 132    14*3 in ds mode, with no gap between values
 133 */
 134 #define HDSP_9652_peakBase      7164
 135 #define HDSP_9652_rmsBase       4096
 136
 137 /* c.f. the hdsp_9632_meters_t struct */
 138 #define HDSP_9632_metersBase    4096
 139
 140 #define HDSP_IO_EXTENT     7168
 141
 142 /* control2 register bits */
 143
 144 #define HDSP_TMS                0x01
 145 #define HDSP_TCK                0x02
 146 #define HDSP_TDI                0x04
 147 #define HDSP_JTAG               0x08
 148 #define HDSP_PWDN               0x10
 149 #define HDSP_PROGRAM            0x020
 150 #define HDSP_CONFIG_MODE_0      0x040
 151 #define HDSP_CONFIG_MODE_1      0x080
 152 #define HDSP_VERSION_BIT        0x100
 153 #define HDSP_BIGENDIAN_MODE     0x200
 154 #define HDSP_RD_MULTIPLE        0x400
 155 #define HDSP_9652_ENABLE_MIXER  0x800
 156 #define HDSP_TDO                0x10000000
 157
 158 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 159 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 160
 161 /* Control Register bits */
 162
 163 #define HDSP_Start                (1<<0)  /* start engine */
 164 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 165 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 166 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 167 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 168 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 169 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 170 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 171 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 172 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 173 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 174 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 175 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 176 #define HDSP_SyncRef2             (1<<13)
 177 #define HDSP_SPDIFInputSelect0    (1<<14)
 178 #define HDSP_SPDIFInputSelect1    (1<<15)
 179 #define HDSP_SyncRef0             (1<<16)
 180 #define HDSP_SyncRef1             (1<<17)
 181 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 182 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 183 #define HDSP_Midi0InterruptEnable (1<<22)
 184 #define HDSP_Midi1InterruptEnable (1<<23)
 185 #define HDSP_LineOut              (1<<24)
 186 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 187 #define HDSP_ADGain1              (1<<26)
 188 #define HDSP_DAGain0              (1<<27)
 189 #define HDSP_DAGain1              (1<<28)
 190 #define HDSP_PhoneGain0           (1<<29)
 191 #define HDSP_PhoneGain1           (1<<30)
 192 #define HDSP_QuadSpeed            (1<<31)
 193
 194 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 195 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 196 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 197 #define HDSP_ADGainLowGain     0
 198
 199 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 200 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 201 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 202 #define HDSP_DAGainMinus10dBV    0
 203
 204 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 205 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 206 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 207 #define HDSP_PhoneGainMinus12dB  0
 208
 209 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 210 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 211
 212 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 213 #define HDSP_SPDIFInputADAT1    0
 214 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 215 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 216 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 217
 218 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 219 #define HDSP_SyncRef_ADAT1       0
 220 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 221 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 222 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 223 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 224 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 225
 226 /* Sample Clock Sources */
 227
 228 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 229 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 230 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 231 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 232 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 233 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 234 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 235 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 236 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 237 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 238
 239 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 240
 241 #define HDSP_SYNC_FROM_WORD      0
 242 #define HDSP_SYNC_FROM_SPDIF     1
 243 #define HDSP_SYNC_FROM_ADAT1     2
 244 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 245 #define HDSP_SYNC_FROM_ADAT2     4
 246 #define HDSP_SYNC_FROM_ADAT3     5
 247
 248 /* SyncCheck status */
 249
 250 #define HDSP_SYNC_CHECK_NO_LOCK 0
 251 #define HDSP_SYNC_CHECK_LOCK    1
 252 #define HDSP_SYNC_CHECK_SYNC    2
 253
 254 /* AutoSync references - used by "autosync_ref" control switch */
 255
 256 #define HDSP_AUTOSYNC_FROM_WORD      0
 257 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 258 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 259 #define HDSP_AUTOSYNC_FROM_NONE      3
 260 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 261 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 262 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 263
 264 /* Possible sources of S/PDIF input */
 265
 266 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 267 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 268 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 269 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 270
 271 #define HDSP_Frequency32KHz    HDSP_Frequency0
 272 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 273 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 274 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 275 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 276 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 277 /* For H9632 cards */
 278 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 279 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 280 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 281 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 282         return 104857600000000 / rate; // 100 MHz
 283         return 110100480000000 / rate; // 105 MHz
 284 */
 285 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 286
 287 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 288 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 289
 290 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 291 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 292
 293 /* Status Register bits */
 294
 295 #define HDSP_audioIRQPending    (1<<0)
 296 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 297 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 298 #define HDSP_Lock1              (1<<2)
 299 #define HDSP_Lock0              (1<<3)
 300 #define HDSP_SPDIFSync          (1<<4)
 301 #define HDSP_TimecodeLock       (1<<5)
 302 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 303 #define HDSP_Sync2              (1<<16)
 304 #define HDSP_Sync1              (1<<17)
 305 #define HDSP_Sync0              (1<<18)
 306 #define HDSP_DoubleSpeedStatus  (1<<19)
 307 #define HDSP_ConfigError        (1<<20)
 308 #define HDSP_DllError           (1<<21)
 309 #define HDSP_spdifFrequency0    (1<<22)
 310 #define HDSP_spdifFrequency1    (1<<23)
 311 #define HDSP_spdifFrequency2    (1<<24)
 312 #define HDSP_SPDIFErrorFlag     (1<<25)
 313 #define HDSP_BufferID           (1<<26)
 314 #define HDSP_TimecodeSync       (1<<27)
 315 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 316 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 317 #define HDSP_midi0IRQPending    (1<<30)
 318 #define HDSP_midi1IRQPending    (1<<31)
 319
 320 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 321
 322 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 323 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 324 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 325
 326 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 327 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 328 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 329
 330 /* This is for H9632 cards */
 331 #define HDSP_spdifFrequency128KHz   HDSP_spdifFrequencyMask
 332 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 333 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 334
 335 /* Status2 Register bits */
 336
 337 #define HDSP_version0     (1<<0)
 338 #define HDSP_version1     (1<<1)
 339 #define HDSP_version2     (1<<2)
 340 #define HDSP_wc_lock      (1<<3)
 341 #define HDSP_wc_sync      (1<<4)
 342 #define HDSP_inp_freq0    (1<<5)
 343 #define HDSP_inp_freq1    (1<<6)
 344 #define HDSP_inp_freq2    (1<<7)
 345 #define HDSP_SelSyncRef0  (1<<8)
 346 #define HDSP_SelSyncRef1  (1<<9)
 347 #define HDSP_SelSyncRef2  (1<<10)
 348
 349 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 350
 351 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 352 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 353 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 354 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 355 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 356 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 357 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 358 /* FIXME : more values for 9632 cards ? */
 359
 360 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 361 #define HDSP_SelSyncRef_ADAT1      0
 362 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 363 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 364 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 365 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 366 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 367
 368 /* Card state flags */
 369
 370 #define HDSP_InitializationComplete  (1<<0)
 371 #define HDSP_FirmwareLoaded          (1<<1)
 372 #define HDSP_FirmwareCached          (1<<2)
 373
 374 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 375
 376 #define HDSP_LONG_WAIT   5000
 377 #define HDSP_SHORT_WAIT  30
 378
 379 #define UNITY_GAIN                       32768
 380 #define MINUS_INFINITY_GAIN              0
 381
 382 /* the size of a substream (1 mono data stream) */
 383
 384 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 385 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 386
 387 /* the size of the area we need to allocate for DMA transfers. the
 388    size is the same regardless of the number of channels - the
 389    Multiface still uses the same memory area.
 390
 391    Note that we allocate 1 more channel than is apparently needed
 392    because the h/w seems to write 1 byte beyond the end of the last
 393    page. Sigh.
 394 */
 395
 396 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 397 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 398
 399 /* use hotplug firmeare loader? */
 400 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
 401 #if !defined(HDSP_USE_HWDEP_LOADER) && !defined(CONFIG_SND_HDSP)
 402 #define HDSP_FW_LOADER
 403 #endif
 404 #endif
 405
 406 struct hdsp_9632_meters {
 407     u32 input_peak[16];
 408     u32 playback_peak[16];
 409     u32 output_peak[16];
 410     u32 xxx_peak[16];
 411     u32 padding[64];
 412     u32 input_rms_low[16];
 413     u32 playback_rms_low[16];
 414     u32 output_rms_low[16];
 415     u32 xxx_rms_low[16];
 416     u32 input_rms_high[16];
 417     u32 playback_rms_high[16];
 418     u32 output_rms_high[16];
 419     u32 xxx_rms_high[16];
 420 };
 421
 422 struct hdsp_midi {
 423     struct hdsp             *hdsp;
 424     int                      id;
 425     struct snd_rawmidi           *rmidi;
 426     struct snd_rawmidi_substream *input;
 427     struct snd_rawmidi_substream *output;
 428     char                     istimer; /* timer in use */
 429     struct timer_list        timer;
 430     spinlock_t               lock;
 431     int                      pending;
 432 };
 433
 434 struct hdsp {
 435         spinlock_t            lock;
 436         struct snd_pcm_substream *capture_substream;
 437         struct snd_pcm_substream *playback_substream;
 438         struct hdsp_midi      midi[2];
 439         struct tasklet_struct midi_tasklet;
 440         int                   use_midi_tasklet;
 441         int                   precise_ptr;
 442         u32                   control_register;      /* cached value */
 443         u32                   control2_register;     /* cached value */
 444         u32                   creg_spdif;
 445         u32                   creg_spdif_stream;
 446         int                   clock_source_locked;
 447         char                 *card_name;             /* digiface/multiface */
 448         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 449         unsigned short        firmware_rev;
 450         unsigned short        state;                 /* stores state bits */
 451         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
 452         size_t                period_bytes;          /* guess what this is */
 453         unsigned char         max_channels;
 454         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 455         unsigned char         ds_in_channels;
 456         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 457         unsigned char         qs_out_channels;
 458         unsigned char         ds_out_channels;
 459         unsigned char         ss_out_channels;
 460
 461         struct snd_dma_buffer capture_dma_buf;
 462         struct snd_dma_buffer playback_dma_buf;
 463         unsigned char        *capture_buffer;       /* suitably aligned address */
 464         unsigned char        *playback_buffer;      /* suitably aligned address */
 465
 466         pid_t                 capture_pid;
 467         pid_t                 playback_pid;
 468         int                   running;
 469         int                   system_sample_rate;
 470         char                 *channel_map;
 471         int                   dev;
 472         int                   irq;
 473         unsigned long         port;
 474         void __iomem         *iobase;
 475         struct snd_card *card;
 476         struct snd_pcm *pcm;
 477         struct snd_hwdep          *hwdep;
 478         struct pci_dev       *pci;
 479         struct snd_kcontrol *spdif_ctl;
 480         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 481         unsigned int          dds_value; /* last value written to freq register */
 482 };
 483
 484 /* These tables map the ALSA channels 1..N to the channels that we
 485    need to use in order to find the relevant channel buffer. RME
 486    refer to this kind of mapping as between "the ADAT channel and
 487    the DMA channel." We index it using the logical audio channel,
 488    and the value is the DMA channel (i.e. channel buffer number)
 489    where the data for that channel can be read/written from/to.
 490 */
 491
 492 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 493         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 494         18, 19, 20, 21, 22, 23, 24, 25
 495 };
 496
 497 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 498         /* Analog */
 499         0, 1, 2, 3, 4, 5, 6, 7,
 500         /* ADAT 2 */
 501         16, 17, 18, 19, 20, 21, 22, 23,
 502         /* SPDIF */
 503         24, 25,
 504         -1, -1, -1, -1, -1, -1, -1, -1
 505 };
 506
 507 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 508         /* ADAT channels are remapped */
 509         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 510         /* channels 12 and 13 are S/PDIF */
 511         24, 25,
 512         /* others don't exist */
 513         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 514 };
 515
 516 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 517         /* ADAT channels */
 518         0, 1, 2, 3, 4, 5, 6, 7,
 519         /* SPDIF */
 520         8, 9,
 521         /* Analog */
 522         10, 11,
 523         /* AO4S-192 and AI4S-192 extension boards */
 524         12, 13, 14, 15,
 525         /* others don't exist */
 526         -1, -1, -1, -1, -1, -1, -1, -1,
 527         -1, -1
 528 };
 529
 530 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 531         /* ADAT */
 532         1, 3, 5, 7,
 533         /* SPDIF */
 534         8, 9,
 535         /* Analog */
 536         10, 11,
 537         /* AO4S-192 and AI4S-192 extension boards */
 538         12, 13, 14, 15,
 539         /* others don't exist */
 540         -1, -1, -1, -1, -1, -1, -1, -1,
 541         -1, -1, -1, -1, -1, -1
 542 };
 543
 544 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 545         /* ADAT is disabled in this mode */
 546         /* SPDIF */
 547         8, 9,
 548         /* Analog */
 549         10, 11,
 550         /* AO4S-192 and AI4S-192 extension boards */
 551         12, 13, 14, 15,
 552         /* others don't exist */
 553         -1, -1, -1, -1, -1, -1, -1, -1,
 554         -1, -1, -1, -1, -1, -1, -1, -1,
 555         -1, -1
 556 };
 557
 558 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 559 {
 560         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 561         dmab->dev.dev = snd_dma_pci_data(pci);
 562         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 563                 if (dmab->bytes >= size)
 564                         return 0;
 565         }
 566         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 567                                 size, dmab) < 0)
 568                 return -ENOMEM;
 569         return 0;
 570 }
 571
 572 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 573 {
 574         if (dmab->area) {
 575                 dmab->dev.dev = NULL; /* make it anonymous */
 576                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 577         }
 578 }
 579
 580
 581 static struct pci_device_id snd_hdsp_ids[] = {
 582         {
 583                 .vendor = PCI_VENDOR_ID_XILINX,
 584                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 585                 .subvendor = PCI_ANY_ID,
 586                 .subdevice = PCI_ANY_ID,
 587         }, /* RME Hammerfall-DSP */
 588         { 0, },
 589 };
 590
 591 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 592
 593 /* prototypes */
 594 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 595 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 596 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 597 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 598 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 599 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 600 static int hdsp_autosync_ref(struct hdsp *hdsp);
 601 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 602 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 603
 604 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 605 {
 606         switch (hdsp->io_type) {
 607         case Multiface:
 608         case Digiface:
 609         default:
 610                 return (64 * out) + (32 + (in));
 611         case H9632:
 612                 return (32 * out) + (16 + (in));
 613         case H9652:
 614                 return (52 * out) + (26 + (in));
 615         }
 616 }
 617
 618 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 619 {
 620         switch (hdsp->io_type) {
 621         case Multiface:
 622         case Digiface:
 623         default:
 624                 return (64 * out) + in;
 625         case H9632:
 626                 return (32 * out) + in;
 627         case H9652:
 628                 return (52 * out) + in;
 629         }
 630 }
 631
 632 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 633 {
 634         writel(val, hdsp->iobase + reg);
 635 }
 636
 637 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 638 {
 639         return readl (hdsp->iobase + reg);
 640 }
 641
 642 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 643 {
 644
 645         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 646         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
 647                 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
 648                 hdsp->state &= ~HDSP_FirmwareLoaded;
 649                 return -EIO;
 650         }
 651         return 0;
 652
 653 }
 654
 655 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 656
 657         int i;
 658         unsigned long flags;
 659
 660         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 661
 662                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 663
 664                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 665                 hdsp_write (hdsp, HDSP_fifoData, 0);
 666
 667                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 668                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 669                         return -EIO;
 670                 }
 671
 672                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 673
 674                 for (i = 0; i < 24413; ++i) {
 675                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
 676                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 677                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 678                                 return -EIO;
 679                         }
 680                 }
 681
 682                 ssleep(3);
 683
 684                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 685                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
 686                         return -EIO;
 687                 }
 688
 689 #ifdef SNDRV_BIG_ENDIAN
 690                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 691 #else
 692                 hdsp->control2_register = 0;
 693 #endif
 694                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 695                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 696
 697         }
 698         if (hdsp->state & HDSP_InitializationComplete) {
 699                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 700                 spin_lock_irqsave(&hdsp->lock, flags);
 701                 snd_hdsp_set_defaults(hdsp);
 702                 spin_unlock_irqrestore(&hdsp->lock, flags);
 703         }
 704
 705         hdsp->state |= HDSP_FirmwareLoaded;
 706
 707         return 0;
 708 }
 709
 710 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 711 {
 712         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 713
 714                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
 715                 hdsp_write (hdsp, HDSP_fifoData, 0);
 716                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
 717                         return -EIO;
 718
 719                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 720                 hdsp_write (hdsp, HDSP_fifoData, 0);
 721
 722                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
 723                         hdsp->io_type = Multiface;
 724                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
 725                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 726                         hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
 727                 } else {
 728                         hdsp->io_type = Digiface;
 729                 }
 730         } else {
 731                 /* firmware was already loaded, get iobox type */
 732                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 733                         hdsp->io_type = Multiface;
 734                 else
 735                         hdsp->io_type = Digiface;
 736         }
 737         return 0;
 738 }
 739
 740
 741 #ifdef HDSP_FW_LOADER
 742 static int __devinit hdsp_request_fw_loader(struct hdsp *hdsp);
 743 #endif
 744
 745 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 746 {
 747         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 748                 return 0;
 749         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 750                 hdsp->state &= ~HDSP_FirmwareLoaded;
 751                 if (! load_on_demand)
 752                         return -EIO;
 753                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 754                 /* try to load firmware */
 755                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 756 #ifdef HDSP_FW_LOADER
 757                         if (! hdsp_request_fw_loader(hdsp))
 758                                 return 0;
 759 #endif
 760                         snd_printk(KERN_ERR
 761                                    "Hammerfall-DSP: No firmware loaded nor "
 762                                    "cached, please upload firmware.\n");
 763                         return -EIO;
 764                 }
 765                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 766                         snd_printk(KERN_ERR
 767                                    "Hammerfall-DSP: Firmware loading from "
 768                                    "cache failed, please upload manually.\n");
 769                         return -EIO;
 770                 }
 771         }
 772         return 0;
 773 }
 774
 775
 776 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 777 {
 778         int i;
 779
 780         /* the fifoStatus registers reports on how many words
 781            are available in the command FIFO.
 782         */
 783
 784         for (i = 0; i < timeout; i++) {
 785
 786                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 787                         return 0;
 788
 789                 /* not very friendly, but we only do this during a firmware
 790                    load and changing the mixer, so we just put up with it.
 791                 */
 792
 793                 udelay (100);
 794         }
 795
 796         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 797                     count, timeout);
 798         return -1;
 799 }
 800
 801 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 802 {
 803         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 804                 return 0;
 805
 806         return hdsp->mixer_matrix[addr];
 807 }
 808
 809 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 810 {
 811         unsigned int ad;
 812
 813         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 814                 return -1;
 815
 816         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 817
 818                 /* from martin bjornsen:
 819
 820                    "You can only write dwords to the
 821                    mixer memory which contain two
 822                    mixer values in the low and high
 823                    word. So if you want to change
 824                    value 0 you have to read value 1
 825                    from the cache and write both to
 826                    the first dword in the mixer
 827                    memory."
 828                 */
 829
 830                 if (hdsp->io_type == H9632 && addr >= 512)
 831                         return 0;
 832
 833                 if (hdsp->io_type == H9652 && addr >= 1352)
 834                         return 0;
 835
 836                 hdsp->mixer_matrix[addr] = data;
 837
 838
 839                 /* `addr' addresses a 16-bit wide address, but
 840                    the address space accessed via hdsp_write
 841                    uses byte offsets. put another way, addr
 842                    varies from 0 to 1351, but to access the
 843                    corresponding memory location, we need
 844                    to access 0 to 2703 ...
 845                 */
 846                 ad = addr/2;
 847
 848                 hdsp_write (hdsp, 4096 + (ad*4),
 849                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 850                             hdsp->mixer_matrix[addr&0x7fe]);
 851
 852                 return 0;
 853
 854         } else {
 855
 856                 ad = (addr << 16) + data;
 857
 858                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 859                         return -1;
 860
 861                 hdsp_write (hdsp, HDSP_fifoData, ad);
 862                 hdsp->mixer_matrix[addr] = data;
 863
 864         }
 865
 866         return 0;
 867 }
 868
 869 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 870 {
 871         unsigned long flags;
 872         int ret = 1;
 873
 874         spin_lock_irqsave(&hdsp->lock, flags);
 875         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 876             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 877                 ret = 0;
 878         spin_unlock_irqrestore(&hdsp->lock, flags);
 879         return ret;
 880 }
 881
 882 static int hdsp_external_sample_rate (struct hdsp *hdsp)
 883 {
 884         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
 885         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
 886
 887         switch (rate_bits) {
 888         case HDSP_systemFrequency32:   return 32000;
 889         case HDSP_systemFrequency44_1: return 44100;
 890         case HDSP_systemFrequency48:   return 48000;
 891         case HDSP_systemFrequency64:   return 64000;
 892         case HDSP_systemFrequency88_2: return 88200;
 893         case HDSP_systemFrequency96:   return 96000;
 894         default:
 895                 return 0;
 896         }
 897 }
 898
 899 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 900 {
 901         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 902         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 903
 904         if (status & HDSP_SPDIFErrorFlag)
 905                 return 0;
 906
 907         switch (rate_bits) {
 908         case HDSP_spdifFrequency32KHz: return 32000;
 909         case HDSP_spdifFrequency44_1KHz: return 44100;
 910         case HDSP_spdifFrequency48KHz: return 48000;
 911         case HDSP_spdifFrequency64KHz: return 64000;
 912         case HDSP_spdifFrequency88_2KHz: return 88200;
 913         case HDSP_spdifFrequency96KHz: return 96000;
 914         case HDSP_spdifFrequency128KHz:
 915                 if (hdsp->io_type == H9632) return 128000;
 916                 break;
 917         case HDSP_spdifFrequency176_4KHz:
 918                 if (hdsp->io_type == H9632) return 176400;
 919                 break;
 920         case HDSP_spdifFrequency192KHz:
 921                 if (hdsp->io_type == H9632) return 192000;
 922                 break;
 923         default:
 924                 break;
 925         }
 926         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
 927         return 0;
 928 }
 929
 930 static void hdsp_compute_period_size(struct hdsp *hdsp)
 931 {
 932         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
 933 }
 934
 935 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
 936 {
 937         int position;
 938
 939         position = hdsp_read(hdsp, HDSP_statusRegister);
 940
 941         if (!hdsp->precise_ptr)
 942                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
 943
 944         position &= HDSP_BufferPositionMask;
 945         position /= 4;
 946         position &= (hdsp->period_bytes/2) - 1;
 947         return position;
 948 }
 949
 950 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
 951 {
 952         hdsp_write (hdsp, HDSP_resetPointer, 0);
 953         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
 954                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
 955                  * requires (?) to write again DDS value after a reset pointer
 956                  * (at least, it works like this) */
 957                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
 958 }
 959
 960 static void hdsp_start_audio(struct hdsp *s)
 961 {
 962         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
 963         hdsp_write(s, HDSP_controlRegister, s->control_register);
 964 }
 965
 966 static void hdsp_stop_audio(struct hdsp *s)
 967 {
 968         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
 969         hdsp_write(s, HDSP_controlRegister, s->control_register);
 970 }
 971
 972 static void hdsp_silence_playback(struct hdsp *hdsp)
 973 {
 974         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
 975 }
 976
 977 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
 978 {
 979         int n;
 980
 981         spin_lock_irq(&s->lock);
 982
 983         frames >>= 7;
 984         n = 0;
 985         while (frames) {
 986                 n++;
 987                 frames >>= 1;
 988         }
 989
 990         s->control_register &= ~HDSP_LatencyMask;
 991         s->control_register |= hdsp_encode_latency(n);
 992
 993         hdsp_write(s, HDSP_controlRegister, s->control_register);
 994
 995         hdsp_compute_period_size(s);
 996
 997         spin_unlock_irq(&s->lock);
 998
 999         return 0;
1000 }
1001
1002 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1003 {
1004         u64 n;
1005         u32 r;
1006
1007         if (rate >= 112000)
1008                 rate /= 4;
1009         else if (rate >= 56000)
1010                 rate /= 2;
1011
1012         n = DDS_NUMERATOR;
1013         div64_32(&n, rate, &r);
1014         /* n should be less than 2^32 for being written to FREQ register */
1015         snd_assert((n >> 32) == 0);
1016         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1017            value to write it after a reset */
1018         hdsp->dds_value = n;
1019         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1020 }
1021
1022 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1023 {
1024         int reject_if_open = 0;
1025         int current_rate;
1026         int rate_bits;
1027
1028         /* ASSUMPTION: hdsp->lock is either held, or
1029            there is no need for it (e.g. during module
1030            initialization).
1031         */
1032
1033         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1034                 if (called_internally) {
1035                         /* request from ctl or card initialization */
1036                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1037                         return -1;
1038                 } else {
1039                         /* hw_param request while in AutoSync mode */
1040                         int external_freq = hdsp_external_sample_rate(hdsp);
1041                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1042
1043                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1044                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1045                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1046                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1047                         else if (rate != external_freq) {
1048                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1049                                 return -1;
1050                         }
1051                 }
1052         }
1053
1054         current_rate = hdsp->system_sample_rate;
1055
1056         /* Changing from a "single speed" to a "double speed" rate is
1057            not allowed if any substreams are open. This is because
1058            such a change causes a shift in the location of
1059            the DMA buffers and a reduction in the number of available
1060            buffers.
1061
1062            Note that a similar but essentially insoluble problem
1063            exists for externally-driven rate changes. All we can do
1064            is to flag rate changes in the read/write routines.  */
1065
1066         if (rate > 96000 && hdsp->io_type != H9632)
1067                 return -EINVAL;
1068
1069         switch (rate) {
1070         case 32000:
1071                 if (current_rate > 48000)
1072                         reject_if_open = 1;
1073                 rate_bits = HDSP_Frequency32KHz;
1074                 break;
1075         case 44100:
1076                 if (current_rate > 48000)
1077                         reject_if_open = 1;
1078                 rate_bits = HDSP_Frequency44_1KHz;
1079                 break;
1080         case 48000:
1081                 if (current_rate > 48000)
1082                         reject_if_open = 1;
1083                 rate_bits = HDSP_Frequency48KHz;
1084                 break;
1085         case 64000:
1086                 if (current_rate <= 48000 || current_rate > 96000)
1087                         reject_if_open = 1;
1088                 rate_bits = HDSP_Frequency64KHz;
1089                 break;
1090         case 88200:
1091                 if (current_rate <= 48000 || current_rate > 96000)
1092                         reject_if_open = 1;
1093                 rate_bits = HDSP_Frequency88_2KHz;
1094                 break;
1095         case 96000:
1096                 if (current_rate <= 48000 || current_rate > 96000)
1097                         reject_if_open = 1;
1098                 rate_bits = HDSP_Frequency96KHz;
1099                 break;
1100         case 128000:
1101                 if (current_rate < 128000)
1102                         reject_if_open = 1;
1103                 rate_bits = HDSP_Frequency128KHz;
1104                 break;
1105         case 176400:
1106                 if (current_rate < 128000)
1107                         reject_if_open = 1;
1108                 rate_bits = HDSP_Frequency176_4KHz;
1109                 break;
1110         case 192000:
1111                 if (current_rate < 128000)
1112                         reject_if_open = 1;
1113                 rate_bits = HDSP_Frequency192KHz;
1114                 break;
1115         default:
1116                 return -EINVAL;
1117         }
1118
1119         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1120                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1121                             hdsp->capture_pid,
1122                             hdsp->playback_pid);
1123                 return -EBUSY;
1124         }
1125
1126         hdsp->control_register &= ~HDSP_FrequencyMask;
1127         hdsp->control_register |= rate_bits;
1128         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1129
1130         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1131         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1132                 hdsp_set_dds_value(hdsp, rate);
1133
1134         if (rate >= 128000) {
1135                 hdsp->channel_map = channel_map_H9632_qs;
1136         } else if (rate > 48000) {
1137                 if (hdsp->io_type == H9632)
1138                         hdsp->channel_map = channel_map_H9632_ds;
1139                 else
1140                         hdsp->channel_map = channel_map_ds;
1141         } else {
1142                 switch (hdsp->io_type) {
1143                 case Multiface:
1144                         hdsp->channel_map = channel_map_mf_ss;
1145                         break;
1146                 case Digiface:
1147                 case H9652:
1148                         hdsp->channel_map = channel_map_df_ss;
1149                         break;
1150                 case H9632:
1151                         hdsp->channel_map = channel_map_H9632_ss;
1152                         break;
1153                 default:
1154                         /* should never happen */
1155                         break;
1156                 }
1157         }
1158
1159         hdsp->system_sample_rate = rate;
1160
1161         return 0;
1162 }
1163
1164 /*----------------------------------------------------------------------------
1165    MIDI
1166   ----------------------------------------------------------------------------*/
1167
1168 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1169 {
1170         /* the hardware already does the relevant bit-mask with 0xff */
1171         if (id)
1172                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1173         else
1174                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1175 }
1176
1177 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1178 {
1179         /* the hardware already does the relevant bit-mask with 0xff */
1180         if (id)
1181                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1182         else
1183                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1184 }
1185
1186 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1187 {
1188         if (id)
1189                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1190         else
1191                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1192 }
1193
1194 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1195 {
1196         int fifo_bytes_used;
1197
1198         if (id)
1199                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1200         else
1201                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1202
1203         if (fifo_bytes_used < 128)
1204                 return  128 - fifo_bytes_used;
1205         else
1206                 return 0;
1207 }
1208
1209 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1210 {
1211         while (snd_hdsp_midi_input_available (hdsp, id))
1212                 snd_hdsp_midi_read_byte (hdsp, id);
1213 }
1214
1215 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1216 {
1217         unsigned long flags;
1218         int n_pending;
1219         int to_write;
1220         int i;
1221         unsigned char buf[128];
1222
1223         /* Output is not interrupt driven */
1224
1225         spin_lock_irqsave (&hmidi->lock, flags);
1226         if (hmidi->output) {
1227                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1228                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1229                                 if (n_pending > (int)sizeof (buf))
1230                                         n_pending = sizeof (buf);
1231
1232                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1233                                         for (i = 0; i < to_write; ++i)
1234                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1235                                 }
1236                         }
1237                 }
1238         }
1239         spin_unlock_irqrestore (&hmidi->lock, flags);
1240         return 0;
1241 }
1242
1243 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1244 {
1245         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1246         unsigned long flags;
1247         int n_pending;
1248         int i;
1249
1250         spin_lock_irqsave (&hmidi->lock, flags);
1251         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1252                 if (hmidi->input) {
1253                         if (n_pending > (int)sizeof (buf))
1254                                 n_pending = sizeof (buf);
1255                         for (i = 0; i < n_pending; ++i)
1256                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1257                         if (n_pending)
1258                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1259                 } else {
1260                         /* flush the MIDI input FIFO */
1261                         while (--n_pending)
1262                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1263                 }
1264         }
1265         hmidi->pending = 0;
1266         if (hmidi->id)
1267                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1268         else
1269                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1270         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1271         spin_unlock_irqrestore (&hmidi->lock, flags);
1272         return snd_hdsp_midi_output_write (hmidi);
1273 }
1274
1275 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1276 {
1277         struct hdsp *hdsp;
1278         struct hdsp_midi *hmidi;
1279         unsigned long flags;
1280         u32 ie;
1281
1282         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1283         hdsp = hmidi->hdsp;
1284         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1285         spin_lock_irqsave (&hdsp->lock, flags);
1286         if (up) {
1287                 if (!(hdsp->control_register & ie)) {
1288                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1289                         hdsp->control_register |= ie;
1290                 }
1291         } else {
1292                 hdsp->control_register &= ~ie;
1293                 tasklet_kill(&hdsp->midi_tasklet);
1294         }
1295
1296         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1297         spin_unlock_irqrestore (&hdsp->lock, flags);
1298 }
1299
1300 static void snd_hdsp_midi_output_timer(unsigned long data)
1301 {
1302         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1303         unsigned long flags;
1304
1305         snd_hdsp_midi_output_write(hmidi);
1306         spin_lock_irqsave (&hmidi->lock, flags);
1307
1308         /* this does not bump hmidi->istimer, because the
1309            kernel automatically removed the timer when it
1310            expired, and we are now adding it back, thus
1311            leaving istimer wherever it was set before.
1312         */
1313
1314         if (hmidi->istimer) {
1315                 hmidi->timer.expires = 1 + jiffies;
1316                 add_timer(&hmidi->timer);
1317         }
1318
1319         spin_unlock_irqrestore (&hmidi->lock, flags);
1320 }
1321
1322 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1323 {
1324         struct hdsp_midi *hmidi;
1325         unsigned long flags;
1326
1327         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1328         spin_lock_irqsave (&hmidi->lock, flags);
1329         if (up) {
1330                 if (!hmidi->istimer) {
1331                         init_timer(&hmidi->timer);
1332                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1333                         hmidi->timer.data = (unsigned long) hmidi;
1334                         hmidi->timer.expires = 1 + jiffies;
1335                         add_timer(&hmidi->timer);
1336                         hmidi->istimer++;
1337                 }
1338         } else {
1339                 if (hmidi->istimer && --hmidi->istimer <= 0)
1340                         del_timer (&hmidi->timer);
1341         }
1342         spin_unlock_irqrestore (&hmidi->lock, flags);
1343         if (up)
1344                 snd_hdsp_midi_output_write(hmidi);
1345 }
1346
1347 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1348 {
1349         struct hdsp_midi *hmidi;
1350
1351         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1352         spin_lock_irq (&hmidi->lock);
1353         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1354         hmidi->input = substream;
1355         spin_unlock_irq (&hmidi->lock);
1356
1357         return 0;
1358 }
1359
1360 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1361 {
1362         struct hdsp_midi *hmidi;
1363
1364         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1365         spin_lock_irq (&hmidi->lock);
1366         hmidi->output = substream;
1367         spin_unlock_irq (&hmidi->lock);
1368
1369         return 0;
1370 }
1371
1372 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1373 {
1374         struct hdsp_midi *hmidi;
1375
1376         snd_hdsp_midi_input_trigger (substream, 0);
1377
1378         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1379         spin_lock_irq (&hmidi->lock);
1380         hmidi->input = NULL;
1381         spin_unlock_irq (&hmidi->lock);
1382
1383         return 0;
1384 }
1385
1386 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1387 {
1388         struct hdsp_midi *hmidi;
1389
1390         snd_hdsp_midi_output_trigger (substream, 0);
1391
1392         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1393         spin_lock_irq (&hmidi->lock);
1394         hmidi->output = NULL;
1395         spin_unlock_irq (&hmidi->lock);
1396
1397         return 0;
1398 }
1399
1400 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1401 {
1402         .open =         snd_hdsp_midi_output_open,
1403         .close =        snd_hdsp_midi_output_close,
1404         .trigger =      snd_hdsp_midi_output_trigger,
1405 };
1406
1407 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1408 {
1409         .open =         snd_hdsp_midi_input_open,
1410         .close =        snd_hdsp_midi_input_close,
1411         .trigger =      snd_hdsp_midi_input_trigger,
1412 };
1413
1414 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1415 {
1416         char buf[32];
1417
1418         hdsp->midi[id].id = id;
1419         hdsp->midi[id].rmidi = NULL;
1420         hdsp->midi[id].input = NULL;
1421         hdsp->midi[id].output = NULL;
1422         hdsp->midi[id].hdsp = hdsp;
1423         hdsp->midi[id].istimer = 0;
1424         hdsp->midi[id].pending = 0;
1425         spin_lock_init (&hdsp->midi[id].lock);
1426
1427         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1428         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1429                 return -1;
1430
1431         sprintf (hdsp->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1);
1432         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1433
1434         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1435         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1436
1437         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1438                 SNDRV_RAWMIDI_INFO_INPUT |
1439                 SNDRV_RAWMIDI_INFO_DUPLEX;
1440
1441         return 0;
1442 }
1443
1444 /*-----------------------------------------------------------------------------
1445   Control Interface
1446   ----------------------------------------------------------------------------*/
1447
1448 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1449 {
1450         u32 val = 0;
1451         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1452         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1453         if (val & HDSP_SPDIFProfessional)
1454                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1455         else
1456                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1457         return val;
1458 }
1459
1460 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1461 {
1462         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1463                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1464         if (val & HDSP_SPDIFProfessional)
1465                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1466         else
1467                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1468 }
1469
1470 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1471 {
1472         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1473         uinfo->count = 1;
1474         return 0;
1475 }
1476
1477 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1478 {
1479         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1480
1481         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1482         return 0;
1483 }
1484
1485 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1486 {
1487         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1488         int change;
1489         u32 val;
1490
1491         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1492         spin_lock_irq(&hdsp->lock);
1493         change = val != hdsp->creg_spdif;
1494         hdsp->creg_spdif = val;
1495         spin_unlock_irq(&hdsp->lock);
1496         return change;
1497 }
1498
1499 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1500 {
1501         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1502         uinfo->count = 1;
1503         return 0;
1504 }
1505
1506 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1507 {
1508         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1509
1510         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1511         return 0;
1512 }
1513
1514 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1515 {
1516         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1517         int change;
1518         u32 val;
1519
1520         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1521         spin_lock_irq(&hdsp->lock);
1522         change = val != hdsp->creg_spdif_stream;
1523         hdsp->creg_spdif_stream = val;
1524         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1525         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1526         spin_unlock_irq(&hdsp->lock);
1527         return change;
1528 }
1529
1530 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1531 {
1532         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1533         uinfo->count = 1;
1534         return 0;
1535 }
1536
1537 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1538 {
1539         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1540         return 0;
1541 }
1542
1543 #define HDSP_SPDIF_IN(xname, xindex) \
1544 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1545   .name = xname, \
1546   .index = xindex, \
1547   .info = snd_hdsp_info_spdif_in, \
1548   .get = snd_hdsp_get_spdif_in, \
1549   .put = snd_hdsp_put_spdif_in }
1550
1551 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1552 {
1553         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1554 }
1555
1556 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1557 {
1558         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1559         hdsp->control_register |= hdsp_encode_spdif_in(in);
1560         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1561         return 0;
1562 }
1563
1564 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1565 {
1566         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1567         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1568
1569         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1570         uinfo->count = 1;
1571         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1572         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1573                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1574         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1575         return 0;
1576 }
1577
1578 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1579 {
1580         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1581
1582         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1583         return 0;
1584 }
1585
1586 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1587 {
1588         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1589         int change;
1590         unsigned int val;
1591
1592         if (!snd_hdsp_use_is_exclusive(hdsp))
1593                 return -EBUSY;
1594         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1595         spin_lock_irq(&hdsp->lock);
1596         change = val != hdsp_spdif_in(hdsp);
1597         if (change)
1598                 hdsp_set_spdif_input(hdsp, val);
1599         spin_unlock_irq(&hdsp->lock);
1600         return change;
1601 }
1602
1603 #define HDSP_SPDIF_OUT(xname, xindex) \
1604 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1605   .info = snd_hdsp_info_spdif_bits, \
1606   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1607
1608 static int hdsp_spdif_out(struct hdsp *hdsp)
1609 {
1610         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1611 }
1612
1613 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1614 {
1615         if (out)
1616                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1617         else
1618                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1619         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1620         return 0;
1621 }
1622
1623 #define snd_hdsp_info_spdif_bits        snd_ctl_boolean_mono_info
1624
1625 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1626 {
1627         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1628
1629         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1630         return 0;
1631 }
1632
1633 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1634 {
1635         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1636         int change;
1637         unsigned int val;
1638
1639         if (!snd_hdsp_use_is_exclusive(hdsp))
1640                 return -EBUSY;
1641         val = ucontrol->value.integer.value[0] & 1;
1642         spin_lock_irq(&hdsp->lock);
1643         change = (int)val != hdsp_spdif_out(hdsp);
1644         hdsp_set_spdif_output(hdsp, val);
1645         spin_unlock_irq(&hdsp->lock);
1646         return change;
1647 }
1648
1649 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1650 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1651   .info = snd_hdsp_info_spdif_bits, \
1652   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1653
1654 static int hdsp_spdif_professional(struct hdsp *hdsp)
1655 {
1656         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1657 }
1658
1659 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1660 {
1661         if (val)
1662                 hdsp->control_register |= HDSP_SPDIFProfessional;
1663         else
1664                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1665         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1666         return 0;
1667 }
1668
1669 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1670 {
1671         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1672
1673         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1674         return 0;
1675 }
1676
1677 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1678 {
1679         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1680         int change;
1681         unsigned int val;
1682
1683         if (!snd_hdsp_use_is_exclusive(hdsp))
1684                 return -EBUSY;
1685         val = ucontrol->value.integer.value[0] & 1;
1686         spin_lock_irq(&hdsp->lock);
1687         change = (int)val != hdsp_spdif_professional(hdsp);
1688         hdsp_set_spdif_professional(hdsp, val);
1689         spin_unlock_irq(&hdsp->lock);
1690         return change;
1691 }
1692
1693 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1694 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1695   .info = snd_hdsp_info_spdif_bits, \
1696   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1697
1698 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1699 {
1700         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1701 }
1702
1703 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1704 {
1705         if (val)
1706                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1707         else
1708                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1709         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1710         return 0;
1711 }
1712
1713 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1714 {
1715         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1716
1717         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1718         return 0;
1719 }
1720
1721 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1722 {
1723         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1724         int change;
1725         unsigned int val;
1726
1727         if (!snd_hdsp_use_is_exclusive(hdsp))
1728                 return -EBUSY;
1729         val = ucontrol->value.integer.value[0] & 1;
1730         spin_lock_irq(&hdsp->lock);
1731         change = (int)val != hdsp_spdif_emphasis(hdsp);
1732         hdsp_set_spdif_emphasis(hdsp, val);
1733         spin_unlock_irq(&hdsp->lock);
1734         return change;
1735 }
1736
1737 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1738 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1739   .info = snd_hdsp_info_spdif_bits, \
1740   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1741
1742 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1743 {
1744         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1745 }
1746
1747 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1748 {
1749         if (val)
1750                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1751         else
1752                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1753         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1754         return 0;
1755 }
1756
1757 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1758 {
1759         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1760
1761         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1762         return 0;
1763 }
1764
1765 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1766 {
1767         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1768         int change;
1769         unsigned int val;
1770
1771         if (!snd_hdsp_use_is_exclusive(hdsp))
1772                 return -EBUSY;
1773         val = ucontrol->value.integer.value[0] & 1;
1774         spin_lock_irq(&hdsp->lock);
1775         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1776         hdsp_set_spdif_nonaudio(hdsp, val);
1777         spin_unlock_irq(&hdsp->lock);
1778         return change;
1779 }
1780
1781 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1782 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1783   .name = xname, \
1784   .index = xindex, \
1785   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1786   .info = snd_hdsp_info_spdif_sample_rate, \
1787   .get = snd_hdsp_get_spdif_sample_rate \
1788 }
1789
1790 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1791 {
1792         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1793         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1794
1795         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1796         uinfo->count = 1;
1797         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1798         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1799                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1800         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1801         return 0;
1802 }
1803
1804 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1805 {
1806         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1807
1808         switch (hdsp_spdif_sample_rate(hdsp)) {
1809         case 32000:
1810                 ucontrol->value.enumerated.item[0] = 0;
1811                 break;
1812         case 44100:
1813                 ucontrol->value.enumerated.item[0] = 1;
1814                 break;
1815         case 48000:
1816                 ucontrol->value.enumerated.item[0] = 2;
1817                 break;
1818         case 64000:
1819                 ucontrol->value.enumerated.item[0] = 3;
1820                 break;
1821         case 88200:
1822                 ucontrol->value.enumerated.item[0] = 4;
1823                 break;
1824         case 96000:
1825                 ucontrol->value.enumerated.item[0] = 5;
1826                 break;
1827         case 128000:
1828                 ucontrol->value.enumerated.item[0] = 7;
1829                 break;
1830         case 176400:
1831                 ucontrol->value.enumerated.item[0] = 8;
1832                 break;
1833         case 192000:
1834                 ucontrol->value.enumerated.item[0] = 9;
1835                 break;
1836         default:
1837                 ucontrol->value.enumerated.item[0] = 6;
1838         }
1839         return 0;
1840 }
1841
1842 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1843 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1844   .name = xname, \
1845   .index = xindex, \
1846   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1847   .info = snd_hdsp_info_system_sample_rate, \
1848   .get = snd_hdsp_get_system_sample_rate \
1849 }
1850
1851 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1852 {
1853         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1854         uinfo->count = 1;
1855         return 0;
1856 }
1857
1858 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1859 {
1860         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1861
1862         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1863         return 0;
1864 }
1865
1866 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1867 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1868   .name = xname, \
1869   .index = xindex, \
1870   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1871   .info = snd_hdsp_info_autosync_sample_rate, \
1872   .get = snd_hdsp_get_autosync_sample_rate \
1873 }
1874
1875 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1876 {
1877         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1878         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1879         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1880         uinfo->count = 1;
1881         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1882         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1883                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1884         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1885         return 0;
1886 }
1887
1888 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1889 {
1890         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1891
1892         switch (hdsp_external_sample_rate(hdsp)) {
1893         case 32000:
1894                 ucontrol->value.enumerated.item[0] = 0;
1895                 break;
1896         case 44100:
1897                 ucontrol->value.enumerated.item[0] = 1;
1898                 break;
1899         case 48000:
1900                 ucontrol->value.enumerated.item[0] = 2;
1901                 break;
1902         case 64000:
1903                 ucontrol->value.enumerated.item[0] = 3;
1904                 break;
1905         case 88200:
1906                 ucontrol->value.enumerated.item[0] = 4;
1907                 break;
1908         case 96000:
1909                 ucontrol->value.enumerated.item[0] = 5;
1910                 break;
1911         case 128000:
1912                 ucontrol->value.enumerated.item[0] = 7;
1913                 break;
1914         case 176400:
1915                 ucontrol->value.enumerated.item[0] = 8;
1916                 break;
1917         case 192000:
1918                 ucontrol->value.enumerated.item[0] = 9;
1919                 break;
1920         default:
1921                 ucontrol->value.enumerated.item[0] = 6;
1922         }
1923         return 0;
1924 }
1925
1926 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1927 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1928   .name = xname, \
1929   .index = xindex, \
1930   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1931   .info = snd_hdsp_info_system_clock_mode, \
1932   .get = snd_hdsp_get_system_clock_mode \
1933 }
1934
1935 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1936 {
1937         if (hdsp->control_register & HDSP_ClockModeMaster)
1938                 return 0;
1939         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1940                         return 0;
1941         return 1;
1942 }
1943
1944 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1945 {
1946         static char *texts[] = {"Master", "Slave" };
1947
1948         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1949         uinfo->count = 1;
1950         uinfo->value.enumerated.items = 2;
1951         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1952                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1953         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1954         return 0;
1955 }
1956
1957 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1958 {
1959         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1960
1961         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
1962         return 0;
1963 }
1964
1965 #define HDSP_CLOCK_SOURCE(xname, xindex) \
1966 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1967   .name = xname, \
1968   .index = xindex, \
1969   .info = snd_hdsp_info_clock_source, \
1970   .get = snd_hdsp_get_clock_source, \
1971   .put = snd_hdsp_put_clock_source \
1972 }
1973
1974 static int hdsp_clock_source(struct hdsp *hdsp)
1975 {
1976         if (hdsp->control_register & HDSP_ClockModeMaster) {
1977                 switch (hdsp->system_sample_rate) {
1978                 case 32000:
1979                         return 1;
1980                 case 44100:
1981                         return 2;
1982                 case 48000:
1983                         return 3;
1984                 case 64000:
1985                         return 4;
1986                 case 88200:
1987                         return 5;
1988                 case 96000:
1989                         return 6;
1990                 case 128000:
1991                         return 7;
1992                 case 176400:
1993                         return 8;
1994                 case 192000:
1995                         return 9;
1996                 default:
1997                         return 3;
1998                 }
1999         } else {
2000                 return 0;
2001         }
2002 }
2003
2004 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2005 {
2006         int rate;
2007         switch (mode) {
2008         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2009                 if (hdsp_external_sample_rate(hdsp) != 0) {
2010                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2011                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2012                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2013                         return 0;
2014                     }
2015                 }
2016                 return -1;
2017         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2018                 rate = 32000;
2019                 break;
2020         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2021                 rate = 44100;
2022                 break;
2023         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2024                 rate = 48000;
2025                 break;
2026         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2027                 rate = 64000;
2028                 break;
2029         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2030                 rate = 88200;
2031                 break;
2032         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2033                 rate = 96000;
2034                 break;
2035         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2036                 rate = 128000;
2037                 break;
2038         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2039                 rate = 176400;
2040                 break;
2041         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2042                 rate = 192000;
2043                 break;
2044         default:
2045                 rate = 48000;
2046         }
2047         hdsp->control_register |= HDSP_ClockModeMaster;
2048         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2049         hdsp_set_rate(hdsp, rate, 1);
2050         return 0;
2051 }
2052
2053 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2054 {
2055         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2056         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2057
2058         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2059         uinfo->count = 1;
2060         if (hdsp->io_type == H9632)
2061             uinfo->value.enumerated.items = 10;
2062         else
2063             uinfo->value.enumerated.items = 7;
2064         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2065                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2066         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2067         return 0;
2068 }
2069
2070 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2071 {
2072         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2073
2074         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2075         return 0;
2076 }
2077
2078 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2079 {
2080         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2081         int change;
2082         int val;
2083
2084         if (!snd_hdsp_use_is_exclusive(hdsp))
2085                 return -EBUSY;
2086         val = ucontrol->value.enumerated.item[0];
2087         if (val < 0) val = 0;
2088         if (hdsp->io_type == H9632) {
2089                 if (val > 9)
2090                         val = 9;
2091         } else {
2092                 if (val > 6)
2093                         val = 6;
2094         }
2095         spin_lock_irq(&hdsp->lock);
2096         if (val != hdsp_clock_source(hdsp))
2097                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2098         else
2099                 change = 0;
2100         spin_unlock_irq(&hdsp->lock);
2101         return change;
2102 }
2103
2104 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2105
2106 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2107 {
2108         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2109
2110         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2111         return 0;
2112 }
2113
2114 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2115 {
2116         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2117         int change;
2118
2119         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2120         if (change)
2121                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2122         return change;
2123 }
2124
2125 #define HDSP_DA_GAIN(xname, xindex) \
2126 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2127   .name = xname, \
2128   .index = xindex, \
2129   .info = snd_hdsp_info_da_gain, \
2130   .get = snd_hdsp_get_da_gain, \
2131   .put = snd_hdsp_put_da_gain \
2132 }
2133
2134 static int hdsp_da_gain(struct hdsp *hdsp)
2135 {
2136         switch (hdsp->control_register & HDSP_DAGainMask) {
2137         case HDSP_DAGainHighGain:
2138                 return 0;
2139         case HDSP_DAGainPlus4dBu:
2140                 return 1;
2141         case HDSP_DAGainMinus10dBV:
2142                 return 2;
2143         default:
2144                 return 1;
2145         }
2146 }
2147
2148 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2149 {
2150         hdsp->control_register &= ~HDSP_DAGainMask;
2151         switch (mode) {
2152         case 0:
2153                 hdsp->control_register |= HDSP_DAGainHighGain;
2154                 break;
2155         case 1:
2156                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2157                 break;
2158         case 2:
2159                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2160                 break;
2161         default:
2162                 return -1;
2163
2164         }
2165         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2166         return 0;
2167 }
2168
2169 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2170 {
2171         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2172
2173         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2174         uinfo->count = 1;
2175         uinfo->value.enumerated.items = 3;
2176         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2177                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2178         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2179         return 0;
2180 }
2181
2182 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2183 {
2184         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2185
2186         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2187         return 0;
2188 }
2189
2190 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2191 {
2192         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2193         int change;
2194         int val;
2195
2196         if (!snd_hdsp_use_is_exclusive(hdsp))
2197                 return -EBUSY;
2198         val = ucontrol->value.enumerated.item[0];
2199         if (val < 0) val = 0;
2200         if (val > 2) val = 2;
2201         spin_lock_irq(&hdsp->lock);
2202         if (val != hdsp_da_gain(hdsp))
2203                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2204         else
2205                 change = 0;
2206         spin_unlock_irq(&hdsp->lock);
2207         return change;
2208 }
2209
2210 #define HDSP_AD_GAIN(xname, xindex) \
2211 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2212   .name = xname, \
2213   .index = xindex, \
2214   .info = snd_hdsp_info_ad_gain, \
2215   .get = snd_hdsp_get_ad_gain, \
2216   .put = snd_hdsp_put_ad_gain \
2217 }
2218
2219 static int hdsp_ad_gain(struct hdsp *hdsp)
2220 {
2221         switch (hdsp->control_register & HDSP_ADGainMask) {
2222         case HDSP_ADGainMinus10dBV:
2223                 return 0;
2224         case HDSP_ADGainPlus4dBu:
2225                 return 1;
2226         case HDSP_ADGainLowGain:
2227                 return 2;
2228         default:
2229                 return 1;
2230         }
2231 }
2232
2233 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2234 {
2235         hdsp->control_register &= ~HDSP_ADGainMask;
2236         switch (mode) {
2237         case 0:
2238                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2239                 break;
2240         case 1:
2241                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2242                 break;
2243         case 2:
2244                 hdsp->control_register |= HDSP_ADGainLowGain;
2245                 break;
2246         default:
2247                 return -1;
2248
2249         }
2250         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2251         return 0;
2252 }
2253
2254 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2255 {
2256         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2257
2258         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2259         uinfo->count = 1;
2260         uinfo->value.enumerated.items = 3;
2261         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2262                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2263         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2264         return 0;
2265 }
2266
2267 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2268 {
2269         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2270
2271         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2272         return 0;
2273 }
2274
2275 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2276 {
2277         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2278         int change;
2279         int val;
2280
2281         if (!snd_hdsp_use_is_exclusive(hdsp))
2282                 return -EBUSY;
2283         val = ucontrol->value.enumerated.item[0];
2284         if (val < 0) val = 0;
2285         if (val > 2) val = 2;
2286         spin_lock_irq(&hdsp->lock);
2287         if (val != hdsp_ad_gain(hdsp))
2288                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2289         else
2290                 change = 0;
2291         spin_unlock_irq(&hdsp->lock);
2292         return change;
2293 }
2294
2295 #define HDSP_PHONE_GAIN(xname, xindex) \
2296 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2297   .name = xname, \
2298   .index = xindex, \
2299   .info = snd_hdsp_info_phone_gain, \
2300   .get = snd_hdsp_get_phone_gain, \
2301   .put = snd_hdsp_put_phone_gain \
2302 }
2303
2304 static int hdsp_phone_gain(struct hdsp *hdsp)
2305 {
2306         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2307         case HDSP_PhoneGain0dB:
2308                 return 0;
2309         case HDSP_PhoneGainMinus6dB:
2310                 return 1;
2311         case HDSP_PhoneGainMinus12dB:
2312                 return 2;
2313         default:
2314                 return 0;
2315         }
2316 }
2317
2318 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2319 {
2320         hdsp->control_register &= ~HDSP_PhoneGainMask;
2321         switch (mode) {
2322         case 0:
2323                 hdsp->control_register |= HDSP_PhoneGain0dB;
2324                 break;
2325         case 1:
2326                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2327                 break;
2328         case 2:
2329                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2330                 break;
2331         default:
2332                 return -1;
2333
2334         }
2335         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2336         return 0;
2337 }
2338
2339 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2340 {
2341         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2342
2343         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2344         uinfo->count = 1;
2345         uinfo->value.enumerated.items = 3;
2346         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2347                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2348         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2349         return 0;
2350 }
2351
2352 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2353 {
2354         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2355
2356         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2357         return 0;
2358 }
2359
2360 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2361 {
2362         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2363         int change;
2364         int val;
2365
2366         if (!snd_hdsp_use_is_exclusive(hdsp))
2367                 return -EBUSY;
2368         val = ucontrol->value.enumerated.item[0];
2369         if (val < 0) val = 0;
2370         if (val > 2) val = 2;
2371         spin_lock_irq(&hdsp->lock);
2372         if (val != hdsp_phone_gain(hdsp))
2373                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2374         else
2375                 change = 0;
2376         spin_unlock_irq(&hdsp->lock);
2377         return change;
2378 }
2379
2380 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2381 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2382   .name = xname, \
2383   .index = xindex, \
2384   .info = snd_hdsp_info_xlr_breakout_cable, \
2385   .get = snd_hdsp_get_xlr_breakout_cable, \
2386   .put = snd_hdsp_put_xlr_breakout_cable \
2387 }
2388
2389 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2390 {
2391         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2392                 return 1;
2393         return 0;
2394 }
2395
2396 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2397 {
2398         if (mode)
2399                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2400         else
2401                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2402         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2403         return 0;
2404 }
2405
2406 #define snd_hdsp_info_xlr_breakout_cable        snd_ctl_boolean_mono_info
2407
2408 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2409 {
2410         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2411
2412         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2413         return 0;
2414 }
2415
2416 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2417 {
2418         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2419         int change;
2420         int val;
2421
2422         if (!snd_hdsp_use_is_exclusive(hdsp))
2423                 return -EBUSY;
2424         val = ucontrol->value.integer.value[0] & 1;
2425         spin_lock_irq(&hdsp->lock);
2426         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2427         hdsp_set_xlr_breakout_cable(hdsp, val);
2428         spin_unlock_irq(&hdsp->lock);
2429         return change;
2430 }
2431
2432 /* (De)activates old RME Analog Extension Board
2433    These are connected to the internal ADAT connector
2434    Switching this on desactivates external ADAT
2435 */
2436 #define HDSP_AEB(xname, xindex) \
2437 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2438   .name = xname, \
2439   .index = xindex, \
2440   .info = snd_hdsp_info_aeb, \
2441   .get = snd_hdsp_get_aeb, \
2442   .put = snd_hdsp_put_aeb \
2443 }
2444
2445 static int hdsp_aeb(struct hdsp *hdsp)
2446 {
2447         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2448                 return 1;
2449         return 0;
2450 }
2451
2452 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2453 {
2454         if (mode)
2455                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2456         else
2457                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2458         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2459         return 0;
2460 }
2461
2462 #define snd_hdsp_info_aeb               snd_ctl_boolean_mono_info
2463
2464 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2465 {
2466         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2467
2468         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2469         return 0;
2470 }
2471
2472 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2473 {
2474         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2475         int change;
2476         int val;
2477
2478         if (!snd_hdsp_use_is_exclusive(hdsp))
2479                 return -EBUSY;
2480         val = ucontrol->value.integer.value[0] & 1;
2481         spin_lock_irq(&hdsp->lock);
2482         change = (int)val != hdsp_aeb(hdsp);
2483         hdsp_set_aeb(hdsp, val);
2484         spin_unlock_irq(&hdsp->lock);
2485         return change;
2486 }
2487
2488 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2489 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2490   .name = xname, \
2491   .index = xindex, \
2492   .info = snd_hdsp_info_pref_sync_ref, \
2493   .get = snd_hdsp_get_pref_sync_ref, \
2494   .put = snd_hdsp_put_pref_sync_ref \
2495 }
2496
2497 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2498 {
2499         /* Notice that this looks at the requested sync source,
2500            not the one actually in use.
2501         */
2502
2503         switch (hdsp->control_register & HDSP_SyncRefMask) {
2504         case HDSP_SyncRef_ADAT1:
2505                 return HDSP_SYNC_FROM_ADAT1;
2506         case HDSP_SyncRef_ADAT2:
2507                 return HDSP_SYNC_FROM_ADAT2;
2508         case HDSP_SyncRef_ADAT3:
2509                 return HDSP_SYNC_FROM_ADAT3;
2510         case HDSP_SyncRef_SPDIF:
2511                 return HDSP_SYNC_FROM_SPDIF;
2512         case HDSP_SyncRef_WORD:
2513                 return HDSP_SYNC_FROM_WORD;
2514         case HDSP_SyncRef_ADAT_SYNC:
2515                 return HDSP_SYNC_FROM_ADAT_SYNC;
2516         default:
2517                 return HDSP_SYNC_FROM_WORD;
2518         }
2519         return 0;
2520 }
2521
2522 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2523 {
2524         hdsp->control_register &= ~HDSP_SyncRefMask;
2525         switch (pref) {
2526         case HDSP_SYNC_FROM_ADAT1:
2527                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2528                 break;
2529         case HDSP_SYNC_FROM_ADAT2:
2530                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2531                 break;
2532         case HDSP_SYNC_FROM_ADAT3:
2533                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2534                 break;
2535         case HDSP_SYNC_FROM_SPDIF:
2536                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2537                 break;
2538         case HDSP_SYNC_FROM_WORD:
2539                 hdsp->control_register |= HDSP_SyncRef_WORD;
2540                 break;
2541         case HDSP_SYNC_FROM_ADAT_SYNC:
2542                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2543                 break;
2544         default:
2545                 return -1;
2546         }
2547         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2548         return 0;
2549 }
2550
2551 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2552 {
2553         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2554         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2555
2556         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2557         uinfo->count = 1;
2558
2559         switch (hdsp->io_type) {
2560         case Digiface:
2561         case H9652:
2562                 uinfo->value.enumerated.items = 6;
2563                 break;
2564         case Multiface:
2565                 uinfo->value.enumerated.items = 4;
2566                 break;
2567         case H9632:
2568                 uinfo->value.enumerated.items = 3;
2569                 break;
2570         default:
2571                 uinfo->value.enumerated.items = 0;
2572                 break;
2573         }
2574
2575         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2576                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2577         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2578         return 0;
2579 }
2580
2581 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2582 {
2583         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2584
2585         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2586         return 0;
2587 }
2588
2589 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2590 {
2591         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2592         int change, max;
2593         unsigned int val;
2594
2595         if (!snd_hdsp_use_is_exclusive(hdsp))
2596                 return -EBUSY;
2597
2598         switch (hdsp->io_type) {
2599         case Digiface:
2600         case H9652:
2601                 max = 6;
2602                 break;
2603         case Multiface:
2604                 max = 4;
2605                 break;
2606         case H9632:
2607                 max = 3;
2608                 break;
2609         default:
2610                 return -EIO;
2611         }
2612
2613         val = ucontrol->value.enumerated.item[0] % max;
2614         spin_lock_irq(&hdsp->lock);
2615         change = (int)val != hdsp_pref_sync_ref(hdsp);
2616         hdsp_set_pref_sync_ref(hdsp, val);
2617         spin_unlock_irq(&hdsp->lock);
2618         return change;
2619 }
2620
2621 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2622 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2623   .name = xname, \
2624   .index = xindex, \
2625   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2626   .info = snd_hdsp_info_autosync_ref, \
2627   .get = snd_hdsp_get_autosync_ref, \
2628 }
2629
2630 static int hdsp_autosync_ref(struct hdsp *hdsp)
2631 {
2632         /* This looks at the autosync selected sync reference */
2633         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2634
2635         switch (status2 & HDSP_SelSyncRefMask) {
2636         case HDSP_SelSyncRef_WORD:
2637                 return HDSP_AUTOSYNC_FROM_WORD;
2638         case HDSP_SelSyncRef_ADAT_SYNC:
2639                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2640         case HDSP_SelSyncRef_SPDIF:
2641                 return HDSP_AUTOSYNC_FROM_SPDIF;
2642         case HDSP_SelSyncRefMask:
2643                 return HDSP_AUTOSYNC_FROM_NONE;
2644         case HDSP_SelSyncRef_ADAT1:
2645                 return HDSP_AUTOSYNC_FROM_ADAT1;
2646         case HDSP_SelSyncRef_ADAT2:
2647                 return HDSP_AUTOSYNC_FROM_ADAT2;
2648         case HDSP_SelSyncRef_ADAT3:
2649                 return HDSP_AUTOSYNC_FROM_ADAT3;
2650         default:
2651                 return HDSP_AUTOSYNC_FROM_WORD;
2652         }
2653         return 0;
2654 }
2655
2656 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2657 {
2658         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2659
2660         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2661         uinfo->count = 1;
2662         uinfo->value.enumerated.items = 7;
2663         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2664                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2665         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2666         return 0;
2667 }
2668
2669 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2670 {
2671         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2672
2673         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2674         return 0;
2675 }
2676
2677 #define HDSP_LINE_OUT(xname, xindex) \
2678 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2679   .name = xname, \
2680   .index = xindex, \
2681   .info = snd_hdsp_info_line_out, \
2682   .get = snd_hdsp_get_line_out, \
2683   .put = snd_hdsp_put_line_out \
2684 }
2685
2686 static int hdsp_line_out(struct hdsp *hdsp)
2687 {
2688         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2689 }
2690
2691 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2692 {
2693         if (out)
2694                 hdsp->control_register |= HDSP_LineOut;
2695         else
2696                 hdsp->control_register &= ~HDSP_LineOut;
2697         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2698         return 0;
2699 }
2700
2701 #define snd_hdsp_info_line_out          snd_ctl_boolean_mono_info
2702
2703 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2704 {
2705         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2706
2707         spin_lock_irq(&hdsp->lock);
2708         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2709         spin_unlock_irq(&hdsp->lock);
2710         return 0;
2711 }
2712
2713 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2714 {
2715         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2716         int change;
2717         unsigned int val;
2718
2719         if (!snd_hdsp_use_is_exclusive(hdsp))
2720                 return -EBUSY;
2721         val = ucontrol->value.integer.value[0] & 1;
2722         spin_lock_irq(&hdsp->lock);
2723         change = (int)val != hdsp_line_out(hdsp);
2724         hdsp_set_line_output(hdsp, val);
2725         spin_unlock_irq(&hdsp->lock);
2726         return change;
2727 }
2728
2729 #define HDSP_PRECISE_POINTER(xname, xindex) \
2730 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2731   .name = xname, \
2732   .index = xindex, \
2733   .info = snd_hdsp_info_precise_pointer, \
2734   .get = snd_hdsp_get_precise_pointer, \
2735   .put = snd_hdsp_put_precise_pointer \
2736 }
2737
2738 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2739 {
2740         if (precise)
2741                 hdsp->precise_ptr = 1;
2742         else
2743                 hdsp->precise_ptr = 0;
2744         return 0;
2745 }
2746
2747 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2748
2749 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2750 {
2751         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2752
2753         spin_lock_irq(&hdsp->lock);
2754         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2755         spin_unlock_irq(&hdsp->lock);
2756         return 0;
2757 }
2758
2759 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2760 {
2761         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2762         int change;
2763         unsigned int val;
2764
2765         if (!snd_hdsp_use_is_exclusive(hdsp))
2766                 return -EBUSY;
2767         val = ucontrol->value.integer.value[0] & 1;
2768         spin_lock_irq(&hdsp->lock);
2769         change = (int)val != hdsp->precise_ptr;
2770         hdsp_set_precise_pointer(hdsp, val);
2771         spin_unlock_irq(&hdsp->lock);
2772         return change;
2773 }
2774
2775 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2776 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2777   .name = xname, \
2778   .index = xindex, \
2779   .info = snd_hdsp_info_use_midi_tasklet, \
2780   .get = snd_hdsp_get_use_midi_tasklet, \
2781   .put = snd_hdsp_put_use_midi_tasklet \
2782 }
2783
2784 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2785 {
2786         if (use_tasklet)
2787                 hdsp->use_midi_tasklet = 1;
2788         else
2789                 hdsp->use_midi_tasklet = 0;
2790         return 0;
2791 }
2792
2793 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2794
2795 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2796 {
2797         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2798
2799         spin_lock_irq(&hdsp->lock);
2800         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2801         spin_unlock_irq(&hdsp->lock);
2802         return 0;
2803 }
2804
2805 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2806 {
2807         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2808         int change;
2809         unsigned int val;
2810
2811         if (!snd_hdsp_use_is_exclusive(hdsp))
2812                 return -EBUSY;
2813         val = ucontrol->value.integer.value[0] & 1;
2814         spin_lock_irq(&hdsp->lock);
2815         change = (int)val != hdsp->use_midi_tasklet;
2816         hdsp_set_use_midi_tasklet(hdsp, val);
2817         spin_unlock_irq(&hdsp->lock);
2818         return change;
2819 }
2820
2821 #define HDSP_MIXER(xname, xindex) \
2822 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2823   .name = xname, \
2824   .index = xindex, \
2825   .device = 0, \
2826   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2827                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2828   .info = snd_hdsp_info_mixer, \
2829   .get = snd_hdsp_get_mixer, \
2830   .put = snd_hdsp_put_mixer \
2831 }
2832
2833 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2834 {
2835         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2836         uinfo->count = 3;
2837         uinfo->value.integer.min = 0;
2838         uinfo->value.integer.max = 65536;
2839         uinfo->value.integer.step = 1;
2840         return 0;
2841 }
2842
2843 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2844 {
2845         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2846         int source;
2847         int destination;
2848         int addr;
2849
2850         source = ucontrol->value.integer.value[0];
2851         destination = ucontrol->value.integer.value[1];
2852
2853         if (source >= hdsp->max_channels)
2854                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2855         else
2856                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2857
2858         spin_lock_irq(&hdsp->lock);
2859         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2860         spin_unlock_irq(&hdsp->lock);
2861         return 0;
2862 }
2863
2864 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2865 {
2866         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2867         int change;
2868         int source;
2869         int destination;
2870         int gain;
2871         int addr;
2872
2873         if (!snd_hdsp_use_is_exclusive(hdsp))
2874                 return -EBUSY;
2875
2876         source = ucontrol->value.integer.value[0];
2877         destination = ucontrol->value.integer.value[1];
2878
2879         if (source >= hdsp->max_channels)
2880                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2881         else
2882                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2883
2884         gain = ucontrol->value.integer.value[2];
2885
2886         spin_lock_irq(&hdsp->lock);
2887         change = gain != hdsp_read_gain(hdsp, addr);
2888         if (change)
2889                 hdsp_write_gain(hdsp, addr, gain);
2890         spin_unlock_irq(&hdsp->lock);
2891         return change;
2892 }
2893
2894 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2895 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2896   .name = xname, \
2897   .index = xindex, \
2898   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2899   .info = snd_hdsp_info_sync_check, \
2900   .get = snd_hdsp_get_wc_sync_check \
2901 }
2902
2903 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2904 {
2905         static char *texts[] = {"No Lock", "Lock", "Sync" };
2906         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2907         uinfo->count = 1;
2908         uinfo->value.enumerated.items = 3;
2909         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2910                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2911         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2912         return 0;
2913 }
2914
2915 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2916 {
2917         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2918         if (status2 & HDSP_wc_lock) {
2919                 if (status2 & HDSP_wc_sync)
2920                         return 2;
2921                 else
2922                          return 1;
2923         } else
2924                 return 0;
2925         return 0;
2926 }
2927
2928 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2929 {
2930         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2931
2932         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2933         return 0;
2934 }
2935
2936 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2937 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2938   .name = xname, \
2939   .index = xindex, \
2940   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2941   .info = snd_hdsp_info_sync_check, \
2942   .get = snd_hdsp_get_spdif_sync_check \
2943 }
2944
2945 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2946 {
2947         int status = hdsp_read(hdsp, HDSP_statusRegister);
2948         if (status & HDSP_SPDIFErrorFlag)
2949                 return 0;
2950         else {
2951                 if (status & HDSP_SPDIFSync)
2952                         return 2;
2953                 else
2954                         return 1;
2955         }
2956         return 0;
2957 }
2958
2959 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2960 {
2961         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2962
2963         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
2964         return 0;
2965 }
2966
2967 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
2968 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2969   .name = xname, \
2970   .index = xindex, \
2971   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2972   .info = snd_hdsp_info_sync_check, \
2973   .get = snd_hdsp_get_adatsync_sync_check \
2974 }
2975
2976 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
2977 {
2978         int status = hdsp_read(hdsp, HDSP_statusRegister);
2979         if (status & HDSP_TimecodeLock) {
2980                 if (status & HDSP_TimecodeSync)
2981                         return 2;
2982                 else
2983                         return 1;
2984         } else
2985                 return 0;
2986 }
2987
2988 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2989 {
2990         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2991
2992         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
2993         return 0;
2994 }
2995
2996 #define HDSP_ADAT_SYNC_CHECK \
2997 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2998   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2999   .info = snd_hdsp_info_sync_check, \
3000   .get = snd_hdsp_get_adat_sync_check \
3001 }
3002
3003 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3004 {
3005         int status = hdsp_read(hdsp, HDSP_statusRegister);
3006
3007         if (status & (HDSP_Lock0>>idx)) {
3008                 if (status & (HDSP_Sync0>>idx))
3009                         return 2;
3010                 else
3011                         return 1;
3012         } else
3013                 return 0;
3014 }
3015
3016 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3017 {
3018         int offset;
3019         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3020
3021         offset = ucontrol->id.index - 1;
3022         snd_assert(offset >= 0);
3023
3024         switch (hdsp->io_type) {
3025         case Digiface:
3026         case H9652:
3027                 if (offset >= 3)
3028                         return -EINVAL;
3029                 break;
3030         case Multiface:
3031         case H9632:
3032                 if (offset >= 1)
3033                         return -EINVAL;
3034                 break;
3035         default:
3036                 return -EIO;
3037         }
3038
3039         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3040         return 0;
3041 }
3042
3043 #define HDSP_DDS_OFFSET(xname, xindex) \
3044 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3045   .name = xname, \
3046   .index = xindex, \
3047   .info = snd_hdsp_info_dds_offset, \
3048   .get = snd_hdsp_get_dds_offset, \
3049   .put = snd_hdsp_put_dds_offset \
3050 }
3051
3052 static int hdsp_dds_offset(struct hdsp *hdsp)
3053 {
3054         u64 n;
3055         u32 r;
3056         unsigned int dds_value = hdsp->dds_value;
3057         int system_sample_rate = hdsp->system_sample_rate;
3058
3059         if (!dds_value)
3060                 return 0;
3061
3062         n = DDS_NUMERATOR;
3063         /*
3064          * dds_value = n / rate
3065          * rate = n / dds_value
3066          */
3067         div64_32(&n, dds_value, &r);
3068         if (system_sample_rate >= 112000)
3069                 n *= 4;
3070         else if (system_sample_rate >= 56000)
3071                 n *= 2;
3072         return ((int)n) - system_sample_rate;
3073 }
3074
3075 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3076 {
3077         int rate = hdsp->system_sample_rate + offset_hz;
3078         hdsp_set_dds_value(hdsp, rate);
3079         return 0;
3080 }
3081
3082 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3083 {
3084         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3085         uinfo->count = 1;
3086         uinfo->value.integer.min = -5000;
3087         uinfo->value.integer.max = 5000;
3088         return 0;
3089 }
3090
3091 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3092 {
3093         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3094
3095         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3096         return 0;
3097 }
3098
3099 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3100 {
3101         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3102         int change;
3103         int val;
3104
3105         if (!snd_hdsp_use_is_exclusive(hdsp))
3106                 return -EBUSY;
3107         val = ucontrol->value.enumerated.item[0];
3108         spin_lock_irq(&hdsp->lock);
3109         if (val != hdsp_dds_offset(hdsp))
3110                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3111         else
3112                 change = 0;
3113         spin_unlock_irq(&hdsp->lock);
3114         return change;
3115 }
3116
3117 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3118 HDSP_DA_GAIN("DA Gain", 0),
3119 HDSP_AD_GAIN("AD Gain", 0),
3120 HDSP_PHONE_GAIN("Phones Gain", 0),
3121 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3122 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3123 };
3124
3125 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3126 {
3127         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3128         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3129         .info =         snd_hdsp_control_spdif_info,
3130         .get =          snd_hdsp_control_spdif_get,
3131         .put =          snd_hdsp_control_spdif_put,
3132 },
3133 {
3134         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3135         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3136         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3137         .info =         snd_hdsp_control_spdif_stream_info,
3138         .get =          snd_hdsp_control_spdif_stream_get,
3139         .put =          snd_hdsp_control_spdif_stream_put,
3140 },
3141 {
3142         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3143         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3144         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3145         .info =         snd_hdsp_control_spdif_mask_info,
3146         .get =          snd_hdsp_control_spdif_mask_get,
3147         .private_value = IEC958_AES0_NONAUDIO |
3148                          IEC958_AES0_PROFESSIONAL |
3149                          IEC958_AES0_CON_EMPHASIS,
3150 },
3151 {
3152         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3153         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3154         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3155         .info =         snd_hdsp_control_spdif_mask_info,
3156         .get =          snd_hdsp_control_spdif_mask_get,
3157         .private_value = IEC958_AES0_NONAUDIO |
3158                          IEC958_AES0_PROFESSIONAL |
3159                          IEC958_AES0_PRO_EMPHASIS,
3160 },
3161 HDSP_MIXER("Mixer", 0),
3162 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3163 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3164 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3165 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3166 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3167 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3168 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3169 {
3170         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3171         .name = "Sample Clock Source Locking",
3172         .info = snd_hdsp_info_clock_source_lock,
3173         .get = snd_hdsp_get_clock_source_lock,
3174         .put = snd_hdsp_put_clock_source_lock,
3175 },
3176 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3177 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3178 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3179 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3180 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3181 /* 'External Rate' complies with the alsa control naming scheme */
3182 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3183 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3184 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3185 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3186 HDSP_LINE_OUT("Line Out", 0),
3187 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3188 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3189 };
3190
3191 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3192 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3193
3194 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3195 {
3196         unsigned int idx;
3197         int err;
3198         struct snd_kcontrol *kctl;
3199
3200         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3201                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3202                         return err;
3203                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3204                         hdsp->spdif_ctl = kctl;
3205         }
3206
3207         /* ADAT SyncCheck status */
3208         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3209         snd_hdsp_adat_sync_check.index = 1;
3210         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3211                 return err;
3212         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3213                 for (idx = 1; idx < 3; ++idx) {
3214                         snd_hdsp_adat_sync_check.index = idx+1;
3215                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3216                                 return err;
3217                 }
3218         }
3219
3220         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3221         if (hdsp->io_type == H9632) {
3222                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3223                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3224                                 return err;
3225                 }
3226         }
3227
3228         /* AEB control for H96xx card */
3229         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3230                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3231                                 return err;
3232         }
3233
3234         return 0;
3235 }
3236
3237 /*------------------------------------------------------------
3238    /proc interface
3239  ------------------------------------------------------------*/
3240
3241 static void
3242 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3243 {
3244         struct hdsp *hdsp = (struct hdsp *) entry->private_data;
3245         unsigned int status;
3246         unsigned int status2;
3247         char *pref_sync_ref;
3248         char *autosync_ref;
3249         char *system_clock_mode;
3250         char *clock_source;
3251         int x;
3252
3253         if (hdsp_check_for_iobox (hdsp)) {
3254                 snd_iprintf(buffer, "No I/O box connected.\nPlease connect one and upload firmware.\n");
3255                 return;
3256         }
3257
3258         if (hdsp_check_for_firmware(hdsp, 0)) {
3259                 if (hdsp->state & HDSP_FirmwareCached) {
3260                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3261                                 snd_iprintf(buffer, "Firmware loading from cache failed, please upload manually.\n");
3262                                 return;
3263                         }
3264                 } else {
3265                         int err = -EINVAL;
3266 #ifdef HDSP_FW_LOADER
3267                         err = hdsp_request_fw_loader(hdsp);
3268 #endif
3269                         if (err < 0) {
3270                                 snd_iprintf(buffer,
3271                                             "No firmware loaded nor cached, "
3272                                             "please upload firmware.\n");
3273                                 return;
3274                         }
3275                 }
3276         }
3277
3278         status = hdsp_read(hdsp, HDSP_statusRegister);
3279         status2 = hdsp_read(hdsp, HDSP_status2Register);
3280
3281         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name, hdsp->card->number + 1);
3282         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3283                     hdsp->capture_buffer, hdsp->playback_buffer);
3284         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3285                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3286         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3287         snd_iprintf(buffer, "Control2 register: 0x%x\n", hdsp->control2_register);
3288         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3289         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3290         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3291         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3292         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3293         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3294         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3295         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3296
3297         snd_iprintf(buffer, "\n");
3298
3299         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3300
3301         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3302         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3303         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3304         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3305
3306         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3307
3308         snd_iprintf(buffer, "\n");
3309
3310
3311         switch (hdsp_clock_source(hdsp)) {
3312         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3313                 clock_source = "AutoSync";
3314                 break;
3315         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3316                 clock_source = "Internal 32 kHz";
3317                 break;
3318         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3319                 clock_source = "Internal 44.1 kHz";
3320                 break;
3321         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3322                 clock_source = "Internal 48 kHz";
3323                 break;
3324         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3325                 clock_source = "Internal 64 kHz";
3326                 break;
3327         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3328                 clock_source = "Internal 88.2 kHz";
3329                 break;
3330         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3331                 clock_source = "Internal 96 kHz";
3332                 break;
3333         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3334                 clock_source = "Internal 128 kHz";
3335                 break;
3336         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3337                 clock_source = "Internal 176.4 kHz";
3338                 break;
3339                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3340                 clock_source = "Internal 192 kHz";
3341                 break;
3342         default:
3343                 clock_source = "Error";
3344         }
3345         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3346
3347         if (hdsp_system_clock_mode(hdsp))
3348                 system_clock_mode = "Slave";
3349         else
3350                 system_clock_mode = "Master";
3351
3352         switch (hdsp_pref_sync_ref (hdsp)) {
3353         case HDSP_SYNC_FROM_WORD:
3354                 pref_sync_ref = "Word Clock";
3355                 break;
3356         case HDSP_SYNC_FROM_ADAT_SYNC:
3357                 pref_sync_ref = "ADAT Sync";
3358                 break;
3359         case HDSP_SYNC_FROM_SPDIF:
3360                 pref_sync_ref = "SPDIF";
3361                 break;
3362         case HDSP_SYNC_FROM_ADAT1:
3363                 pref_sync_ref = "ADAT1";
3364                 break;
3365         case HDSP_SYNC_FROM_ADAT2:
3366                 pref_sync_ref = "ADAT2";
3367                 break;
3368         case HDSP_SYNC_FROM_ADAT3:
3369                 pref_sync_ref = "ADAT3";
3370                 break;
3371         default:
3372                 pref_sync_ref = "Word Clock";
3373                 break;
3374         }
3375         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3376
3377         switch (hdsp_autosync_ref (hdsp)) {
3378         case HDSP_AUTOSYNC_FROM_WORD:
3379                 autosync_ref = "Word Clock";
3380                 break;
3381         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3382                 autosync_ref = "ADAT Sync";
3383                 break;
3384         case HDSP_AUTOSYNC_FROM_SPDIF:
3385                 autosync_ref = "SPDIF";
3386                 break;
3387         case HDSP_AUTOSYNC_FROM_NONE:
3388                 autosync_ref = "None";
3389                 break;
3390         case HDSP_AUTOSYNC_FROM_ADAT1:
3391                 autosync_ref = "ADAT1";
3392                 break;
3393         case HDSP_AUTOSYNC_FROM_ADAT2:
3394                 autosync_ref = "ADAT2";
3395                 break;
3396         case HDSP_AUTOSYNC_FROM_ADAT3:
3397                 autosync_ref = "ADAT3";
3398                 break;
3399         default:
3400                 autosync_ref = "---";
3401                 break;
3402         }
3403         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3404
3405         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3406
3407         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3408
3409         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3410         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3411
3412         snd_iprintf(buffer, "\n");
3413
3414         switch (hdsp_spdif_in(hdsp)) {
3415         case HDSP_SPDIFIN_OPTICAL:
3416                 snd_iprintf(buffer, "IEC958 input: Optical\n");
3417                 break;
3418         case HDSP_SPDIFIN_COAXIAL:
3419                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3420                 break;
3421         case HDSP_SPDIFIN_INTERNAL:
3422                 snd_iprintf(buffer, "IEC958 input: Internal\n");
3423                 break;
3424         case HDSP_SPDIFIN_AES:
3425                 snd_iprintf(buffer, "IEC958 input: AES\n");
3426                 break;
3427         default:
3428                 snd_iprintf(buffer, "IEC958 input: ???\n");
3429                 break;
3430         }
3431
3432         if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3433                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3434         else
3435                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3436
3437         if (hdsp->control_register & HDSP_SPDIFProfessional)
3438                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3439         else
3440                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3441
3442         if (hdsp->control_register & HDSP_SPDIFEmphasis)
3443                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3444         else
3445                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3446
3447         if (hdsp->control_register & HDSP_SPDIFNonAudio)
3448                 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3449         else
3450                 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3451         if ((x = hdsp_spdif_sample_rate (hdsp)) != 0)
3452                 snd_iprintf (buffer, "IEC958 sample rate: %d\n", x);
3453         else
3454                 snd_iprintf (buffer, "IEC958 sample rate: Error flag set\n");
3455
3456         snd_iprintf(buffer, "\n");
3457
3458         /* Sync Check */
3459         x = status & HDSP_Sync0;
3460         if (status & HDSP_Lock0)
3461                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3462         else
3463                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3464
3465         switch (hdsp->io_type) {
3466         case Digiface:
3467         case H9652:
3468                 x = status & HDSP_Sync1;
3469                 if (status & HDSP_Lock1)
3470                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3471                 else
3472                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3473                 x = status & HDSP_Sync2;
3474                 if (status & HDSP_Lock2)
3475                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3476                 else
3477                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3478                 break;
3479         default:
3480                 /* relax */
3481                 break;
3482         }
3483
3484         x = status & HDSP_SPDIFSync;
3485         if (status & HDSP_SPDIFErrorFlag)
3486                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3487         else
3488                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3489
3490         x = status2 & HDSP_wc_sync;
3491         if (status2 & HDSP_wc_lock)
3492                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3493         else
3494                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3495
3496         x = status & HDSP_TimecodeSync;
3497         if (status & HDSP_TimecodeLock)
3498                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3499         else
3500                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3501
3502         snd_iprintf(buffer, "\n");
3503
3504         /* Informations about H9632 specific controls */
3505         if (hdsp->io_type == H9632) {
3506                 char *tmp;
3507
3508                 switch (hdsp_ad_gain(hdsp)) {
3509                 case 0:
3510                         tmp = "-10 dBV";
3511                         break;
3512                 case 1:
3513                         tmp = "+4 dBu";
3514                         break;
3515                 default:
3516                         tmp = "Lo Gain";
3517                         break;
3518                 }
3519                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3520
3521                 switch (hdsp_da_gain(hdsp)) {
3522                 case 0:
3523                         tmp = "Hi Gain";
3524                         break;
3525                 case 1:
3526                         tmp = "+4 dBu";
3527                         break;
3528                 default:
3529                         tmp = "-10 dBV";
3530                         break;
3531                 }
3532                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3533
3534                 switch (hdsp_phone_gain(hdsp)) {
3535                 case 0:
3536                         tmp = "0 dB";
3537                         break;
3538                 case 1:
3539                         tmp = "-6 dB";
3540                         break;
3541                 default:
3542                         tmp = "-12 dB";
3543                         break;
3544                 }
3545                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3546
3547                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3548
3549                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3550                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3551                 else
3552                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3553                 snd_iprintf(buffer, "\n");
3554         }
3555
3556 }
3557
3558 static void __devinit snd_hdsp_proc_init(struct hdsp *hdsp)
3559 {
3560         struct snd_info_entry *entry;
3561
3562         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3563                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3564 }
3565
3566 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3567 {
3568         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3569         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3570 }
3571
3572 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
3573 {
3574         unsigned long pb_bus, cb_bus;
3575
3576         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3577             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3578                 if (hdsp->capture_dma_buf.area)
3579                         snd_dma_free_pages(&hdsp->capture_dma_buf);
3580                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3581                 return -ENOMEM;
3582         }
3583
3584         /* Align to bus-space 64K boundary */
3585
3586         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3587         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3588
3589         /* Tell the card where it is */
3590
3591         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3592         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3593
3594         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3595         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3596
3597         return 0;
3598 }
3599
3600 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3601 {
3602         unsigned int i;
3603
3604         /* ASSUMPTION: hdsp->lock is either held, or
3605            there is no need to hold it (e.g. during module
3606            initialization).
3607          */
3608
3609         /* set defaults:
3610
3611            SPDIF Input via Coax
3612            Master clock mode
3613            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3614                             which implies 2 4096 sample, 32Kbyte periods).
3615            Enable line out.
3616          */
3617
3618         hdsp->control_register = HDSP_ClockModeMaster |
3619                                  HDSP_SPDIFInputCoaxial |
3620                                  hdsp_encode_latency(7) |
3621                                  HDSP_LineOut;
3622
3623
3624         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3625
3626 #ifdef SNDRV_BIG_ENDIAN
3627         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3628 #else
3629         hdsp->control2_register = 0;
3630 #endif
3631         if (hdsp->io_type == H9652)
3632                 snd_hdsp_9652_enable_mixer (hdsp);
3633         else
3634                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3635
3636         hdsp_reset_hw_pointer(hdsp);
3637         hdsp_compute_period_size(hdsp);
3638
3639         /* silence everything */
3640
3641         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3642                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3643
3644         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3645                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3646                         return -EIO;
3647         }
3648
3649         /* H9632 specific defaults */
3650         if (hdsp->io_type == H9632) {
3651                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3652                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3653         }
3654
3655         /* set a default rate so that the channel map is set up.
3656          */
3657
3658         hdsp_set_rate(hdsp, 48000, 1);
3659
3660         return 0;
3661 }
3662
3663 static void hdsp_midi_tasklet(unsigned long arg)
3664 {
3665         struct hdsp *hdsp = (struct hdsp *)arg;
3666
3667         if (hdsp->midi[0].pending)
3668                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3669         if (hdsp->midi[1].pending)
3670                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3671 }
3672
3673 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3674 {
3675         struct hdsp *hdsp = (struct hdsp *) dev_id;
3676         unsigned int status;
3677         int audio;
3678         int midi0;
3679         int midi1;
3680         unsigned int midi0status;
3681         unsigned int midi1status;
3682         int schedule = 0;
3683
3684         status = hdsp_read(hdsp, HDSP_statusRegister);
3685
3686         audio = status & HDSP_audioIRQPending;
3687         midi0 = status & HDSP_midi0IRQPending;
3688         midi1 = status & HDSP_midi1IRQPending;
3689
3690         if (!audio && !midi0 && !midi1)
3691                 return IRQ_NONE;
3692
3693         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3694
3695         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3696         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3697
3698         if (audio) {
3699                 if (hdsp->capture_substream)
3700                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3701
3702                 if (hdsp->playback_substream)
3703                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3704         }
3705
3706         if (midi0 && midi0status) {
3707                 if (hdsp->use_midi_tasklet) {
3708                         /* we disable interrupts for this input until processing is done */
3709                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3710                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3711                         hdsp->midi[0].pending = 1;
3712                         schedule = 1;
3713                 } else {
3714                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
3715                 }
3716         }
3717         if (hdsp->io_type != Multiface && hdsp->io_type != H9632 && midi1 && midi1status) {
3718                 if (hdsp->use_midi_tasklet) {
3719                         /* we disable interrupts for this input until processing is done */
3720                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3721                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3722                         hdsp->midi[1].pending = 1;
3723                         schedule = 1;
3724                 } else {
3725                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
3726                 }
3727         }
3728         if (hdsp->use_midi_tasklet && schedule)
3729                 tasklet_hi_schedule(&hdsp->midi_tasklet);
3730         return IRQ_HANDLED;
3731 }
3732
3733 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3734 {
3735         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3736         return hdsp_hw_pointer(hdsp);
3737 }
3738
3739 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3740                                              int stream,
3741                                              int channel)
3742
3743 {
3744         int mapped_channel;
3745
3746         snd_assert(channel >= 0 && channel < hdsp->max_channels, return NULL);
3747
3748         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3749                 return NULL;
3750
3751         if (stream == SNDRV_PCM_STREAM_CAPTURE)
3752                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3753         else
3754                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3755 }
3756
3757 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3758                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3759 {
3760         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3761         char *channel_buf;
3762
3763         snd_assert(pos + count <= HDSP_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
3764
3765         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3766         snd_assert(channel_buf != NULL, return -EIO);
3767         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3768                 return -EFAULT;
3769         return count;
3770 }
3771
3772 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3773                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3774 {
3775         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3776         char *channel_buf;
3777
3778         snd_assert(pos + count <= HDSP_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
3779
3780         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3781         snd_assert(channel_buf != NULL, return -EIO);
3782         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
3783                 return -EFAULT;
3784         return count;
3785 }
3786
3787 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
3788                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
3789 {
3790         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3791         char *channel_buf;
3792
3793         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3794         snd_assert(channel_buf != NULL, return -EIO);
3795         memset(channel_buf + pos * 4, 0, count * 4);
3796         return count;
3797 }
3798
3799 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
3800 {
3801         struct snd_pcm_runtime *runtime = substream->runtime;
3802         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3803         struct snd_pcm_substream *other;
3804         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3805                 other = hdsp->capture_substream;
3806         else
3807                 other = hdsp->playback_substream;
3808         if (hdsp->running)
3809                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
3810         else
3811                 runtime->status->hw_ptr = 0;
3812         if (other) {
3813                 struct snd_pcm_substream *s;
3814                 struct snd_pcm_runtime *oruntime = other->runtime;
3815                 snd_pcm_group_for_each_entry(s, substream) {
3816                         if (s == other) {
3817                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
3818                                 break;
3819                         }
3820                 }
3821         }
3822         return 0;
3823 }
3824
3825 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
3826                                  struct snd_pcm_hw_params *params)
3827 {
3828         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3829         int err;
3830         pid_t this_pid;
3831         pid_t other_pid;
3832
3833         if (hdsp_check_for_iobox (hdsp))
3834                 return -EIO;
3835
3836         if (hdsp_check_for_firmware(hdsp, 1))
3837                 return -EIO;
3838
3839         spin_lock_irq(&hdsp->lock);
3840
3841         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3842                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
3843                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
3844                 this_pid = hdsp->playback_pid;
3845                 other_pid = hdsp->capture_pid;
3846         } else {
3847                 this_pid = hdsp->capture_pid;
3848                 other_pid = hdsp->playback_pid;
3849         }
3850
3851         if ((other_pid > 0) && (this_pid != other_pid)) {
3852
3853                 /* The other stream is open, and not by the same
3854                    task as this one. Make sure that the parameters
3855                    that matter are the same.
3856                  */
3857
3858                 if (params_rate(params) != hdsp->system_sample_rate) {
3859                         spin_unlock_irq(&hdsp->lock);
3860                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3861                         return -EBUSY;
3862                 }
3863
3864                 if (params_period_size(params) != hdsp->period_bytes / 4) {
3865                         spin_unlock_irq(&hdsp->lock);
3866                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3867                         return -EBUSY;
3868                 }
3869
3870                 /* We're fine. */
3871
3872                 spin_unlock_irq(&hdsp->lock);
3873                 return 0;
3874
3875         } else {
3876                 spin_unlock_irq(&hdsp->lock);
3877         }
3878
3879         /* how to make sure that the rate matches an externally-set one ?
3880          */
3881
3882         spin_lock_irq(&hdsp->lock);
3883         if (! hdsp->clock_source_locked) {
3884                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
3885                         spin_unlock_irq(&hdsp->lock);
3886                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3887                         return err;
3888                 }
3889         }
3890         spin_unlock_irq(&hdsp->lock);
3891
3892         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
3893                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3894                 return err;
3895         }
3896
3897         return 0;
3898 }
3899
3900 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
3901                                     struct snd_pcm_channel_info *info)
3902 {
3903         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3904         int mapped_channel;
3905
3906         snd_assert(info->channel < hdsp->max_channels, return -EINVAL);
3907
3908         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
3909                 return -EINVAL;
3910
3911         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
3912         info->first = 0;
3913         info->step = 32;
3914         return 0;
3915 }
3916
3917 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
3918                              unsigned int cmd, void *arg)
3919 {
3920         switch (cmd) {
3921         case SNDRV_PCM_IOCTL1_RESET:
3922                 return snd_hdsp_reset(substream);
3923         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3924                 return snd_hdsp_channel_info(substream, arg);
3925         default:
3926                 break;
3927         }
3928
3929         return snd_pcm_lib_ioctl(substream, cmd, arg);
3930 }
3931
3932 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
3933 {
3934         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3935         struct snd_pcm_substream *other;
3936         int running;
3937
3938         if (hdsp_check_for_iobox (hdsp))
3939                 return -EIO;
3940
3941         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
3942                 return -EIO;
3943
3944         spin_lock(&hdsp->lock);
3945         running = hdsp->running;
3946         switch (cmd) {
3947         case SNDRV_PCM_TRIGGER_START:
3948                 running |= 1 << substream->stream;
3949                 break;
3950         case SNDRV_PCM_TRIGGER_STOP:
3951                 running &= ~(1 << substream->stream);
3952                 break;
3953         default:
3954                 snd_BUG();
3955                 spin_unlock(&hdsp->lock);
3956                 return -EINVAL;
3957         }
3958         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3959                 other = hdsp->capture_substream;
3960         else
3961                 other = hdsp->playback_substream;
3962
3963         if (other) {
3964                 struct snd_pcm_substream *s;
3965                 snd_pcm_group_for_each_entry(s, substream) {
3966                         if (s == other) {
3967                                 snd_pcm_trigger_done(s, substream);
3968                                 if (cmd == SNDRV_PCM_TRIGGER_START)
3969                                         running |= 1 << s->stream;
3970                                 else
3971                                         running &= ~(1 << s->stream);
3972                                 goto _ok;
3973                         }
3974                 }
3975                 if (cmd == SNDRV_PCM_TRIGGER_START) {
3976                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
3977                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
3978                                 hdsp_silence_playback(hdsp);
3979                 } else {
3980                         if (running &&
3981                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3982                                 hdsp_silence_playback(hdsp);
3983                 }
3984         } else {
3985                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
3986                                 hdsp_silence_playback(hdsp);
3987         }
3988  _ok:
3989         snd_pcm_trigger_done(substream, substream);
3990         if (!hdsp->running && running)
3991                 hdsp_start_audio(hdsp);
3992         else if (hdsp->running && !running)
3993                 hdsp_stop_audio(hdsp);
3994         hdsp->running = running;
3995         spin_unlock(&hdsp->lock);
3996
3997         return 0;
3998 }
3999
4000 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4001 {
4002         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4003         int result = 0;
4004
4005         if (hdsp_check_for_iobox (hdsp))
4006                 return -EIO;
4007
4008         if (hdsp_check_for_firmware(hdsp, 1))
4009                 return -EIO;
4010
4011         spin_lock_irq(&hdsp->lock);
4012         if (!hdsp->running)
4013                 hdsp_reset_hw_pointer(hdsp);
4014         spin_unlock_irq(&hdsp->lock);
4015         return result;
4016 }
4017
4018 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4019 {
4020         .info =                 (SNDRV_PCM_INFO_MMAP |
4021                                  SNDRV_PCM_INFO_MMAP_VALID |
4022                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4023                                  SNDRV_PCM_INFO_SYNC_START |
4024                                  SNDRV_PCM_INFO_DOUBLE),
4025 #ifdef SNDRV_BIG_ENDIAN
4026         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4027 #else
4028         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4029 #endif
4030         .rates =                (SNDRV_PCM_RATE_32000 |
4031                                  SNDRV_PCM_RATE_44100 |
4032                                  SNDRV_PCM_RATE_48000 |
4033                                  SNDRV_PCM_RATE_64000 |
4034                                  SNDRV_PCM_RATE_88200 |
4035                                  SNDRV_PCM_RATE_96000),
4036         .rate_min =             32000,
4037         .rate_max =             96000,
4038         .channels_min =         14,
4039         .channels_max =         HDSP_MAX_CHANNELS,
4040         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4041         .period_bytes_min =     (64 * 4) * 10,
4042         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4043         .periods_min =          2,
4044         .periods_max =          2,
4045         .fifo_size =            0
4046 };
4047
4048 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4049 {
4050         .info =                 (SNDRV_PCM_INFO_MMAP |
4051                                  SNDRV_PCM_INFO_MMAP_VALID |
4052                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4053                                  SNDRV_PCM_INFO_SYNC_START),
4054 #ifdef SNDRV_BIG_ENDIAN
4055         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4056 #else
4057         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4058 #endif
4059         .rates =                (SNDRV_PCM_RATE_32000 |
4060                                  SNDRV_PCM_RATE_44100 |
4061                                  SNDRV_PCM_RATE_48000 |
4062                                  SNDRV_PCM_RATE_64000 |
4063                                  SNDRV_PCM_RATE_88200 |
4064                                  SNDRV_PCM_RATE_96000),
4065         .rate_min =             32000,
4066         .rate_max =             96000,
4067         .channels_min =         14,
4068         .channels_max =         HDSP_MAX_CHANNELS,
4069         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4070         .period_bytes_min =     (64 * 4) * 10,
4071         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4072         .periods_min =          2,
4073         .periods_max =          2,
4074         .fifo_size =            0
4075 };
4076
4077 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4078
4079 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4080         .count = ARRAY_SIZE(hdsp_period_sizes),
4081         .list = hdsp_period_sizes,
4082         .mask = 0
4083 };
4084
4085 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4086
4087 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4088         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4089         .list = hdsp_9632_sample_rates,
4090         .mask = 0
4091 };
4092
4093 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4094                                         struct snd_pcm_hw_rule *rule)
4095 {
4096         struct hdsp *hdsp = rule->private;
4097         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4098         if (hdsp->io_type == H9632) {
4099                 unsigned int list[3];
4100                 list[0] = hdsp->qs_in_channels;
4101                 list[1] = hdsp->ds_in_channels;
4102                 list[2] = hdsp->ss_in_channels;
4103                 return snd_interval_list(c, 3, list, 0);
4104         } else {
4105                 unsigned int list[2];
4106                 list[0] = hdsp->ds_in_channels;
4107                 list[1] = hdsp->ss_in_channels;
4108                 return snd_interval_list(c, 2, list, 0);
4109         }
4110 }
4111
4112 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4113                                         struct snd_pcm_hw_rule *rule)
4114 {
4115         unsigned int list[3];
4116         struct hdsp *hdsp = rule->private;
4117         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4118         if (hdsp->io_type == H9632) {
4119                 list[0] = hdsp->qs_out_channels;
4120                 list[1] = hdsp->ds_out_channels;
4121                 list[2] = hdsp->ss_out_channels;
4122                 return snd_interval_list(c, 3, list, 0);
4123         } else {
4124                 list[0] = hdsp->ds_out_channels;
4125                 list[1] = hdsp->ss_out_channels;
4126         }
4127         return snd_interval_list(c, 2, list, 0);
4128 }
4129
4130 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4131                                              struct snd_pcm_hw_rule *rule)
4132 {
4133         struct hdsp *hdsp = rule->private;
4134         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4135         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4136         if (r->min > 96000 && hdsp->io_type == H9632) {
4137                 struct snd_interval t = {
4138                         .min = hdsp->qs_in_channels,
4139                         .max = hdsp->qs_in_channels,
4140                         .integer = 1,
4141                 };
4142                 return snd_interval_refine(c, &t);
4143         } else if (r->min > 48000 && r->max <= 96000) {
4144                 struct snd_interval t = {
4145                         .min = hdsp->ds_in_channels,
4146                         .max = hdsp->ds_in_channels,
4147                         .integer = 1,
4148                 };
4149                 return snd_interval_refine(c, &t);
4150         } else if (r->max < 64000) {
4151                 struct snd_interval t = {
4152                         .min = hdsp->ss_in_channels,
4153                         .max = hdsp->ss_in_channels,
4154                         .integer = 1,
4155                 };
4156                 return snd_interval_refine(c, &t);
4157         }
4158         return 0;
4159 }
4160
4161 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4162                                              struct snd_pcm_hw_rule *rule)
4163 {
4164         struct hdsp *hdsp = rule->private;
4165         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4166         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4167         if (r->min > 96000 && hdsp->io_type == H9632) {
4168                 struct snd_interval t = {
4169                         .min = hdsp->qs_out_channels,
4170                         .max = hdsp->qs_out_channels,
4171                         .integer = 1,
4172                 };
4173                 return snd_interval_refine(c, &t);
4174         } else if (r->min > 48000 && r->max <= 96000) {
4175                 struct snd_interval t = {
4176                         .min = hdsp->ds_out_channels,
4177                         .max = hdsp->ds_out_channels,
4178                         .integer = 1,
4179                 };
4180                 return snd_interval_refine(c, &t);
4181         } else if (r->max < 64000) {
4182                 struct snd_interval t = {
4183                         .min = hdsp->ss_out_channels,
4184                         .max = hdsp->ss_out_channels,
4185                         .integer = 1,
4186                 };
4187                 return snd_interval_refine(c, &t);
4188         }
4189         return 0;
4190 }
4191
4192 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4193                                              struct snd_pcm_hw_rule *rule)
4194 {
4195         struct hdsp *hdsp = rule->private;
4196         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4197         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4198         if (c->min >= hdsp->ss_out_channels) {
4199                 struct snd_interval t = {
4200                         .min = 32000,
4201                         .max = 48000,
4202                         .integer = 1,
4203                 };
4204                 return snd_interval_refine(r, &t);
4205         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4206                 struct snd_interval t = {
4207                         .min = 128000,
4208                         .max = 192000,
4209                         .integer = 1,
4210                 };
4211                 return snd_interval_refine(r, &t);
4212         } else if (c->max <= hdsp->ds_out_channels) {
4213                 struct snd_interval t = {
4214                         .min = 64000,
4215                         .max = 96000,
4216                         .integer = 1,
4217                 };
4218                 return snd_interval_refine(r, &t);
4219         }
4220         return 0;
4221 }
4222
4223 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4224                                              struct snd_pcm_hw_rule *rule)
4225 {
4226         struct hdsp *hdsp = rule->private;
4227         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4228         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4229         if (c->min >= hdsp->ss_in_channels) {
4230                 struct snd_interval t = {
4231                         .min = 32000,
4232                         .max = 48000,
4233                         .integer = 1,
4234                 };
4235                 return snd_interval_refine(r, &t);
4236         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4237                 struct snd_interval t = {
4238                         .min = 128000,
4239                         .max = 192000,
4240                         .integer = 1,
4241                 };
4242                 return snd_interval_refine(r, &t);
4243         } else if (c->max <= hdsp->ds_in_channels) {
4244                 struct snd_interval t = {
4245                         .min = 64000,
4246                         .max = 96000,
4247                         .integer = 1,
4248                 };
4249                 return snd_interval_refine(r, &t);
4250         }
4251         return 0;
4252 }
4253
4254 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4255 {
4256         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4257         struct snd_pcm_runtime *runtime = substream->runtime;
4258
4259         if (hdsp_check_for_iobox (hdsp))
4260                 return -EIO;
4261
4262         if (hdsp_check_for_firmware(hdsp, 1))
4263                 return -EIO;
4264
4265         spin_lock_irq(&hdsp->lock);
4266
4267         snd_pcm_set_sync(substream);
4268
4269         runtime->hw = snd_hdsp_playback_subinfo;
4270         runtime->dma_area = hdsp->playback_buffer;
4271         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4272
4273         hdsp->playback_pid = current->pid;
4274         hdsp->playback_substream = substream;
4275
4276         spin_unlock_irq(&hdsp->lock);
4277
4278         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4279         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4280         if (hdsp->clock_source_locked) {
4281                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4282         } else if (hdsp->io_type == H9632) {
4283                 runtime->hw.rate_max = 192000;
4284                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4285                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4286         }
4287         if (hdsp->io_type == H9632) {
4288                 runtime->hw.channels_min = hdsp->qs_out_channels;
4289                 runtime->hw.channels_max = hdsp->ss_out_channels;
4290         }
4291
4292         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4293                              snd_hdsp_hw_rule_out_channels, hdsp,
4294                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4295         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4296                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4297                              SNDRV_PCM_HW_PARAM_RATE, -1);
4298         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4299                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4300                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4301
4302         hdsp->creg_spdif_stream = hdsp->creg_spdif;
4303         hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4304         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4305                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4306         return 0;
4307 }
4308
4309 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4310 {
4311         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4312
4313         spin_lock_irq(&hdsp->lock);
4314
4315         hdsp->playback_pid = -1;
4316         hdsp->playback_substream = NULL;
4317
4318         spin_unlock_irq(&hdsp->lock);
4319
4320         hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4321         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4322                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4323         return 0;
4324 }
4325
4326
4327 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4328 {
4329         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4330         struct snd_pcm_runtime *runtime = substream->runtime;
4331
4332         if (hdsp_check_for_iobox (hdsp))
4333                 return -EIO;
4334
4335         if (hdsp_check_for_firmware(hdsp, 1))
4336                 return -EIO;
4337
4338         spin_lock_irq(&hdsp->lock);
4339
4340         snd_pcm_set_sync(substream);
4341
4342         runtime->hw = snd_hdsp_capture_subinfo;
4343         runtime->dma_area = hdsp->capture_buffer;
4344         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4345
4346         hdsp->capture_pid = current->pid;
4347         hdsp->capture_substream = substream;
4348
4349         spin_unlock_irq(&hdsp->lock);
4350
4351         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4352         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4353         if (hdsp->io_type == H9632) {
4354                 runtime->hw.channels_min = hdsp->qs_in_channels;
4355                 runtime->hw.channels_max = hdsp->ss_in_channels;
4356                 runtime->hw.rate_max = 192000;
4357                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4358                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4359         }
4360         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4361                              snd_hdsp_hw_rule_in_channels, hdsp,
4362                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4363         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4364                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4365                              SNDRV_PCM_HW_PARAM_RATE, -1);
4366         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4367                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4368                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4369         return 0;
4370 }
4371
4372 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4373 {
4374         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4375
4376         spin_lock_irq(&hdsp->lock);
4377
4378         hdsp->capture_pid = -1;
4379         hdsp->capture_substream = NULL;
4380
4381         spin_unlock_irq(&hdsp->lock);
4382         return 0;
4383 }
4384
4385 static int snd_hdsp_hwdep_dummy_op(struct snd_hwdep *hw, struct file *file)
4386 {
4387         /* we have nothing to initialize but the call is required */
4388         return 0;
4389 }
4390
4391
4392 /* helper functions for copying meter values */
4393 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4394 {
4395         u32 val = readl(src);
4396         return copy_to_user(dest, &val, 4);
4397 }
4398
4399 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4400 {
4401         u32 rms_low, rms_high;
4402         u64 rms;
4403         rms_low = readl(src_low);
4404         rms_high = readl(src_high);
4405         rms = ((u64)rms_high << 32) | rms_low;
4406         return copy_to_user(dest, &rms, 8);
4407 }
4408
4409 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4410 {
4411         u32 rms_low, rms_high;
4412         u64 rms;
4413         rms_low = readl(src_low) & 0xffffff00;
4414         rms_high = readl(src_high) & 0xffffff00;
4415         rms = ((u64)rms_high << 32) | rms_low;
4416         return copy_to_user(dest, &rms, 8);
4417 }
4418
4419 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4420 {
4421         int doublespeed = 0;
4422         int i, j, channels, ofs;
4423
4424         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4425                 doublespeed = 1;
4426         channels = doublespeed ? 14 : 26;
4427         for (i = 0, j = 0; i < 26; ++i) {
4428                 if (doublespeed && (i & 4))
4429                         continue;
4430                 ofs = HDSP_9652_peakBase - j * 4;
4431                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4432                         return -EFAULT;
4433                 ofs -= channels * 4;
4434                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4435                         return -EFAULT;
4436                 ofs -= channels * 4;
4437                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4438                         return -EFAULT;
4439                 ofs = HDSP_9652_rmsBase + j * 8;
4440                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4441                                 hdsp->iobase + ofs + 4))
4442                         return -EFAULT;
4443                 ofs += channels * 8;
4444                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4445                                 hdsp->iobase + ofs + 4))
4446                         return -EFAULT;
4447                 ofs += channels * 8;
4448                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4449                                 hdsp->iobase + ofs + 4))
4450                         return -EFAULT;
4451                 j++;
4452         }
4453         return 0;
4454 }
4455
4456 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4457 {
4458         int i, j;
4459         struct hdsp_9632_meters __iomem *m;
4460         int doublespeed = 0;
4461
4462         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4463                 doublespeed = 1;
4464         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4465         for (i = 0, j = 0; i < 16; ++i, ++j) {
4466                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4467                         return -EFAULT;
4468                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4469                         return -EFAULT;
4470                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4471                         return -EFAULT;
4472                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4473                                 &m->input_rms_high[j]))
4474                         return -EFAULT;
4475                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4476                                 &m->playback_rms_high[j]))
4477                         return -EFAULT;
4478                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4479                                 &m->output_rms_high[j]))
4480                         return -EFAULT;
4481                 if (doublespeed && i == 3) i += 4;
4482         }
4483         return 0;
4484 }
4485
4486 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4487 {
4488         int i;
4489
4490         for (i = 0; i < 26; i++) {
4491                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4492                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4493                         return -EFAULT;
4494                 if (copy_u32_le(&peak_rms->input_peaks[i],
4495                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4496                         return -EFAULT;
4497         }
4498         for (i = 0; i < 28; i++) {
4499                 if (copy_u32_le(&peak_rms->output_peaks[i],
4500                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4501                         return -EFAULT;
4502         }
4503         for (i = 0; i < 26; ++i) {
4504                 if (copy_u64_le(&peak_rms->playback_rms[i],
4505                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4506                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4507                         return -EFAULT;
4508                 if (copy_u64_le(&peak_rms->input_rms[i],
4509                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4510                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4511                         return -EFAULT;
4512         }
4513         return 0;
4514 }
4515
4516 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4517 {
4518         struct hdsp *hdsp = (struct hdsp *)hw->private_data;
4519         void __user *argp = (void __user *)arg;
4520
4521         switch (cmd) {
4522         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4523                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4524
4525                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4526                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4527                         return -EINVAL;
4528                 }
4529
4530                 switch (hdsp->io_type) {
4531                 case H9652:
4532                         return hdsp_9652_get_peak(hdsp, peak_rms);
4533                 case H9632:
4534                         return hdsp_9632_get_peak(hdsp, peak_rms);
4535                 default:
4536                         return hdsp_get_peak(hdsp, peak_rms);
4537                 }
4538         }
4539         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4540                 struct hdsp_config_info info;
4541                 unsigned long flags;
4542                 int i;
4543
4544                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4545                         snd_printk(KERN_ERR "Hammerfall-DSP: Firmware needs to be uploaded to the card.\n");
4546                         return -EINVAL;
4547                 }
4548                 spin_lock_irqsave(&hdsp->lock, flags);
4549                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4550                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4551                 if (hdsp->io_type != H9632)
4552                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4553                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4554                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != H9632) ? 3 : 1); ++i)
4555                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4556                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4557                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
4558                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
4559                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
4560                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
4561                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4562                 info.system_sample_rate = hdsp->system_sample_rate;
4563                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4564                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4565                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4566                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4567                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
4568                 if (hdsp->io_type == H9632) {
4569                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4570                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4571                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4572                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
4573
4574                 }
4575                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4576                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
4577                 spin_unlock_irqrestore(&hdsp->lock, flags);
4578                 if (copy_to_user(argp, &info, sizeof(info)))
4579                         return -EFAULT;
4580                 break;
4581         }
4582         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4583                 struct hdsp_9632_aeb h9632_aeb;
4584
4585                 if (hdsp->io_type != H9632) return -EINVAL;
4586                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4587                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4588                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4589                         return -EFAULT;
4590                 break;
4591         }
4592         case SNDRV_HDSP_IOCTL_GET_VERSION: {
4593                 struct hdsp_version hdsp_version;
4594                 int err;
4595
4596                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4597                 if (hdsp->io_type == Undefined) {
4598                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4599                                 return err;
4600                 }
4601                 hdsp_version.io_type = hdsp->io_type;
4602                 hdsp_version.firmware_rev = hdsp->firmware_rev;
4603                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4604                         return -EFAULT;
4605                 break;
4606         }
4607         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4608                 struct hdsp_firmware __user *firmware;
4609                 u32 __user *firmware_data;
4610                 int err;
4611
4612                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4613                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4614                 if (hdsp->io_type == Undefined) return -EINVAL;
4615
4616                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4617                         return -EBUSY;
4618
4619                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4620                 firmware = (struct hdsp_firmware __user *)argp;
4621
4622                 if (get_user(firmware_data, &firmware->firmware_data))
4623                         return -EFAULT;
4624
4625                 if (hdsp_check_for_iobox (hdsp))
4626                         return -EIO;
4627
4628                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
4629                         return -EFAULT;
4630
4631                 hdsp->state |= HDSP_FirmwareCached;
4632
4633                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4634                         return err;
4635
4636                 if (!(hdsp->state & HDSP_InitializationComplete)) {
4637                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4638                                 return err;
4639
4640                         snd_hdsp_initialize_channels(hdsp);
4641                         snd_hdsp_initialize_midi_flush(hdsp);
4642
4643                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4644                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4645                                 return err;
4646                         }
4647                 }
4648                 break;
4649         }
4650         case SNDRV_HDSP_IOCTL_GET_MIXER: {
4651                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4652                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4653                         return -EFAULT;
4654                 break;
4655         }
4656         default:
4657                 return -EINVAL;
4658         }
4659         return 0;
4660 }
4661
4662 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4663         .open =         snd_hdsp_playback_open,
4664         .close =        snd_hdsp_playback_release,
4665         .ioctl =        snd_hdsp_ioctl,
4666         .hw_params =    snd_hdsp_hw_params,
4667         .prepare =      snd_hdsp_prepare,
4668         .trigger =      snd_hdsp_trigger,
4669         .pointer =      snd_hdsp_hw_pointer,
4670         .copy =         snd_hdsp_playback_copy,
4671         .silence =      snd_hdsp_hw_silence,
4672 };
4673
4674 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4675         .open =         snd_hdsp_capture_open,
4676         .close =        snd_hdsp_capture_release,
4677         .ioctl =        snd_hdsp_ioctl,
4678         .hw_params =    snd_hdsp_hw_params,
4679         .prepare =      snd_hdsp_prepare,
4680         .trigger =      snd_hdsp_trigger,
4681         .pointer =      snd_hdsp_hw_pointer,
4682         .copy =         snd_hdsp_capture_copy,
4683 };
4684
4685 static int __devinit snd_hdsp_create_hwdep(struct snd_card *card,
4686                                            struct hdsp *hdsp)
4687 {
4688         struct snd_hwdep *hw;
4689         int err;
4690
4691         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4692                 return err;
4693
4694         hdsp->hwdep = hw;
4695         hw->private_data = hdsp;
4696         strcpy(hw->name, "HDSP hwdep interface");
4697
4698         hw->ops.open = snd_hdsp_hwdep_dummy_op;
4699         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4700         hw->ops.release = snd_hdsp_hwdep_dummy_op;
4701
4702         return 0;
4703 }
4704
4705 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4706 {
4707         struct snd_pcm *pcm;
4708         int err;
4709
4710         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4711                 return err;
4712
4713         hdsp->pcm = pcm;
4714         pcm->private_data = hdsp;
4715         strcpy(pcm->name, hdsp->card_name);
4716
4717         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4718         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4719
4720         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4721
4722         return 0;
4723 }
4724
4725 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4726 {
4727         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4728         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4729 }
4730
4731 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4732 {
4733         int i;
4734
4735         if (hdsp_fifo_wait (hdsp, 0, 100)) {
4736                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4737                 return -EIO;
4738         }
4739
4740         for (i = 0; i < hdsp->max_channels; ++i) {
4741                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4742                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4743         }
4744
4745         return 0;
4746 }
4747
4748 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
4749 {
4750         int status, aebi_channels, aebo_channels;
4751
4752         switch (hdsp->io_type) {
4753         case Digiface:
4754                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
4755                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
4756                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
4757                 break;
4758
4759         case H9652:
4760                 hdsp->card_name = "RME Hammerfall HDSP 9652";
4761                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
4762                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
4763                 break;
4764
4765         case H9632:
4766                 status = hdsp_read(hdsp, HDSP_statusRegister);
4767                 /* HDSP_AEBx bits are low when AEB are connected */
4768                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
4769                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
4770                 hdsp->card_name = "RME Hammerfall HDSP 9632";
4771                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
4772                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
4773                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
4774                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
4775                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
4776                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
4777                 break;
4778
4779         case Multiface:
4780                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
4781                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
4782                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
4783                 break;
4784
4785         default:
4786                 /* should never get here */
4787                 break;
4788         }
4789 }
4790
4791 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
4792 {
4793         snd_hdsp_flush_midi_input (hdsp, 0);
4794         snd_hdsp_flush_midi_input (hdsp, 1);
4795 }
4796
4797 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
4798 {
4799         int err;
4800
4801         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
4802                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
4803                 return err;
4804         }
4805
4806
4807         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
4808                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
4809                 return err;
4810         }
4811
4812         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
4813                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
4814                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
4815                         return err;
4816                 }
4817         }
4818
4819         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
4820                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
4821                 return err;
4822         }
4823
4824         snd_hdsp_proc_init(hdsp);
4825
4826         hdsp->system_sample_rate = -1;
4827         hdsp->playback_pid = -1;
4828         hdsp->capture_pid = -1;
4829         hdsp->capture_substream = NULL;
4830         hdsp->playback_substream = NULL;
4831
4832         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
4833                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
4834                 return err;
4835         }
4836
4837         if (!(hdsp->state & HDSP_InitializationComplete)) {
4838                 strcpy(card->shortname, "Hammerfall DSP");
4839                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
4840                         hdsp->port, hdsp->irq);
4841
4842                 if ((err = snd_card_register(card)) < 0) {
4843                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
4844                         return err;
4845                 }
4846                 hdsp->state |= HDSP_InitializationComplete;
4847         }
4848
4849         return 0;
4850 }
4851
4852 #ifdef HDSP_FW_LOADER
4853 /* load firmware via hotplug fw loader */
4854 static int __devinit hdsp_request_fw_loader(struct hdsp *hdsp)
4855 {
4856         const char *fwfile;
4857         const struct firmware *fw;
4858         int err;
4859
4860         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4861                 return 0;
4862         if (hdsp->io_type == Undefined) {
4863                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4864                         return err;
4865                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4866                         return 0;
4867         }
4868
4869         /* caution: max length of firmware filename is 30! */
4870         switch (hdsp->io_type) {
4871         case Multiface:
4872                 if (hdsp->firmware_rev == 0xa)
4873                         fwfile = "multiface_firmware.bin";
4874                 else
4875                         fwfile = "multiface_firmware_rev11.bin";
4876                 break;
4877         case Digiface:
4878                 if (hdsp->firmware_rev == 0xa)
4879                         fwfile = "digiface_firmware.bin";
4880                 else
4881                         fwfile = "digiface_firmware_rev11.bin";
4882                 break;
4883         default:
4884                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
4885                 return -EINVAL;
4886         }
4887
4888         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
4889                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
4890                 return -ENOENT;
4891         }
4892         if (fw->size < sizeof(hdsp->firmware_cache)) {
4893                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4894                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
4895                 release_firmware(fw);
4896                 return -EINVAL;
4897         }
4898
4899         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
4900
4901         release_firmware(fw);
4902
4903         hdsp->state |= HDSP_FirmwareCached;
4904
4905         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4906                 return err;
4907
4908         if (!(hdsp->state & HDSP_InitializationComplete)) {
4909                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4910                         return err;
4911
4912                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
4913                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
4914                         return err;
4915                 }
4916                 snd_hdsp_initialize_channels(hdsp);
4917                 snd_hdsp_initialize_midi_flush(hdsp);
4918                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4919                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4920                         return err;
4921                 }
4922         }
4923         return 0;
4924 }
4925 #endif
4926
4927 static int __devinit snd_hdsp_create(struct snd_card *card,
4928                                      struct hdsp *hdsp)
4929 {
4930         struct pci_dev *pci = hdsp->pci;
4931         int err;
4932         int is_9652 = 0;
4933         int is_9632 = 0;
4934
4935         hdsp->irq = -1;
4936         hdsp->state = 0;
4937         hdsp->midi[0].rmidi = NULL;
4938         hdsp->midi[1].rmidi = NULL;
4939         hdsp->midi[0].input = NULL;
4940         hdsp->midi[1].input = NULL;
4941         hdsp->midi[0].output = NULL;
4942         hdsp->midi[1].output = NULL;
4943         hdsp->midi[0].pending = 0;
4944         hdsp->midi[1].pending = 0;
4945         spin_lock_init(&hdsp->midi[0].lock);
4946         spin_lock_init(&hdsp->midi[1].lock);
4947         hdsp->iobase = NULL;
4948         hdsp->control_register = 0;
4949         hdsp->control2_register = 0;
4950         hdsp->io_type = Undefined;
4951         hdsp->max_channels = 26;
4952
4953         hdsp->card = card;
4954
4955         spin_lock_init(&hdsp->lock);
4956
4957         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
4958
4959         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
4960         hdsp->firmware_rev &= 0xff;
4961
4962         /* From Martin Bjoernsen :
4963             "It is important that the card's latency timer register in
4964             the PCI configuration space is set to a value much larger
4965             than 0 by the computer's BIOS or the driver.
4966             The windows driver always sets this 8 bit register [...]
4967             to its maximum 255 to avoid problems with some computers."
4968         */
4969         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
4970
4971         strcpy(card->driver, "H-DSP");
4972         strcpy(card->mixername, "Xilinx FPGA");
4973
4974         if (hdsp->firmware_rev < 0xa)
4975                 return -ENODEV;
4976         else if (hdsp->firmware_rev < 0x64)
4977                 hdsp->card_name = "RME Hammerfall DSP";
4978         else if (hdsp->firmware_rev < 0x96) {
4979                 hdsp->card_name = "RME HDSP 9652";
4980                 is_9652 = 1;
4981         } else {
4982                 hdsp->card_name = "RME HDSP 9632";
4983                 hdsp->max_channels = 16;
4984                 is_9632 = 1;
4985         }
4986
4987         if ((err = pci_enable_device(pci)) < 0)
4988                 return err;
4989
4990         pci_set_master(hdsp->pci);
4991
4992         if ((err = pci_request_regions(pci, "hdsp")) < 0)
4993                 return err;
4994         hdsp->port = pci_resource_start(pci, 0);
4995         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
4996                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
4997                 return -EBUSY;
4998         }
4999
5000         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5001                         "hdsp", hdsp)) {
5002                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5003                 return -EBUSY;
5004         }
5005
5006         hdsp->irq = pci->irq;
5007         hdsp->precise_ptr = 0;
5008         hdsp->use_midi_tasklet = 1;
5009         hdsp->dds_value = 0;
5010
5011         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5012                 return err;
5013
5014         if (!is_9652 && !is_9632) {
5015                 /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */
5016                 ssleep(2);
5017
5018                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5019 #ifdef HDSP_FW_LOADER
5020                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5021                                 /* we don't fail as this can happen
5022                                    if userspace is not ready for
5023                                    firmware upload
5024                                 */
5025                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5026                         else
5027                                 /* init is complete, we return */
5028                                 return 0;
5029 #endif
5030                         /* no iobox connected, we defer initialization */
5031                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5032                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5033                                 return err;
5034                         return 0;
5035                 } else {
5036                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5037                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5038                                 hdsp->io_type = Multiface;
5039                         else
5040                                 hdsp->io_type = Digiface;
5041                 }
5042         }
5043
5044         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5045                 return err;
5046
5047         if (is_9652)
5048                 hdsp->io_type = H9652;
5049
5050         if (is_9632)
5051                 hdsp->io_type = H9632;
5052
5053         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5054                 return err;
5055
5056         snd_hdsp_initialize_channels(hdsp);
5057         snd_hdsp_initialize_midi_flush(hdsp);
5058
5059         hdsp->state |= HDSP_FirmwareLoaded;
5060
5061         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5062                 return err;
5063
5064         return 0;
5065 }
5066
5067 static int snd_hdsp_free(struct hdsp *hdsp)
5068 {
5069         if (hdsp->port) {
5070                 /* stop the audio, and cancel all interrupts */
5071                 tasklet_kill(&hdsp->midi_tasklet);
5072                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5073                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5074         }
5075
5076         if (hdsp->irq >= 0)
5077                 free_irq(hdsp->irq, (void *)hdsp);
5078
5079         snd_hdsp_free_buffers(hdsp);
5080
5081         if (hdsp->iobase)
5082                 iounmap(hdsp->iobase);
5083
5084         if (hdsp->port)
5085                 pci_release_regions(hdsp->pci);
5086
5087         pci_disable_device(hdsp->pci);
5088         return 0;
5089 }
5090
5091 static void snd_hdsp_card_free(struct snd_card *card)
5092 {
5093         struct hdsp *hdsp = (struct hdsp *) card->private_data;
5094
5095         if (hdsp)
5096                 snd_hdsp_free(hdsp);
5097 }
5098
5099 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5100                                     const struct pci_device_id *pci_id)
5101 {
5102         static int dev;
5103         struct hdsp *hdsp;
5104         struct snd_card *card;
5105         int err;
5106
5107         if (dev >= SNDRV_CARDS)
5108                 return -ENODEV;
5109         if (!enable[dev]) {
5110                 dev++;
5111                 return -ENOENT;
5112         }
5113
5114         if (!(card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct hdsp))))
5115                 return -ENOMEM;
5116
5117         hdsp = (struct hdsp *) card->private_data;
5118         card->private_free = snd_hdsp_card_free;
5119         hdsp->dev = dev;
5120         hdsp->pci = pci;
5121         snd_card_set_dev(card, &pci->dev);
5122
5123         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5124                 snd_card_free(card);
5125                 return err;
5126         }
5127
5128         strcpy(card->shortname, "Hammerfall DSP");
5129         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5130                 hdsp->port, hdsp->irq);
5131
5132         if ((err = snd_card_register(card)) < 0) {
5133                 snd_card_free(card);
5134                 return err;
5135         }
5136         pci_set_drvdata(pci, card);
5137         dev++;
5138         return 0;
5139 }
5140
5141 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5142 {
5143         snd_card_free(pci_get_drvdata(pci));
5144         pci_set_drvdata(pci, NULL);
5145 }
5146
5147 static struct pci_driver driver = {
5148         .name =     "RME Hammerfall DSP",
5149         .id_table = snd_hdsp_ids,
5150         .probe =    snd_hdsp_probe,
5151         .remove = __devexit_p(snd_hdsp_remove),
5152 };
5153
5154 static int __init alsa_card_hdsp_init(void)
5155 {
5156         return pci_register_driver(&driver);
5157 }
5158
5159 static void __exit alsa_card_hdsp_exit(void)
5160 {
5161         pci_unregister_driver(&driver);
5162 }
5163
5164 module_init(alsa_card_hdsp_init)
5165 module_exit(alsa_card_hdsp_exit)