2 * ALSA driver for RME Hammerfall DSP audio interface(s)
4 * Copyright (c) 2002 Paul Davis
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/slab.h>
29 #include <linux/pci.h>
30 #include <linux/firmware.h>
31 #include <linux/moduleparam.h>
33 #include <sound/core.h>
34 #include <sound/control.h>
35 #include <sound/pcm.h>
36 #include <sound/info.h>
37 #include <sound/asoundef.h>
38 #include <sound/rawmidi.h>
39 #include <sound/hwdep.h>
40 #include <sound/initval.h>
41 #include <sound/hdsp.h>
43 #include <asm/byteorder.h>
44 #include <asm/current.h>
47 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
48 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
49 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
51 module_param_array(index, int, NULL, 0444);
52 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
53 module_param_array(id, charp, NULL, 0444);
54 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
55 module_param_array(enable, bool, NULL, 0444);
56 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
58 MODULE_DESCRIPTION("RME Hammerfall DSP");
59 MODULE_LICENSE("GPL");
60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
64 #define HDSP_MAX_CHANNELS 26
65 #define HDSP_MAX_DS_CHANNELS 14
66 #define HDSP_MAX_QS_CHANNELS 8
67 #define DIGIFACE_SS_CHANNELS 26
68 #define DIGIFACE_DS_CHANNELS 14
69 #define MULTIFACE_SS_CHANNELS 18
70 #define MULTIFACE_DS_CHANNELS 14
71 #define H9652_SS_CHANNELS 26
72 #define H9652_DS_CHANNELS 14
73 /* This does not include possible Analog Extension Boards
74 AEBs are detected at card initialization
76 #define H9632_SS_CHANNELS 12
77 #define H9632_DS_CHANNELS 8
78 #define H9632_QS_CHANNELS 4
80 /* Write registers. These are defined as byte-offsets from the iobase value.
82 #define HDSP_resetPointer 0
83 #define HDSP_outputBufferAddress 32
84 #define HDSP_inputBufferAddress 36
85 #define HDSP_controlRegister 64
86 #define HDSP_interruptConfirmation 96
87 #define HDSP_outputEnable 128
88 #define HDSP_control2Reg 256
89 #define HDSP_midiDataOut0 352
90 #define HDSP_midiDataOut1 356
91 #define HDSP_fifoData 368
92 #define HDSP_inputEnable 384
94 /* Read registers. These are defined as byte-offsets from the iobase value
97 #define HDSP_statusRegister 0
98 #define HDSP_timecode 128
99 #define HDSP_status2Register 192
100 #define HDSP_midiDataOut0 352
101 #define HDSP_midiDataOut1 356
102 #define HDSP_midiDataIn0 360
103 #define HDSP_midiDataIn1 364
104 #define HDSP_midiStatusOut0 384
105 #define HDSP_midiStatusOut1 388
106 #define HDSP_midiStatusIn0 392
107 #define HDSP_midiStatusIn1 396
108 #define HDSP_fifoStatus 400
110 /* the meters are regular i/o-mapped registers, but offset
111 considerably from the rest. the peak registers are reset
112 when read; the least-significant 4 bits are full-scale counters;
113 the actual peak value is in the most-significant 24 bits.
116 #define HDSP_playbackPeakLevel 4096 /* 26 * 32 bit values */
117 #define HDSP_inputPeakLevel 4224 /* 26 * 32 bit values */
118 #define HDSP_outputPeakLevel 4352 /* (26+2) * 32 bit values */
119 #define HDSP_playbackRmsLevel 4612 /* 26 * 64 bit values */
120 #define HDSP_inputRmsLevel 4868 /* 26 * 64 bit values */
123 /* This is for H9652 cards
124 Peak values are read downward from the base
125 Rms values are read upward
126 There are rms values for the outputs too
127 26*3 values are read in ss mode
128 14*3 in ds mode, with no gap between values
130 #define HDSP_9652_peakBase 7164
131 #define HDSP_9652_rmsBase 4096
133 /* c.f. the hdsp_9632_meters_t struct */
134 #define HDSP_9632_metersBase 4096
136 #define HDSP_IO_EXTENT 7168
138 /* control2 register bits */
140 #define HDSP_TMS 0x01
141 #define HDSP_TCK 0x02
142 #define HDSP_TDI 0x04
143 #define HDSP_JTAG 0x08
144 #define HDSP_PWDN 0x10
145 #define HDSP_PROGRAM 0x020
146 #define HDSP_CONFIG_MODE_0 0x040
147 #define HDSP_CONFIG_MODE_1 0x080
148 #define HDSP_VERSION_BIT 0x100
149 #define HDSP_BIGENDIAN_MODE 0x200
150 #define HDSP_RD_MULTIPLE 0x400
151 #define HDSP_9652_ENABLE_MIXER 0x800
152 #define HDSP_TDO 0x10000000
154 #define HDSP_S_PROGRAM (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
155 #define HDSP_S_LOAD (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
157 /* Control Register bits */
159 #define HDSP_Start (1<<0) /* start engine */
160 #define HDSP_Latency0 (1<<1) /* buffer size = 2^n where n is defined by Latency{2,1,0} */
161 #define HDSP_Latency1 (1<<2) /* [ see above ] */
162 #define HDSP_Latency2 (1<<3) /* [ see above ] */
163 #define HDSP_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
164 #define HDSP_AudioInterruptEnable (1<<5) /* what do you think ? */
165 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
166 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
167 #define HDSP_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
168 #define HDSP_SPDIFProfessional (1<<9) /* 0=consumer, 1=professional */
169 #define HDSP_SPDIFEmphasis (1<<10) /* 0=none, 1=on */
170 #define HDSP_SPDIFNonAudio (1<<11) /* 0=off, 1=on */
171 #define HDSP_SPDIFOpticalOut (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
172 #define HDSP_SyncRef2 (1<<13)
173 #define HDSP_SPDIFInputSelect0 (1<<14)
174 #define HDSP_SPDIFInputSelect1 (1<<15)
175 #define HDSP_SyncRef0 (1<<16)
176 #define HDSP_SyncRef1 (1<<17)
177 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
178 #define HDSP_XLRBreakoutCable (1<<20) /* For H9632 cards */
179 #define HDSP_Midi0InterruptEnable (1<<22)
180 #define HDSP_Midi1InterruptEnable (1<<23)
181 #define HDSP_LineOut (1<<24)
182 #define HDSP_ADGain0 (1<<25) /* From here : H9632 specific */
183 #define HDSP_ADGain1 (1<<26)
184 #define HDSP_DAGain0 (1<<27)
185 #define HDSP_DAGain1 (1<<28)
186 #define HDSP_PhoneGain0 (1<<29)
187 #define HDSP_PhoneGain1 (1<<30)
188 #define HDSP_QuadSpeed (1<<31)
190 #define HDSP_ADGainMask (HDSP_ADGain0|HDSP_ADGain1)
191 #define HDSP_ADGainMinus10dBV HDSP_ADGainMask
192 #define HDSP_ADGainPlus4dBu (HDSP_ADGain0)
193 #define HDSP_ADGainLowGain 0
195 #define HDSP_DAGainMask (HDSP_DAGain0|HDSP_DAGain1)
196 #define HDSP_DAGainHighGain HDSP_DAGainMask
197 #define HDSP_DAGainPlus4dBu (HDSP_DAGain0)
198 #define HDSP_DAGainMinus10dBV 0
200 #define HDSP_PhoneGainMask (HDSP_PhoneGain0|HDSP_PhoneGain1)
201 #define HDSP_PhoneGain0dB HDSP_PhoneGainMask
202 #define HDSP_PhoneGainMinus6dB (HDSP_PhoneGain0)
203 #define HDSP_PhoneGainMinus12dB 0
205 #define HDSP_LatencyMask (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
206 #define HDSP_FrequencyMask (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
208 #define HDSP_SPDIFInputMask (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
209 #define HDSP_SPDIFInputADAT1 0
210 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
211 #define HDSP_SPDIFInputCdrom (HDSP_SPDIFInputSelect1)
212 #define HDSP_SPDIFInputAES (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
214 #define HDSP_SyncRefMask (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
215 #define HDSP_SyncRef_ADAT1 0
216 #define HDSP_SyncRef_ADAT2 (HDSP_SyncRef0)
217 #define HDSP_SyncRef_ADAT3 (HDSP_SyncRef1)
218 #define HDSP_SyncRef_SPDIF (HDSP_SyncRef0|HDSP_SyncRef1)
219 #define HDSP_SyncRef_WORD (HDSP_SyncRef2)
220 #define HDSP_SyncRef_ADAT_SYNC (HDSP_SyncRef0|HDSP_SyncRef2)
222 /* Sample Clock Sources */
224 #define HDSP_CLOCK_SOURCE_AUTOSYNC 0
225 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ 1
226 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
227 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ 3
228 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ 4
229 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
230 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ 6
231 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ 7
232 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
233 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ 9
235 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
237 #define HDSP_SYNC_FROM_WORD 0
238 #define HDSP_SYNC_FROM_SPDIF 1
239 #define HDSP_SYNC_FROM_ADAT1 2
240 #define HDSP_SYNC_FROM_ADAT_SYNC 3
241 #define HDSP_SYNC_FROM_ADAT2 4
242 #define HDSP_SYNC_FROM_ADAT3 5
244 /* SyncCheck status */
246 #define HDSP_SYNC_CHECK_NO_LOCK 0
247 #define HDSP_SYNC_CHECK_LOCK 1
248 #define HDSP_SYNC_CHECK_SYNC 2
250 /* AutoSync references - used by "autosync_ref" control switch */
252 #define HDSP_AUTOSYNC_FROM_WORD 0
253 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
254 #define HDSP_AUTOSYNC_FROM_SPDIF 2
255 #define HDSP_AUTOSYNC_FROM_NONE 3
256 #define HDSP_AUTOSYNC_FROM_ADAT1 4
257 #define HDSP_AUTOSYNC_FROM_ADAT2 5
258 #define HDSP_AUTOSYNC_FROM_ADAT3 6
260 /* Possible sources of S/PDIF input */
262 #define HDSP_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
263 #define HDSP_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
264 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
265 #define HDSP_SPDIFIN_AES 3 /* xlr for H9632 (AES)*/
267 #define HDSP_Frequency32KHz HDSP_Frequency0
268 #define HDSP_Frequency44_1KHz HDSP_Frequency1
269 #define HDSP_Frequency48KHz (HDSP_Frequency1|HDSP_Frequency0)
270 #define HDSP_Frequency64KHz (HDSP_DoubleSpeed|HDSP_Frequency0)
271 #define HDSP_Frequency88_2KHz (HDSP_DoubleSpeed|HDSP_Frequency1)
272 #define HDSP_Frequency96KHz (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
273 /* For H9632 cards */
274 #define HDSP_Frequency128KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
275 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
276 #define HDSP_Frequency192KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
278 #define hdsp_encode_latency(x) (((x)<<1) & HDSP_LatencyMask)
279 #define hdsp_decode_latency(x) (((x) & HDSP_LatencyMask)>>1)
281 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
282 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
284 /* Status Register bits */
286 #define HDSP_audioIRQPending (1<<0)
287 #define HDSP_Lock2 (1<<1) /* this is for Digiface and H9652 */
288 #define HDSP_spdifFrequency3 HDSP_Lock2 /* this is for H9632 only */
289 #define HDSP_Lock1 (1<<2)
290 #define HDSP_Lock0 (1<<3)
291 #define HDSP_SPDIFSync (1<<4)
292 #define HDSP_TimecodeLock (1<<5)
293 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
294 #define HDSP_Sync2 (1<<16)
295 #define HDSP_Sync1 (1<<17)
296 #define HDSP_Sync0 (1<<18)
297 #define HDSP_DoubleSpeedStatus (1<<19)
298 #define HDSP_ConfigError (1<<20)
299 #define HDSP_DllError (1<<21)
300 #define HDSP_spdifFrequency0 (1<<22)
301 #define HDSP_spdifFrequency1 (1<<23)
302 #define HDSP_spdifFrequency2 (1<<24)
303 #define HDSP_SPDIFErrorFlag (1<<25)
304 #define HDSP_BufferID (1<<26)
305 #define HDSP_TimecodeSync (1<<27)
306 #define HDSP_AEBO (1<<28) /* H9632 specific Analog Extension Boards */
307 #define HDSP_AEBI (1<<29) /* 0 = present, 1 = absent */
308 #define HDSP_midi0IRQPending (1<<30)
309 #define HDSP_midi1IRQPending (1<<31)
311 #define HDSP_spdifFrequencyMask (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
313 #define HDSP_spdifFrequency32KHz (HDSP_spdifFrequency0)
314 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
315 #define HDSP_spdifFrequency48KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
317 #define HDSP_spdifFrequency64KHz (HDSP_spdifFrequency2)
318 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
319 #define HDSP_spdifFrequency96KHz (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
321 /* This is for H9632 cards */
322 #define HDSP_spdifFrequency128KHz HDSP_spdifFrequencyMask
323 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
324 #define HDSP_spdifFrequency192KHz (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
326 /* Status2 Register bits */
328 #define HDSP_version0 (1<<0)
329 #define HDSP_version1 (1<<1)
330 #define HDSP_version2 (1<<2)
331 #define HDSP_wc_lock (1<<3)
332 #define HDSP_wc_sync (1<<4)
333 #define HDSP_inp_freq0 (1<<5)
334 #define HDSP_inp_freq1 (1<<6)
335 #define HDSP_inp_freq2 (1<<7)
336 #define HDSP_SelSyncRef0 (1<<8)
337 #define HDSP_SelSyncRef1 (1<<9)
338 #define HDSP_SelSyncRef2 (1<<10)
340 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
342 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
343 #define HDSP_systemFrequency32 (HDSP_inp_freq0)
344 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
345 #define HDSP_systemFrequency48 (HDSP_inp_freq0|HDSP_inp_freq1)
346 #define HDSP_systemFrequency64 (HDSP_inp_freq2)
347 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
348 #define HDSP_systemFrequency96 (HDSP_inp_freq1|HDSP_inp_freq2)
349 /* FIXME : more values for 9632 cards ? */
351 #define HDSP_SelSyncRefMask (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
352 #define HDSP_SelSyncRef_ADAT1 0
353 #define HDSP_SelSyncRef_ADAT2 (HDSP_SelSyncRef0)
354 #define HDSP_SelSyncRef_ADAT3 (HDSP_SelSyncRef1)
355 #define HDSP_SelSyncRef_SPDIF (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
356 #define HDSP_SelSyncRef_WORD (HDSP_SelSyncRef2)
357 #define HDSP_SelSyncRef_ADAT_SYNC (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
359 /* Card state flags */
361 #define HDSP_InitializationComplete (1<<0)
362 #define HDSP_FirmwareLoaded (1<<1)
363 #define HDSP_FirmwareCached (1<<2)
365 /* FIFO wait times, defined in terms of 1/10ths of msecs */
367 #define HDSP_LONG_WAIT 5000
368 #define HDSP_SHORT_WAIT 30
370 #define UNITY_GAIN 32768
371 #define MINUS_INFINITY_GAIN 0
373 /* the size of a substream (1 mono data stream) */
375 #define HDSP_CHANNEL_BUFFER_SAMPLES (16*1024)
376 #define HDSP_CHANNEL_BUFFER_BYTES (4*HDSP_CHANNEL_BUFFER_SAMPLES)
378 /* the size of the area we need to allocate for DMA transfers. the
379 size is the same regardless of the number of channels - the
380 Multiface still uses the same memory area.
382 Note that we allocate 1 more channel than is apparently needed
383 because the h/w seems to write 1 byte beyond the end of the last
387 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
388 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
390 /* use hotplug firmeare loader? */
391 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
392 #if !defined(HDSP_USE_HWDEP_LOADER) && !defined(CONFIG_SND_HDSP)
393 #define HDSP_FW_LOADER
397 struct hdsp_9632_meters {
399 u32 playback_peak[16];
403 u32 input_rms_low[16];
404 u32 playback_rms_low[16];
405 u32 output_rms_low[16];
407 u32 input_rms_high[16];
408 u32 playback_rms_high[16];
409 u32 output_rms_high[16];
410 u32 xxx_rms_high[16];
416 struct snd_rawmidi *rmidi;
417 struct snd_rawmidi_substream *input;
418 struct snd_rawmidi_substream *output;
419 char istimer; /* timer in use */
420 struct timer_list timer;
427 struct snd_pcm_substream *capture_substream;
428 struct snd_pcm_substream *playback_substream;
429 struct hdsp_midi midi[2];
430 struct tasklet_struct midi_tasklet;
431 int use_midi_tasklet;
433 u32 control_register; /* cached value */
434 u32 control2_register; /* cached value */
436 u32 creg_spdif_stream;
437 int clock_source_locked;
438 char *card_name; /* digiface/multiface */
439 enum HDSP_IO_Type io_type; /* ditto, but for code use */
440 unsigned short firmware_rev;
441 unsigned short state; /* stores state bits */
442 u32 firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
443 size_t period_bytes; /* guess what this is */
444 unsigned char max_channels;
445 unsigned char qs_in_channels; /* quad speed mode for H9632 */
446 unsigned char ds_in_channels;
447 unsigned char ss_in_channels; /* different for multiface/digiface */
448 unsigned char qs_out_channels;
449 unsigned char ds_out_channels;
450 unsigned char ss_out_channels;
452 struct snd_dma_buffer capture_dma_buf;
453 struct snd_dma_buffer playback_dma_buf;
454 unsigned char *capture_buffer; /* suitably aligned address */
455 unsigned char *playback_buffer; /* suitably aligned address */
460 int system_sample_rate;
465 void __iomem *iobase;
466 struct snd_card *card;
468 struct snd_hwdep *hwdep;
470 struct snd_kcontrol *spdif_ctl;
471 unsigned short mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
474 /* These tables map the ALSA channels 1..N to the channels that we
475 need to use in order to find the relevant channel buffer. RME
476 refer to this kind of mapping as between "the ADAT channel and
477 the DMA channel." We index it using the logical audio channel,
478 and the value is the DMA channel (i.e. channel buffer number)
479 where the data for that channel can be read/written from/to.
482 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
483 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
484 18, 19, 20, 21, 22, 23, 24, 25
487 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
489 0, 1, 2, 3, 4, 5, 6, 7,
491 16, 17, 18, 19, 20, 21, 22, 23,
494 -1, -1, -1, -1, -1, -1, -1, -1
497 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
498 /* ADAT channels are remapped */
499 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
500 /* channels 12 and 13 are S/PDIF */
502 /* others don't exist */
503 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
506 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
508 0, 1, 2, 3, 4, 5, 6, 7,
513 /* AO4S-192 and AI4S-192 extension boards */
515 /* others don't exist */
516 -1, -1, -1, -1, -1, -1, -1, -1,
520 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
527 /* AO4S-192 and AI4S-192 extension boards */
529 /* others don't exist */
530 -1, -1, -1, -1, -1, -1, -1, -1,
531 -1, -1, -1, -1, -1, -1
534 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
535 /* ADAT is disabled in this mode */
540 /* AO4S-192 and AI4S-192 extension boards */
542 /* others don't exist */
543 -1, -1, -1, -1, -1, -1, -1, -1,
544 -1, -1, -1, -1, -1, -1, -1, -1,
548 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
550 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
551 dmab->dev.dev = snd_dma_pci_data(pci);
552 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
553 if (dmab->bytes >= size)
556 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
562 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
565 dmab->dev.dev = NULL; /* make it anonymous */
566 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
571 static struct pci_device_id snd_hdsp_ids[] = {
573 .vendor = PCI_VENDOR_ID_XILINX,
574 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
575 .subvendor = PCI_ANY_ID,
576 .subdevice = PCI_ANY_ID,
577 }, /* RME Hammerfall-DSP */
581 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
584 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
585 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
586 static int snd_hdsp_enable_io (struct hdsp *hdsp);
587 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
588 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
589 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
590 static int hdsp_autosync_ref(struct hdsp *hdsp);
591 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
592 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
594 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
596 switch (hdsp->firmware_rev) {
598 return (64 * out) + (32 + (in));
602 return (32 * out) + (16 + (in));
604 return (52 * out) + (26 + (in));
608 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
610 switch (hdsp->firmware_rev) {
612 return (64 * out) + in;
616 return (32 * out) + in;
618 return (52 * out) + in;
622 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
624 writel(val, hdsp->iobase + reg);
627 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
629 return readl (hdsp->iobase + reg);
632 static int hdsp_check_for_iobox (struct hdsp *hdsp)
635 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
636 if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
637 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
638 hdsp->state &= ~HDSP_FirmwareLoaded;
645 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
650 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
652 snd_printk ("Hammerfall-DSP: loading firmware\n");
654 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
655 hdsp_write (hdsp, HDSP_fifoData, 0);
657 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
658 snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
662 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
664 for (i = 0; i < 24413; ++i) {
665 hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
666 if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
667 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
674 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
675 snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
679 #ifdef SNDRV_BIG_ENDIAN
680 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
682 hdsp->control2_register = 0;
684 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
685 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
688 if (hdsp->state & HDSP_InitializationComplete) {
689 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
690 spin_lock_irqsave(&hdsp->lock, flags);
691 snd_hdsp_set_defaults(hdsp);
692 spin_unlock_irqrestore(&hdsp->lock, flags);
695 hdsp->state |= HDSP_FirmwareLoaded;
700 static int hdsp_get_iobox_version (struct hdsp *hdsp)
702 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
704 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
705 hdsp_write (hdsp, HDSP_fifoData, 0);
706 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
709 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
710 hdsp_write (hdsp, HDSP_fifoData, 0);
712 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
713 hdsp->io_type = Multiface;
714 hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
715 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
716 hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
718 hdsp->io_type = Digiface;
721 /* firmware was already loaded, get iobox type */
722 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
723 hdsp->io_type = Multiface;
725 hdsp->io_type = Digiface;
731 #ifdef HDSP_FW_LOADER
732 static int __devinit hdsp_request_fw_loader(struct hdsp *hdsp);
735 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
737 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
739 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
740 hdsp->state &= ~HDSP_FirmwareLoaded;
741 if (! load_on_demand)
743 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
744 /* try to load firmware */
745 if (! (hdsp->state & HDSP_FirmwareCached)) {
746 #ifdef HDSP_FW_LOADER
747 if (! hdsp_request_fw_loader(hdsp))
751 "Hammerfall-DSP: No firmware loaded nor "
752 "cached, please upload firmware.\n");
755 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
757 "Hammerfall-DSP: Firmware loading from "
758 "cache failed, please upload manually.\n");
766 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
770 /* the fifoStatus registers reports on how many words
771 are available in the command FIFO.
774 for (i = 0; i < timeout; i++) {
776 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
779 /* not very friendly, but we only do this during a firmware
780 load and changing the mixer, so we just put up with it.
786 snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
791 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
793 if (addr >= HDSP_MATRIX_MIXER_SIZE)
796 return hdsp->mixer_matrix[addr];
799 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
803 if (addr >= HDSP_MATRIX_MIXER_SIZE)
806 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
808 /* from martin bjornsen:
810 "You can only write dwords to the
811 mixer memory which contain two
812 mixer values in the low and high
813 word. So if you want to change
814 value 0 you have to read value 1
815 from the cache and write both to
816 the first dword in the mixer
820 if (hdsp->io_type == H9632 && addr >= 512)
823 if (hdsp->io_type == H9652 && addr >= 1352)
826 hdsp->mixer_matrix[addr] = data;
829 /* `addr' addresses a 16-bit wide address, but
830 the address space accessed via hdsp_write
831 uses byte offsets. put another way, addr
832 varies from 0 to 1351, but to access the
833 corresponding memory location, we need
834 to access 0 to 2703 ...
838 hdsp_write (hdsp, 4096 + (ad*4),
839 (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
840 hdsp->mixer_matrix[addr&0x7fe]);
846 ad = (addr << 16) + data;
848 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
851 hdsp_write (hdsp, HDSP_fifoData, ad);
852 hdsp->mixer_matrix[addr] = data;
859 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
864 spin_lock_irqsave(&hdsp->lock, flags);
865 if ((hdsp->playback_pid != hdsp->capture_pid) &&
866 (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
868 spin_unlock_irqrestore(&hdsp->lock, flags);
872 static int hdsp_external_sample_rate (struct hdsp *hdsp)
874 unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
875 unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
878 case HDSP_systemFrequency32: return 32000;
879 case HDSP_systemFrequency44_1: return 44100;
880 case HDSP_systemFrequency48: return 48000;
881 case HDSP_systemFrequency64: return 64000;
882 case HDSP_systemFrequency88_2: return 88200;
883 case HDSP_systemFrequency96: return 96000;
889 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
891 unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
892 unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
894 if (status & HDSP_SPDIFErrorFlag)
898 case HDSP_spdifFrequency32KHz: return 32000;
899 case HDSP_spdifFrequency44_1KHz: return 44100;
900 case HDSP_spdifFrequency48KHz: return 48000;
901 case HDSP_spdifFrequency64KHz: return 64000;
902 case HDSP_spdifFrequency88_2KHz: return 88200;
903 case HDSP_spdifFrequency96KHz: return 96000;
904 case HDSP_spdifFrequency128KHz:
905 if (hdsp->io_type == H9632) return 128000;
907 case HDSP_spdifFrequency176_4KHz:
908 if (hdsp->io_type == H9632) return 176400;
910 case HDSP_spdifFrequency192KHz:
911 if (hdsp->io_type == H9632) return 192000;
916 snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
920 static void hdsp_compute_period_size(struct hdsp *hdsp)
922 hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
925 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
929 position = hdsp_read(hdsp, HDSP_statusRegister);
931 if (!hdsp->precise_ptr)
932 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
934 position &= HDSP_BufferPositionMask;
936 position &= (hdsp->period_bytes/2) - 1;
940 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
942 hdsp_write (hdsp, HDSP_resetPointer, 0);
945 static void hdsp_start_audio(struct hdsp *s)
947 s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
948 hdsp_write(s, HDSP_controlRegister, s->control_register);
951 static void hdsp_stop_audio(struct hdsp *s)
953 s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
954 hdsp_write(s, HDSP_controlRegister, s->control_register);
957 static void hdsp_silence_playback(struct hdsp *hdsp)
959 memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
962 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
966 spin_lock_irq(&s->lock);
975 s->control_register &= ~HDSP_LatencyMask;
976 s->control_register |= hdsp_encode_latency(n);
978 hdsp_write(s, HDSP_controlRegister, s->control_register);
980 hdsp_compute_period_size(s);
982 spin_unlock_irq(&s->lock);
987 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
989 int reject_if_open = 0;
993 /* ASSUMPTION: hdsp->lock is either held, or
994 there is no need for it (e.g. during module
998 if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
999 if (called_internally) {
1000 /* request from ctl or card initialization */
1001 snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1004 /* hw_param request while in AutoSync mode */
1005 int external_freq = hdsp_external_sample_rate(hdsp);
1006 int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1008 if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1009 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1010 else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1011 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1012 else if (rate != external_freq) {
1013 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1019 current_rate = hdsp->system_sample_rate;
1021 /* Changing from a "single speed" to a "double speed" rate is
1022 not allowed if any substreams are open. This is because
1023 such a change causes a shift in the location of
1024 the DMA buffers and a reduction in the number of available
1027 Note that a similar but essentially insoluble problem
1028 exists for externally-driven rate changes. All we can do
1029 is to flag rate changes in the read/write routines. */
1031 if (rate > 96000 && hdsp->io_type != H9632)
1036 if (current_rate > 48000)
1038 rate_bits = HDSP_Frequency32KHz;
1041 if (current_rate > 48000)
1043 rate_bits = HDSP_Frequency44_1KHz;
1046 if (current_rate > 48000)
1048 rate_bits = HDSP_Frequency48KHz;
1051 if (current_rate <= 48000 || current_rate > 96000)
1053 rate_bits = HDSP_Frequency64KHz;
1056 if (current_rate <= 48000 || current_rate > 96000)
1058 rate_bits = HDSP_Frequency88_2KHz;
1061 if (current_rate <= 48000 || current_rate > 96000)
1063 rate_bits = HDSP_Frequency96KHz;
1066 if (current_rate < 128000)
1068 rate_bits = HDSP_Frequency128KHz;
1071 if (current_rate < 128000)
1073 rate_bits = HDSP_Frequency176_4KHz;
1076 if (current_rate < 128000)
1078 rate_bits = HDSP_Frequency192KHz;
1084 if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1085 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1087 hdsp->playback_pid);
1091 hdsp->control_register &= ~HDSP_FrequencyMask;
1092 hdsp->control_register |= rate_bits;
1093 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1095 if (rate >= 128000) {
1096 hdsp->channel_map = channel_map_H9632_qs;
1097 } else if (rate > 48000) {
1098 if (hdsp->io_type == H9632)
1099 hdsp->channel_map = channel_map_H9632_ds;
1101 hdsp->channel_map = channel_map_ds;
1103 switch (hdsp->io_type) {
1105 hdsp->channel_map = channel_map_mf_ss;
1109 hdsp->channel_map = channel_map_df_ss;
1112 hdsp->channel_map = channel_map_H9632_ss;
1115 /* should never happen */
1120 hdsp->system_sample_rate = rate;
1125 /*----------------------------------------------------------------------------
1127 ----------------------------------------------------------------------------*/
1129 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1131 /* the hardware already does the relevant bit-mask with 0xff */
1133 return hdsp_read(hdsp, HDSP_midiDataIn1);
1135 return hdsp_read(hdsp, HDSP_midiDataIn0);
1138 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1140 /* the hardware already does the relevant bit-mask with 0xff */
1142 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1144 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1147 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1150 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1152 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1155 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1157 int fifo_bytes_used;
1160 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1162 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1164 if (fifo_bytes_used < 128)
1165 return 128 - fifo_bytes_used;
1170 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1172 while (snd_hdsp_midi_input_available (hdsp, id))
1173 snd_hdsp_midi_read_byte (hdsp, id);
1176 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1178 unsigned long flags;
1182 unsigned char buf[128];
1184 /* Output is not interrupt driven */
1186 spin_lock_irqsave (&hmidi->lock, flags);
1187 if (hmidi->output) {
1188 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1189 if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1190 if (n_pending > (int)sizeof (buf))
1191 n_pending = sizeof (buf);
1193 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1194 for (i = 0; i < to_write; ++i)
1195 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1200 spin_unlock_irqrestore (&hmidi->lock, flags);
1204 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1206 unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1207 unsigned long flags;
1211 spin_lock_irqsave (&hmidi->lock, flags);
1212 if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1214 if (n_pending > (int)sizeof (buf))
1215 n_pending = sizeof (buf);
1216 for (i = 0; i < n_pending; ++i)
1217 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1219 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1221 /* flush the MIDI input FIFO */
1223 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1228 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1230 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1231 hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1232 spin_unlock_irqrestore (&hmidi->lock, flags);
1233 return snd_hdsp_midi_output_write (hmidi);
1236 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1239 struct hdsp_midi *hmidi;
1240 unsigned long flags;
1243 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1245 ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1246 spin_lock_irqsave (&hdsp->lock, flags);
1248 if (!(hdsp->control_register & ie)) {
1249 snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1250 hdsp->control_register |= ie;
1253 hdsp->control_register &= ~ie;
1254 tasklet_kill(&hdsp->midi_tasklet);
1257 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1258 spin_unlock_irqrestore (&hdsp->lock, flags);
1261 static void snd_hdsp_midi_output_timer(unsigned long data)
1263 struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1264 unsigned long flags;
1266 snd_hdsp_midi_output_write(hmidi);
1267 spin_lock_irqsave (&hmidi->lock, flags);
1269 /* this does not bump hmidi->istimer, because the
1270 kernel automatically removed the timer when it
1271 expired, and we are now adding it back, thus
1272 leaving istimer wherever it was set before.
1275 if (hmidi->istimer) {
1276 hmidi->timer.expires = 1 + jiffies;
1277 add_timer(&hmidi->timer);
1280 spin_unlock_irqrestore (&hmidi->lock, flags);
1283 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1285 struct hdsp_midi *hmidi;
1286 unsigned long flags;
1288 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1289 spin_lock_irqsave (&hmidi->lock, flags);
1291 if (!hmidi->istimer) {
1292 init_timer(&hmidi->timer);
1293 hmidi->timer.function = snd_hdsp_midi_output_timer;
1294 hmidi->timer.data = (unsigned long) hmidi;
1295 hmidi->timer.expires = 1 + jiffies;
1296 add_timer(&hmidi->timer);
1300 if (hmidi->istimer && --hmidi->istimer <= 0)
1301 del_timer (&hmidi->timer);
1303 spin_unlock_irqrestore (&hmidi->lock, flags);
1305 snd_hdsp_midi_output_write(hmidi);
1308 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1310 struct hdsp_midi *hmidi;
1312 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1313 spin_lock_irq (&hmidi->lock);
1314 snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1315 hmidi->input = substream;
1316 spin_unlock_irq (&hmidi->lock);
1321 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1323 struct hdsp_midi *hmidi;
1325 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1326 spin_lock_irq (&hmidi->lock);
1327 hmidi->output = substream;
1328 spin_unlock_irq (&hmidi->lock);
1333 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1335 struct hdsp_midi *hmidi;
1337 snd_hdsp_midi_input_trigger (substream, 0);
1339 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1340 spin_lock_irq (&hmidi->lock);
1341 hmidi->input = NULL;
1342 spin_unlock_irq (&hmidi->lock);
1347 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1349 struct hdsp_midi *hmidi;
1351 snd_hdsp_midi_output_trigger (substream, 0);
1353 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1354 spin_lock_irq (&hmidi->lock);
1355 hmidi->output = NULL;
1356 spin_unlock_irq (&hmidi->lock);
1361 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1363 .open = snd_hdsp_midi_output_open,
1364 .close = snd_hdsp_midi_output_close,
1365 .trigger = snd_hdsp_midi_output_trigger,
1368 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1370 .open = snd_hdsp_midi_input_open,
1371 .close = snd_hdsp_midi_input_close,
1372 .trigger = snd_hdsp_midi_input_trigger,
1375 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1379 hdsp->midi[id].id = id;
1380 hdsp->midi[id].rmidi = NULL;
1381 hdsp->midi[id].input = NULL;
1382 hdsp->midi[id].output = NULL;
1383 hdsp->midi[id].hdsp = hdsp;
1384 hdsp->midi[id].istimer = 0;
1385 hdsp->midi[id].pending = 0;
1386 spin_lock_init (&hdsp->midi[id].lock);
1388 sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1389 if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1392 sprintf (hdsp->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1);
1393 hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1395 snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1396 snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1398 hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1399 SNDRV_RAWMIDI_INFO_INPUT |
1400 SNDRV_RAWMIDI_INFO_DUPLEX;
1405 /*-----------------------------------------------------------------------------
1407 ----------------------------------------------------------------------------*/
1409 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1412 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1413 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1414 if (val & HDSP_SPDIFProfessional)
1415 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1417 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1421 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1423 aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1424 ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1425 if (val & HDSP_SPDIFProfessional)
1426 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1428 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1431 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1433 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1438 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1440 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1442 snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1446 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1448 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1452 val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1453 spin_lock_irq(&hdsp->lock);
1454 change = val != hdsp->creg_spdif;
1455 hdsp->creg_spdif = val;
1456 spin_unlock_irq(&hdsp->lock);
1460 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1462 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1467 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1469 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1471 snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1475 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1477 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1481 val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1482 spin_lock_irq(&hdsp->lock);
1483 change = val != hdsp->creg_spdif_stream;
1484 hdsp->creg_spdif_stream = val;
1485 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1486 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1487 spin_unlock_irq(&hdsp->lock);
1491 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1493 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1498 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1500 ucontrol->value.iec958.status[0] = kcontrol->private_value;
1504 #define HDSP_SPDIF_IN(xname, xindex) \
1505 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1508 .info = snd_hdsp_info_spdif_in, \
1509 .get = snd_hdsp_get_spdif_in, \
1510 .put = snd_hdsp_put_spdif_in }
1512 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1514 return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1517 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1519 hdsp->control_register &= ~HDSP_SPDIFInputMask;
1520 hdsp->control_register |= hdsp_encode_spdif_in(in);
1521 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1525 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1527 static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1528 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1530 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1532 uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1533 if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1534 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1535 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1539 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1541 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1543 ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1547 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1549 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1553 if (!snd_hdsp_use_is_exclusive(hdsp))
1555 val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1556 spin_lock_irq(&hdsp->lock);
1557 change = val != hdsp_spdif_in(hdsp);
1559 hdsp_set_spdif_input(hdsp, val);
1560 spin_unlock_irq(&hdsp->lock);
1564 #define HDSP_SPDIF_OUT(xname, xindex) \
1565 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1566 .info = snd_hdsp_info_spdif_bits, \
1567 .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1569 static int hdsp_spdif_out(struct hdsp *hdsp)
1571 return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1574 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1577 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1579 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1580 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1584 static int snd_hdsp_info_spdif_bits(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1586 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1588 uinfo->value.integer.min = 0;
1589 uinfo->value.integer.max = 1;
1593 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1595 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1597 ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1601 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1603 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1607 if (!snd_hdsp_use_is_exclusive(hdsp))
1609 val = ucontrol->value.integer.value[0] & 1;
1610 spin_lock_irq(&hdsp->lock);
1611 change = (int)val != hdsp_spdif_out(hdsp);
1612 hdsp_set_spdif_output(hdsp, val);
1613 spin_unlock_irq(&hdsp->lock);
1617 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1618 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1619 .info = snd_hdsp_info_spdif_bits, \
1620 .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1622 static int hdsp_spdif_professional(struct hdsp *hdsp)
1624 return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1627 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1630 hdsp->control_register |= HDSP_SPDIFProfessional;
1632 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1633 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1637 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1639 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1641 ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1645 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1647 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1651 if (!snd_hdsp_use_is_exclusive(hdsp))
1653 val = ucontrol->value.integer.value[0] & 1;
1654 spin_lock_irq(&hdsp->lock);
1655 change = (int)val != hdsp_spdif_professional(hdsp);
1656 hdsp_set_spdif_professional(hdsp, val);
1657 spin_unlock_irq(&hdsp->lock);
1661 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1662 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1663 .info = snd_hdsp_info_spdif_bits, \
1664 .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1666 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1668 return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1671 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1674 hdsp->control_register |= HDSP_SPDIFEmphasis;
1676 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1677 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1681 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1683 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1685 ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1689 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1691 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1695 if (!snd_hdsp_use_is_exclusive(hdsp))
1697 val = ucontrol->value.integer.value[0] & 1;
1698 spin_lock_irq(&hdsp->lock);
1699 change = (int)val != hdsp_spdif_emphasis(hdsp);
1700 hdsp_set_spdif_emphasis(hdsp, val);
1701 spin_unlock_irq(&hdsp->lock);
1705 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1706 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1707 .info = snd_hdsp_info_spdif_bits, \
1708 .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1710 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1712 return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1715 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1718 hdsp->control_register |= HDSP_SPDIFNonAudio;
1720 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1721 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1725 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1727 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1729 ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1733 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1735 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1739 if (!snd_hdsp_use_is_exclusive(hdsp))
1741 val = ucontrol->value.integer.value[0] & 1;
1742 spin_lock_irq(&hdsp->lock);
1743 change = (int)val != hdsp_spdif_nonaudio(hdsp);
1744 hdsp_set_spdif_nonaudio(hdsp, val);
1745 spin_unlock_irq(&hdsp->lock);
1749 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1750 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1753 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1754 .info = snd_hdsp_info_spdif_sample_rate, \
1755 .get = snd_hdsp_get_spdif_sample_rate \
1758 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1760 static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1761 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1763 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1765 uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1766 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1767 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1768 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1772 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1774 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1776 switch (hdsp_spdif_sample_rate(hdsp)) {
1778 ucontrol->value.enumerated.item[0] = 0;
1781 ucontrol->value.enumerated.item[0] = 1;
1784 ucontrol->value.enumerated.item[0] = 2;
1787 ucontrol->value.enumerated.item[0] = 3;
1790 ucontrol->value.enumerated.item[0] = 4;
1793 ucontrol->value.enumerated.item[0] = 5;
1796 ucontrol->value.enumerated.item[0] = 7;
1799 ucontrol->value.enumerated.item[0] = 8;
1802 ucontrol->value.enumerated.item[0] = 9;
1805 ucontrol->value.enumerated.item[0] = 6;
1810 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1811 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1814 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1815 .info = snd_hdsp_info_system_sample_rate, \
1816 .get = snd_hdsp_get_system_sample_rate \
1819 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1821 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1826 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1828 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1830 ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1834 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1835 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1838 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1839 .info = snd_hdsp_info_autosync_sample_rate, \
1840 .get = snd_hdsp_get_autosync_sample_rate \
1843 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1845 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1846 static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1847 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1849 uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1850 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1851 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1852 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1856 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1858 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1860 switch (hdsp_external_sample_rate(hdsp)) {
1862 ucontrol->value.enumerated.item[0] = 0;
1865 ucontrol->value.enumerated.item[0] = 1;
1868 ucontrol->value.enumerated.item[0] = 2;
1871 ucontrol->value.enumerated.item[0] = 3;
1874 ucontrol->value.enumerated.item[0] = 4;
1877 ucontrol->value.enumerated.item[0] = 5;
1880 ucontrol->value.enumerated.item[0] = 7;
1883 ucontrol->value.enumerated.item[0] = 8;
1886 ucontrol->value.enumerated.item[0] = 9;
1889 ucontrol->value.enumerated.item[0] = 6;
1894 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1895 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1898 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1899 .info = snd_hdsp_info_system_clock_mode, \
1900 .get = snd_hdsp_get_system_clock_mode \
1903 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1905 if (hdsp->control_register & HDSP_ClockModeMaster)
1907 else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1912 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1914 static char *texts[] = {"Master", "Slave" };
1916 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1918 uinfo->value.enumerated.items = 2;
1919 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1920 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1921 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1925 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1927 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1929 ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
1933 #define HDSP_CLOCK_SOURCE(xname, xindex) \
1934 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1937 .info = snd_hdsp_info_clock_source, \
1938 .get = snd_hdsp_get_clock_source, \
1939 .put = snd_hdsp_put_clock_source \
1942 static int hdsp_clock_source(struct hdsp *hdsp)
1944 if (hdsp->control_register & HDSP_ClockModeMaster) {
1945 switch (hdsp->system_sample_rate) {
1972 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
1976 case HDSP_CLOCK_SOURCE_AUTOSYNC:
1977 if (hdsp_external_sample_rate(hdsp) != 0) {
1978 if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
1979 hdsp->control_register &= ~HDSP_ClockModeMaster;
1980 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1985 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
1988 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
1991 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
1994 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
1997 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2000 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2003 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2006 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2009 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2015 hdsp->control_register |= HDSP_ClockModeMaster;
2016 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2017 hdsp_set_rate(hdsp, rate, 1);
2021 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2023 static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2024 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2026 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2028 if (hdsp->io_type == H9632)
2029 uinfo->value.enumerated.items = 10;
2031 uinfo->value.enumerated.items = 7;
2032 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2033 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2034 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2038 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2040 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2042 ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2046 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2048 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2052 if (!snd_hdsp_use_is_exclusive(hdsp))
2054 val = ucontrol->value.enumerated.item[0];
2055 if (val < 0) val = 0;
2056 if (hdsp->io_type == H9632) {
2063 spin_lock_irq(&hdsp->lock);
2064 if (val != hdsp_clock_source(hdsp))
2065 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2068 spin_unlock_irq(&hdsp->lock);
2072 static int snd_hdsp_info_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2074 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2076 uinfo->value.integer.min = 0;
2077 uinfo->value.integer.max = 1;
2081 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2083 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2085 ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2089 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2091 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2094 change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2096 hdsp->clock_source_locked = ucontrol->value.integer.value[0];
2100 #define HDSP_DA_GAIN(xname, xindex) \
2101 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2104 .info = snd_hdsp_info_da_gain, \
2105 .get = snd_hdsp_get_da_gain, \
2106 .put = snd_hdsp_put_da_gain \
2109 static int hdsp_da_gain(struct hdsp *hdsp)
2111 switch (hdsp->control_register & HDSP_DAGainMask) {
2112 case HDSP_DAGainHighGain:
2114 case HDSP_DAGainPlus4dBu:
2116 case HDSP_DAGainMinus10dBV:
2123 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2125 hdsp->control_register &= ~HDSP_DAGainMask;
2128 hdsp->control_register |= HDSP_DAGainHighGain;
2131 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2134 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2140 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2144 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2146 static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2148 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2150 uinfo->value.enumerated.items = 3;
2151 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2152 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2153 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2157 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2159 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2161 ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2165 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2167 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2171 if (!snd_hdsp_use_is_exclusive(hdsp))
2173 val = ucontrol->value.enumerated.item[0];
2174 if (val < 0) val = 0;
2175 if (val > 2) val = 2;
2176 spin_lock_irq(&hdsp->lock);
2177 if (val != hdsp_da_gain(hdsp))
2178 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2181 spin_unlock_irq(&hdsp->lock);
2185 #define HDSP_AD_GAIN(xname, xindex) \
2186 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2189 .info = snd_hdsp_info_ad_gain, \
2190 .get = snd_hdsp_get_ad_gain, \
2191 .put = snd_hdsp_put_ad_gain \
2194 static int hdsp_ad_gain(struct hdsp *hdsp)
2196 switch (hdsp->control_register & HDSP_ADGainMask) {
2197 case HDSP_ADGainMinus10dBV:
2199 case HDSP_ADGainPlus4dBu:
2201 case HDSP_ADGainLowGain:
2208 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2210 hdsp->control_register &= ~HDSP_ADGainMask;
2213 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2216 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2219 hdsp->control_register |= HDSP_ADGainLowGain;
2225 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2229 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2231 static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2233 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2235 uinfo->value.enumerated.items = 3;
2236 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2237 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2238 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2242 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2244 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2246 ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2250 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2252 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2256 if (!snd_hdsp_use_is_exclusive(hdsp))
2258 val = ucontrol->value.enumerated.item[0];
2259 if (val < 0) val = 0;
2260 if (val > 2) val = 2;
2261 spin_lock_irq(&hdsp->lock);
2262 if (val != hdsp_ad_gain(hdsp))
2263 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2266 spin_unlock_irq(&hdsp->lock);
2270 #define HDSP_PHONE_GAIN(xname, xindex) \
2271 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2274 .info = snd_hdsp_info_phone_gain, \
2275 .get = snd_hdsp_get_phone_gain, \
2276 .put = snd_hdsp_put_phone_gain \
2279 static int hdsp_phone_gain(struct hdsp *hdsp)
2281 switch (hdsp->control_register & HDSP_PhoneGainMask) {
2282 case HDSP_PhoneGain0dB:
2284 case HDSP_PhoneGainMinus6dB:
2286 case HDSP_PhoneGainMinus12dB:
2293 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2295 hdsp->control_register &= ~HDSP_PhoneGainMask;
2298 hdsp->control_register |= HDSP_PhoneGain0dB;
2301 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2304 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2310 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2314 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2316 static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2318 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2320 uinfo->value.enumerated.items = 3;
2321 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2322 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2323 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2327 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2329 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2331 ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2335 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2337 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2341 if (!snd_hdsp_use_is_exclusive(hdsp))
2343 val = ucontrol->value.enumerated.item[0];
2344 if (val < 0) val = 0;
2345 if (val > 2) val = 2;
2346 spin_lock_irq(&hdsp->lock);
2347 if (val != hdsp_phone_gain(hdsp))
2348 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2351 spin_unlock_irq(&hdsp->lock);
2355 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2356 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2359 .info = snd_hdsp_info_xlr_breakout_cable, \
2360 .get = snd_hdsp_get_xlr_breakout_cable, \
2361 .put = snd_hdsp_put_xlr_breakout_cable \
2364 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2366 if (hdsp->control_register & HDSP_XLRBreakoutCable)
2371 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2374 hdsp->control_register |= HDSP_XLRBreakoutCable;
2376 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2377 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2381 static int snd_hdsp_info_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2383 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2385 uinfo->value.integer.min = 0;
2386 uinfo->value.integer.max = 1;
2390 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2392 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2394 ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2398 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2400 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2404 if (!snd_hdsp_use_is_exclusive(hdsp))
2406 val = ucontrol->value.integer.value[0] & 1;
2407 spin_lock_irq(&hdsp->lock);
2408 change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2409 hdsp_set_xlr_breakout_cable(hdsp, val);
2410 spin_unlock_irq(&hdsp->lock);
2414 /* (De)activates old RME Analog Extension Board
2415 These are connected to the internal ADAT connector
2416 Switching this on desactivates external ADAT
2418 #define HDSP_AEB(xname, xindex) \
2419 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2422 .info = snd_hdsp_info_aeb, \
2423 .get = snd_hdsp_get_aeb, \
2424 .put = snd_hdsp_put_aeb \
2427 static int hdsp_aeb(struct hdsp *hdsp)
2429 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2434 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2437 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2439 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2440 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2444 static int snd_hdsp_info_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2446 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2448 uinfo->value.integer.min = 0;
2449 uinfo->value.integer.max = 1;
2453 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2455 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2457 ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2461 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2463 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2467 if (!snd_hdsp_use_is_exclusive(hdsp))
2469 val = ucontrol->value.integer.value[0] & 1;
2470 spin_lock_irq(&hdsp->lock);
2471 change = (int)val != hdsp_aeb(hdsp);
2472 hdsp_set_aeb(hdsp, val);
2473 spin_unlock_irq(&hdsp->lock);
2477 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2478 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2481 .info = snd_hdsp_info_pref_sync_ref, \
2482 .get = snd_hdsp_get_pref_sync_ref, \
2483 .put = snd_hdsp_put_pref_sync_ref \
2486 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2488 /* Notice that this looks at the requested sync source,
2489 not the one actually in use.
2492 switch (hdsp->control_register & HDSP_SyncRefMask) {
2493 case HDSP_SyncRef_ADAT1:
2494 return HDSP_SYNC_FROM_ADAT1;
2495 case HDSP_SyncRef_ADAT2:
2496 return HDSP_SYNC_FROM_ADAT2;
2497 case HDSP_SyncRef_ADAT3:
2498 return HDSP_SYNC_FROM_ADAT3;
2499 case HDSP_SyncRef_SPDIF:
2500 return HDSP_SYNC_FROM_SPDIF;
2501 case HDSP_SyncRef_WORD:
2502 return HDSP_SYNC_FROM_WORD;
2503 case HDSP_SyncRef_ADAT_SYNC:
2504 return HDSP_SYNC_FROM_ADAT_SYNC;
2506 return HDSP_SYNC_FROM_WORD;
2511 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2513 hdsp->control_register &= ~HDSP_SyncRefMask;
2515 case HDSP_SYNC_FROM_ADAT1:
2516 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2518 case HDSP_SYNC_FROM_ADAT2:
2519 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2521 case HDSP_SYNC_FROM_ADAT3:
2522 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2524 case HDSP_SYNC_FROM_SPDIF:
2525 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2527 case HDSP_SYNC_FROM_WORD:
2528 hdsp->control_register |= HDSP_SyncRef_WORD;
2530 case HDSP_SYNC_FROM_ADAT_SYNC:
2531 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2536 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2540 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2542 static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2543 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2545 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2548 switch (hdsp->io_type) {
2551 uinfo->value.enumerated.items = 6;
2554 uinfo->value.enumerated.items = 4;
2557 uinfo->value.enumerated.items = 3;
2560 uinfo->value.enumerated.items = 0;
2564 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2565 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2566 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2570 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2572 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2574 ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2578 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2580 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2584 if (!snd_hdsp_use_is_exclusive(hdsp))
2587 switch (hdsp->io_type) {
2602 val = ucontrol->value.enumerated.item[0] % max;
2603 spin_lock_irq(&hdsp->lock);
2604 change = (int)val != hdsp_pref_sync_ref(hdsp);
2605 hdsp_set_pref_sync_ref(hdsp, val);
2606 spin_unlock_irq(&hdsp->lock);
2610 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2611 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2614 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2615 .info = snd_hdsp_info_autosync_ref, \
2616 .get = snd_hdsp_get_autosync_ref, \
2619 static int hdsp_autosync_ref(struct hdsp *hdsp)
2621 /* This looks at the autosync selected sync reference */
2622 unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2624 switch (status2 & HDSP_SelSyncRefMask) {
2625 case HDSP_SelSyncRef_WORD:
2626 return HDSP_AUTOSYNC_FROM_WORD;
2627 case HDSP_SelSyncRef_ADAT_SYNC:
2628 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2629 case HDSP_SelSyncRef_SPDIF:
2630 return HDSP_AUTOSYNC_FROM_SPDIF;
2631 case HDSP_SelSyncRefMask:
2632 return HDSP_AUTOSYNC_FROM_NONE;
2633 case HDSP_SelSyncRef_ADAT1:
2634 return HDSP_AUTOSYNC_FROM_ADAT1;
2635 case HDSP_SelSyncRef_ADAT2:
2636 return HDSP_AUTOSYNC_FROM_ADAT2;
2637 case HDSP_SelSyncRef_ADAT3:
2638 return HDSP_AUTOSYNC_FROM_ADAT3;
2640 return HDSP_AUTOSYNC_FROM_WORD;
2645 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2647 static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2649 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2651 uinfo->value.enumerated.items = 7;
2652 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2653 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2654 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2658 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2660 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2662 ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2666 #define HDSP_LINE_OUT(xname, xindex) \
2667 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2670 .info = snd_hdsp_info_line_out, \
2671 .get = snd_hdsp_get_line_out, \
2672 .put = snd_hdsp_put_line_out \
2675 static int hdsp_line_out(struct hdsp *hdsp)
2677 return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2680 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2683 hdsp->control_register |= HDSP_LineOut;
2685 hdsp->control_register &= ~HDSP_LineOut;
2686 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2690 static int snd_hdsp_info_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2692 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2694 uinfo->value.integer.min = 0;
2695 uinfo->value.integer.max = 1;
2699 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2701 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2703 spin_lock_irq(&hdsp->lock);
2704 ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2705 spin_unlock_irq(&hdsp->lock);
2709 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2711 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2715 if (!snd_hdsp_use_is_exclusive(hdsp))
2717 val = ucontrol->value.integer.value[0] & 1;
2718 spin_lock_irq(&hdsp->lock);
2719 change = (int)val != hdsp_line_out(hdsp);
2720 hdsp_set_line_output(hdsp, val);
2721 spin_unlock_irq(&hdsp->lock);
2725 #define HDSP_PRECISE_POINTER(xname, xindex) \
2726 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2729 .info = snd_hdsp_info_precise_pointer, \
2730 .get = snd_hdsp_get_precise_pointer, \
2731 .put = snd_hdsp_put_precise_pointer \
2734 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2737 hdsp->precise_ptr = 1;
2739 hdsp->precise_ptr = 0;
2743 static int snd_hdsp_info_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2745 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2747 uinfo->value.integer.min = 0;
2748 uinfo->value.integer.max = 1;
2752 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2754 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2756 spin_lock_irq(&hdsp->lock);
2757 ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2758 spin_unlock_irq(&hdsp->lock);
2762 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2764 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2768 if (!snd_hdsp_use_is_exclusive(hdsp))
2770 val = ucontrol->value.integer.value[0] & 1;
2771 spin_lock_irq(&hdsp->lock);
2772 change = (int)val != hdsp->precise_ptr;
2773 hdsp_set_precise_pointer(hdsp, val);
2774 spin_unlock_irq(&hdsp->lock);
2778 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2779 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2782 .info = snd_hdsp_info_use_midi_tasklet, \
2783 .get = snd_hdsp_get_use_midi_tasklet, \
2784 .put = snd_hdsp_put_use_midi_tasklet \
2787 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2790 hdsp->use_midi_tasklet = 1;
2792 hdsp->use_midi_tasklet = 0;
2796 static int snd_hdsp_info_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2798 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2800 uinfo->value.integer.min = 0;
2801 uinfo->value.integer.max = 1;
2805 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2807 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2809 spin_lock_irq(&hdsp->lock);
2810 ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2811 spin_unlock_irq(&hdsp->lock);
2815 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2817 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2821 if (!snd_hdsp_use_is_exclusive(hdsp))
2823 val = ucontrol->value.integer.value[0] & 1;
2824 spin_lock_irq(&hdsp->lock);
2825 change = (int)val != hdsp->use_midi_tasklet;
2826 hdsp_set_use_midi_tasklet(hdsp, val);
2827 spin_unlock_irq(&hdsp->lock);
2831 #define HDSP_MIXER(xname, xindex) \
2832 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2836 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2837 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2838 .info = snd_hdsp_info_mixer, \
2839 .get = snd_hdsp_get_mixer, \
2840 .put = snd_hdsp_put_mixer \
2843 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2845 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2847 uinfo->value.integer.min = 0;
2848 uinfo->value.integer.max = 65536;
2849 uinfo->value.integer.step = 1;
2853 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2855 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2860 source = ucontrol->value.integer.value[0];
2861 destination = ucontrol->value.integer.value[1];
2863 if (source >= hdsp->max_channels)
2864 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2866 addr = hdsp_input_to_output_key(hdsp,source, destination);
2868 spin_lock_irq(&hdsp->lock);
2869 ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2870 spin_unlock_irq(&hdsp->lock);
2874 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2876 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2883 if (!snd_hdsp_use_is_exclusive(hdsp))
2886 source = ucontrol->value.integer.value[0];
2887 destination = ucontrol->value.integer.value[1];
2889 if (source >= hdsp->max_channels)
2890 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2892 addr = hdsp_input_to_output_key(hdsp,source, destination);
2894 gain = ucontrol->value.integer.value[2];
2896 spin_lock_irq(&hdsp->lock);
2897 change = gain != hdsp_read_gain(hdsp, addr);
2899 hdsp_write_gain(hdsp, addr, gain);
2900 spin_unlock_irq(&hdsp->lock);
2904 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2905 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2908 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2909 .info = snd_hdsp_info_sync_check, \
2910 .get = snd_hdsp_get_wc_sync_check \
2913 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2915 static char *texts[] = {"No Lock", "Lock", "Sync" };
2916 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2918 uinfo->value.enumerated.items = 3;
2919 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2920 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2921 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2925 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2927 int status2 = hdsp_read(hdsp, HDSP_status2Register);
2928 if (status2 & HDSP_wc_lock) {
2929 if (status2 & HDSP_wc_sync)
2938 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2940 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2942 ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2946 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2947 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2950 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2951 .info = snd_hdsp_info_sync_check, \
2952 .get = snd_hdsp_get_spdif_sync_check \
2955 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2957 int status = hdsp_read(hdsp, HDSP_statusRegister);
2958 if (status & HDSP_SPDIFErrorFlag)
2961 if (status & HDSP_SPDIFSync)
2969 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2971 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2973 ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
2977 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
2978 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2981 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2982 .info = snd_hdsp_info_sync_check, \
2983 .get = snd_hdsp_get_adatsync_sync_check \
2986 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
2988 int status = hdsp_read(hdsp, HDSP_statusRegister);
2989 if (status & HDSP_TimecodeLock) {
2990 if (status & HDSP_TimecodeSync)
2998 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3000 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3002 ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3006 #define HDSP_ADAT_SYNC_CHECK \
3007 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3008 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3009 .info = snd_hdsp_info_sync_check, \
3010 .get = snd_hdsp_get_adat_sync_check \
3013 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3015 int status = hdsp_read(hdsp, HDSP_statusRegister);
3017 if (status & (HDSP_Lock0>>idx)) {
3018 if (status & (HDSP_Sync0>>idx))
3026 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3029 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3031 offset = ucontrol->id.index - 1;
3032 snd_assert(offset >= 0);
3034 switch (hdsp->io_type) {
3049 ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3053 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3054 HDSP_DA_GAIN("DA Gain", 0),
3055 HDSP_AD_GAIN("AD Gain", 0),
3056 HDSP_PHONE_GAIN("Phones Gain", 0),
3057 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0)
3060 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3062 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3063 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3064 .info = snd_hdsp_control_spdif_info,
3065 .get = snd_hdsp_control_spdif_get,
3066 .put = snd_hdsp_control_spdif_put,
3069 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3070 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3071 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3072 .info = snd_hdsp_control_spdif_stream_info,
3073 .get = snd_hdsp_control_spdif_stream_get,
3074 .put = snd_hdsp_control_spdif_stream_put,
3077 .access = SNDRV_CTL_ELEM_ACCESS_READ,
3078 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3079 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3080 .info = snd_hdsp_control_spdif_mask_info,
3081 .get = snd_hdsp_control_spdif_mask_get,
3082 .private_value = IEC958_AES0_NONAUDIO |
3083 IEC958_AES0_PROFESSIONAL |
3084 IEC958_AES0_CON_EMPHASIS,
3087 .access = SNDRV_CTL_ELEM_ACCESS_READ,
3088 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3089 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3090 .info = snd_hdsp_control_spdif_mask_info,
3091 .get = snd_hdsp_control_spdif_mask_get,
3092 .private_value = IEC958_AES0_NONAUDIO |
3093 IEC958_AES0_PROFESSIONAL |
3094 IEC958_AES0_PRO_EMPHASIS,
3096 HDSP_MIXER("Mixer", 0),
3097 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3098 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3099 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3100 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3101 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3102 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3103 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3105 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3106 .name = "Sample Clock Source Locking",
3107 .info = snd_hdsp_info_clock_source_lock,
3108 .get = snd_hdsp_get_clock_source_lock,
3109 .put = snd_hdsp_put_clock_source_lock,
3111 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3112 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3113 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3114 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3115 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3116 /* 'External Rate' complies with the alsa control naming scheme */
3117 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3118 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3119 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3120 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3121 HDSP_LINE_OUT("Line Out", 0),
3122 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3123 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3126 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3127 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3129 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3133 struct snd_kcontrol *kctl;
3135 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3136 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3138 if (idx == 1) /* IEC958 (S/PDIF) Stream */
3139 hdsp->spdif_ctl = kctl;
3142 /* ADAT SyncCheck status */
3143 snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3144 snd_hdsp_adat_sync_check.index = 1;
3145 if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3147 if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3148 for (idx = 1; idx < 3; ++idx) {
3149 snd_hdsp_adat_sync_check.index = idx+1;
3150 if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3155 /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3156 if (hdsp->io_type == H9632) {
3157 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3158 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3163 /* AEB control for H96xx card */
3164 if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3165 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3172 /*------------------------------------------------------------
3174 ------------------------------------------------------------*/
3177 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3179 struct hdsp *hdsp = (struct hdsp *) entry->private_data;
3180 unsigned int status;
3181 unsigned int status2;
3182 char *pref_sync_ref;
3184 char *system_clock_mode;
3188 if (hdsp_check_for_iobox (hdsp)) {
3189 snd_iprintf(buffer, "No I/O box connected.\nPlease connect one and upload firmware.\n");
3193 if (hdsp_check_for_firmware(hdsp, 0)) {
3194 if (hdsp->state & HDSP_FirmwareCached) {
3195 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3196 snd_iprintf(buffer, "Firmware loading from cache failed, please upload manually.\n");
3201 #ifdef HDSP_FW_LOADER
3202 err = hdsp_request_fw_loader(hdsp);
3206 "No firmware loaded nor cached, "
3207 "please upload firmware.\n");
3213 status = hdsp_read(hdsp, HDSP_statusRegister);
3214 status2 = hdsp_read(hdsp, HDSP_status2Register);
3216 snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name, hdsp->card->number + 1);
3217 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3218 hdsp->capture_buffer, hdsp->playback_buffer);
3219 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3220 hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3221 snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3222 snd_iprintf(buffer, "Control2 register: 0x%x\n", hdsp->control2_register);
3223 snd_iprintf(buffer, "Status register: 0x%x\n", status);
3224 snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3225 snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3226 snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3227 snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3228 snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3229 snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3230 snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3232 snd_iprintf(buffer, "\n");
3234 x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3236 snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3237 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3238 snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3239 snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3241 snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3243 snd_iprintf(buffer, "\n");
3246 switch (hdsp_clock_source(hdsp)) {
3247 case HDSP_CLOCK_SOURCE_AUTOSYNC:
3248 clock_source = "AutoSync";
3250 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3251 clock_source = "Internal 32 kHz";
3253 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3254 clock_source = "Internal 44.1 kHz";
3256 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3257 clock_source = "Internal 48 kHz";
3259 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3260 clock_source = "Internal 64 kHz";
3262 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3263 clock_source = "Internal 88.2 kHz";
3265 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3266 clock_source = "Internal 96 kHz";
3268 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3269 clock_source = "Internal 128 kHz";
3271 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3272 clock_source = "Internal 176.4 kHz";
3274 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3275 clock_source = "Internal 192 kHz";
3278 clock_source = "Error";
3280 snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3282 if (hdsp_system_clock_mode(hdsp))
3283 system_clock_mode = "Slave";
3285 system_clock_mode = "Master";
3287 switch (hdsp_pref_sync_ref (hdsp)) {
3288 case HDSP_SYNC_FROM_WORD:
3289 pref_sync_ref = "Word Clock";
3291 case HDSP_SYNC_FROM_ADAT_SYNC:
3292 pref_sync_ref = "ADAT Sync";
3294 case HDSP_SYNC_FROM_SPDIF:
3295 pref_sync_ref = "SPDIF";
3297 case HDSP_SYNC_FROM_ADAT1:
3298 pref_sync_ref = "ADAT1";
3300 case HDSP_SYNC_FROM_ADAT2:
3301 pref_sync_ref = "ADAT2";
3303 case HDSP_SYNC_FROM_ADAT3:
3304 pref_sync_ref = "ADAT3";
3307 pref_sync_ref = "Word Clock";
3310 snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3312 switch (hdsp_autosync_ref (hdsp)) {
3313 case HDSP_AUTOSYNC_FROM_WORD:
3314 autosync_ref = "Word Clock";
3316 case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3317 autosync_ref = "ADAT Sync";
3319 case HDSP_AUTOSYNC_FROM_SPDIF:
3320 autosync_ref = "SPDIF";
3322 case HDSP_AUTOSYNC_FROM_NONE:
3323 autosync_ref = "None";
3325 case HDSP_AUTOSYNC_FROM_ADAT1:
3326 autosync_ref = "ADAT1";
3328 case HDSP_AUTOSYNC_FROM_ADAT2:
3329 autosync_ref = "ADAT2";
3331 case HDSP_AUTOSYNC_FROM_ADAT3:
3332 autosync_ref = "ADAT3";
3335 autosync_ref = "---";
3338 snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3340 snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3342 snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3344 snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3345 snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3347 snd_iprintf(buffer, "\n");
3349 switch (hdsp_spdif_in(hdsp)) {
3350 case HDSP_SPDIFIN_OPTICAL:
3351 snd_iprintf(buffer, "IEC958 input: Optical\n");
3353 case HDSP_SPDIFIN_COAXIAL:
3354 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3356 case HDSP_SPDIFIN_INTERNAL:
3357 snd_iprintf(buffer, "IEC958 input: Internal\n");
3359 case HDSP_SPDIFIN_AES:
3360 snd_iprintf(buffer, "IEC958 input: AES\n");
3363 snd_iprintf(buffer, "IEC958 input: ???\n");
3367 if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3368 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3370 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3372 if (hdsp->control_register & HDSP_SPDIFProfessional)
3373 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3375 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3377 if (hdsp->control_register & HDSP_SPDIFEmphasis)
3378 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3380 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3382 if (hdsp->control_register & HDSP_SPDIFNonAudio)
3383 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3385 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3386 if ((x = hdsp_spdif_sample_rate (hdsp)) != 0)
3387 snd_iprintf (buffer, "IEC958 sample rate: %d\n", x);
3389 snd_iprintf (buffer, "IEC958 sample rate: Error flag set\n");
3391 snd_iprintf(buffer, "\n");
3394 x = status & HDSP_Sync0;
3395 if (status & HDSP_Lock0)
3396 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3398 snd_iprintf(buffer, "ADAT1: No Lock\n");
3400 switch (hdsp->io_type) {
3403 x = status & HDSP_Sync1;
3404 if (status & HDSP_Lock1)
3405 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3407 snd_iprintf(buffer, "ADAT2: No Lock\n");
3408 x = status & HDSP_Sync2;
3409 if (status & HDSP_Lock2)
3410 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3412 snd_iprintf(buffer, "ADAT3: No Lock\n");
3419 x = status & HDSP_SPDIFSync;
3420 if (status & HDSP_SPDIFErrorFlag)
3421 snd_iprintf (buffer, "SPDIF: No Lock\n");
3423 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3425 x = status2 & HDSP_wc_sync;
3426 if (status2 & HDSP_wc_lock)
3427 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3429 snd_iprintf (buffer, "Word Clock: No Lock\n");
3431 x = status & HDSP_TimecodeSync;
3432 if (status & HDSP_TimecodeLock)
3433 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3435 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3437 snd_iprintf(buffer, "\n");
3439 /* Informations about H9632 specific controls */
3440 if (hdsp->io_type == H9632) {
3443 switch (hdsp_ad_gain(hdsp)) {
3454 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3456 switch (hdsp_da_gain(hdsp)) {
3467 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3469 switch (hdsp_phone_gain(hdsp)) {
3480 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3482 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3484 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3485 snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3487 snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3488 snd_iprintf(buffer, "\n");
3493 static void __devinit snd_hdsp_proc_init(struct hdsp *hdsp)
3495 struct snd_info_entry *entry;
3497 if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3498 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3501 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3503 snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3504 snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3507 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
3509 unsigned long pb_bus, cb_bus;
3511 if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3512 snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3513 if (hdsp->capture_dma_buf.area)
3514 snd_dma_free_pages(&hdsp->capture_dma_buf);
3515 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3519 /* Align to bus-space 64K boundary */
3521 cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3522 pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3524 /* Tell the card where it is */
3526 hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3527 hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3529 hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3530 hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3535 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3539 /* ASSUMPTION: hdsp->lock is either held, or
3540 there is no need to hold it (e.g. during module
3546 SPDIF Input via Coax
3548 maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3549 which implies 2 4096 sample, 32Kbyte periods).
3553 hdsp->control_register = HDSP_ClockModeMaster |
3554 HDSP_SPDIFInputCoaxial |
3555 hdsp_encode_latency(7) |
3559 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3561 #ifdef SNDRV_BIG_ENDIAN
3562 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3564 hdsp->control2_register = 0;
3566 if (hdsp->io_type == H9652)
3567 snd_hdsp_9652_enable_mixer (hdsp);
3569 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3571 hdsp_reset_hw_pointer(hdsp);
3572 hdsp_compute_period_size(hdsp);
3574 /* silence everything */
3576 for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3577 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3579 for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3580 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3584 /* H9632 specific defaults */
3585 if (hdsp->io_type == H9632) {
3586 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3587 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3590 /* set a default rate so that the channel map is set up.
3593 hdsp_set_rate(hdsp, 48000, 1);
3598 static void hdsp_midi_tasklet(unsigned long arg)
3600 struct hdsp *hdsp = (struct hdsp *)arg;
3602 if (hdsp->midi[0].pending)
3603 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3604 if (hdsp->midi[1].pending)
3605 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3608 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3610 struct hdsp *hdsp = (struct hdsp *) dev_id;
3611 unsigned int status;
3615 unsigned int midi0status;
3616 unsigned int midi1status;
3619 status = hdsp_read(hdsp, HDSP_statusRegister);
3621 audio = status & HDSP_audioIRQPending;
3622 midi0 = status & HDSP_midi0IRQPending;
3623 midi1 = status & HDSP_midi1IRQPending;
3625 if (!audio && !midi0 && !midi1)
3628 hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3630 midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3631 midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3634 if (hdsp->capture_substream)
3635 snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3637 if (hdsp->playback_substream)
3638 snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3641 if (midi0 && midi0status) {
3642 if (hdsp->use_midi_tasklet) {
3643 /* we disable interrupts for this input until processing is done */
3644 hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3645 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3646 hdsp->midi[0].pending = 1;
3649 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3652 if (hdsp->io_type != Multiface && hdsp->io_type != H9632 && midi1 && midi1status) {
3653 if (hdsp->use_midi_tasklet) {
3654 /* we disable interrupts for this input until processing is done */
3655 hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3656 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3657 hdsp->midi[1].pending = 1;
3660 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3663 if (hdsp->use_midi_tasklet && schedule)
3664 tasklet_hi_schedule(&hdsp->midi_tasklet);
3668 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3670 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3671 return hdsp_hw_pointer(hdsp);
3674 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3681 snd_assert(channel >= 0 && channel < hdsp->max_channels, return NULL);
3683 if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3686 if (stream == SNDRV_PCM_STREAM_CAPTURE)
3687 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3689 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3692 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3693 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3695 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3698 snd_assert(pos + count <= HDSP_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
3700 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3701 snd_assert(channel_buf != NULL, return -EIO);
3702 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3707 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3708 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3710 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3713 snd_assert(pos + count <= HDSP_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
3715 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3716 snd_assert(channel_buf != NULL, return -EIO);
3717 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
3722 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
3723 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
3725 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3728 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3729 snd_assert(channel_buf != NULL, return -EIO);
3730 memset(channel_buf + pos * 4, 0, count * 4);
3734 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
3736 struct snd_pcm_runtime *runtime = substream->runtime;
3737 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3738 struct snd_pcm_substream *other;
3739 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3740 other = hdsp->capture_substream;
3742 other = hdsp->playback_substream;
3744 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
3746 runtime->status->hw_ptr = 0;
3748 struct list_head *pos;
3749 struct snd_pcm_substream *s;
3750 struct snd_pcm_runtime *oruntime = other->runtime;
3751 snd_pcm_group_for_each(pos, substream) {
3752 s = snd_pcm_group_substream_entry(pos);
3754 oruntime->status->hw_ptr = runtime->status->hw_ptr;
3762 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
3763 struct snd_pcm_hw_params *params)
3765 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3770 if (hdsp_check_for_iobox (hdsp))
3773 if (hdsp_check_for_firmware(hdsp, 1))
3776 spin_lock_irq(&hdsp->lock);
3778 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3779 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
3780 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
3781 this_pid = hdsp->playback_pid;
3782 other_pid = hdsp->capture_pid;
3784 this_pid = hdsp->capture_pid;
3785 other_pid = hdsp->playback_pid;
3788 if ((other_pid > 0) && (this_pid != other_pid)) {
3790 /* The other stream is open, and not by the same
3791 task as this one. Make sure that the parameters
3792 that matter are the same.
3795 if (params_rate(params) != hdsp->system_sample_rate) {
3796 spin_unlock_irq(&hdsp->lock);
3797 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3801 if (params_period_size(params) != hdsp->period_bytes / 4) {
3802 spin_unlock_irq(&hdsp->lock);
3803 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3809 spin_unlock_irq(&hdsp->lock);
3813 spin_unlock_irq(&hdsp->lock);
3816 /* how to make sure that the rate matches an externally-set one ?
3819 spin_lock_irq(&hdsp->lock);
3820 if (! hdsp->clock_source_locked) {
3821 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
3822 spin_unlock_irq(&hdsp->lock);
3823 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3827 spin_unlock_irq(&hdsp->lock);
3829 if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
3830 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3837 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
3838 struct snd_pcm_channel_info *info)
3840 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3843 snd_assert(info->channel < hdsp->max_channels, return -EINVAL);
3845 if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
3848 info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
3854 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
3855 unsigned int cmd, void *arg)
3858 case SNDRV_PCM_IOCTL1_RESET:
3859 return snd_hdsp_reset(substream);
3860 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3861 return snd_hdsp_channel_info(substream, arg);
3866 return snd_pcm_lib_ioctl(substream, cmd, arg);
3869 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
3871 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3872 struct snd_pcm_substream *other;
3875 if (hdsp_check_for_iobox (hdsp))
3878 if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
3881 spin_lock(&hdsp->lock);
3882 running = hdsp->running;
3884 case SNDRV_PCM_TRIGGER_START:
3885 running |= 1 << substream->stream;
3887 case SNDRV_PCM_TRIGGER_STOP:
3888 running &= ~(1 << substream->stream);
3892 spin_unlock(&hdsp->lock);
3895 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3896 other = hdsp->capture_substream;
3898 other = hdsp->playback_substream;
3901 struct list_head *pos;
3902 struct snd_pcm_substream *s;
3903 snd_pcm_group_for_each(pos, substream) {
3904 s = snd_pcm_group_substream_entry(pos);
3906 snd_pcm_trigger_done(s, substream);
3907 if (cmd == SNDRV_PCM_TRIGGER_START)
3908 running |= 1 << s->stream;
3910 running &= ~(1 << s->stream);
3914 if (cmd == SNDRV_PCM_TRIGGER_START) {
3915 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
3916 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
3917 hdsp_silence_playback(hdsp);
3920 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3921 hdsp_silence_playback(hdsp);
3924 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
3925 hdsp_silence_playback(hdsp);
3928 snd_pcm_trigger_done(substream, substream);
3929 if (!hdsp->running && running)
3930 hdsp_start_audio(hdsp);
3931 else if (hdsp->running && !running)
3932 hdsp_stop_audio(hdsp);
3933 hdsp->running = running;
3934 spin_unlock(&hdsp->lock);
3939 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
3941 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3944 if (hdsp_check_for_iobox (hdsp))
3947 if (hdsp_check_for_firmware(hdsp, 1))
3950 spin_lock_irq(&hdsp->lock);
3952 hdsp_reset_hw_pointer(hdsp);
3953 spin_unlock_irq(&hdsp->lock);
3957 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
3959 .info = (SNDRV_PCM_INFO_MMAP |
3960 SNDRV_PCM_INFO_MMAP_VALID |
3961 SNDRV_PCM_INFO_NONINTERLEAVED |
3962 SNDRV_PCM_INFO_SYNC_START |
3963 SNDRV_PCM_INFO_DOUBLE),
3964 #ifdef SNDRV_BIG_ENDIAN
3965 .formats = SNDRV_PCM_FMTBIT_S32_BE,
3967 .formats = SNDRV_PCM_FMTBIT_S32_LE,
3969 .rates = (SNDRV_PCM_RATE_32000 |
3970 SNDRV_PCM_RATE_44100 |
3971 SNDRV_PCM_RATE_48000 |
3972 SNDRV_PCM_RATE_64000 |
3973 SNDRV_PCM_RATE_88200 |
3974 SNDRV_PCM_RATE_96000),
3978 .channels_max = HDSP_MAX_CHANNELS,
3979 .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
3980 .period_bytes_min = (64 * 4) * 10,
3981 .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS,
3987 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
3989 .info = (SNDRV_PCM_INFO_MMAP |
3990 SNDRV_PCM_INFO_MMAP_VALID |
3991 SNDRV_PCM_INFO_NONINTERLEAVED |
3992 SNDRV_PCM_INFO_SYNC_START),
3993 #ifdef SNDRV_BIG_ENDIAN
3994 .formats = SNDRV_PCM_FMTBIT_S32_BE,
3996 .formats = SNDRV_PCM_FMTBIT_S32_LE,
3998 .rates = (SNDRV_PCM_RATE_32000 |
3999 SNDRV_PCM_RATE_44100 |
4000 SNDRV_PCM_RATE_48000 |
4001 SNDRV_PCM_RATE_64000 |
4002 SNDRV_PCM_RATE_88200 |
4003 SNDRV_PCM_RATE_96000),
4007 .channels_max = HDSP_MAX_CHANNELS,
4008 .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4009 .period_bytes_min = (64 * 4) * 10,
4010 .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS,
4016 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4018 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4019 .count = ARRAY_SIZE(hdsp_period_sizes),
4020 .list = hdsp_period_sizes,
4024 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4026 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4027 .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4028 .list = hdsp_9632_sample_rates,
4032 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4033 struct snd_pcm_hw_rule *rule)
4035 struct hdsp *hdsp = rule->private;
4036 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4037 if (hdsp->io_type == H9632) {
4038 unsigned int list[3];
4039 list[0] = hdsp->qs_in_channels;
4040 list[1] = hdsp->ds_in_channels;
4041 list[2] = hdsp->ss_in_channels;
4042 return snd_interval_list(c, 3, list, 0);
4044 unsigned int list[2];
4045 list[0] = hdsp->ds_in_channels;
4046 list[1] = hdsp->ss_in_channels;
4047 return snd_interval_list(c, 2, list, 0);
4051 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4052 struct snd_pcm_hw_rule *rule)
4054 unsigned int list[3];
4055 struct hdsp *hdsp = rule->private;
4056 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4057 if (hdsp->io_type == H9632) {
4058 list[0] = hdsp->qs_out_channels;
4059 list[1] = hdsp->ds_out_channels;
4060 list[2] = hdsp->ss_out_channels;
4061 return snd_interval_list(c, 3, list, 0);
4063 list[0] = hdsp->ds_out_channels;
4064 list[1] = hdsp->ss_out_channels;
4066 return snd_interval_list(c, 2, list, 0);
4069 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4070 struct snd_pcm_hw_rule *rule)
4072 struct hdsp *hdsp = rule->private;
4073 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4074 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4075 if (r->min > 96000 && hdsp->io_type == H9632) {
4076 struct snd_interval t = {
4077 .min = hdsp->qs_in_channels,
4078 .max = hdsp->qs_in_channels,
4081 return snd_interval_refine(c, &t);
4082 } else if (r->min > 48000 && r->max <= 96000) {
4083 struct snd_interval t = {
4084 .min = hdsp->ds_in_channels,
4085 .max = hdsp->ds_in_channels,
4088 return snd_interval_refine(c, &t);
4089 } else if (r->max < 64000) {
4090 struct snd_interval t = {
4091 .min = hdsp->ss_in_channels,
4092 .max = hdsp->ss_in_channels,
4095 return snd_interval_refine(c, &t);
4100 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4101 struct snd_pcm_hw_rule *rule)
4103 struct hdsp *hdsp = rule->private;
4104 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4105 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4106 if (r->min > 96000 && hdsp->io_type == H9632) {
4107 struct snd_interval t = {
4108 .min = hdsp->qs_out_channels,
4109 .max = hdsp->qs_out_channels,
4112 return snd_interval_refine(c, &t);
4113 } else if (r->min > 48000 && r->max <= 96000) {
4114 struct snd_interval t = {
4115 .min = hdsp->ds_out_channels,
4116 .max = hdsp->ds_out_channels,
4119 return snd_interval_refine(c, &t);
4120 } else if (r->max < 64000) {
4121 struct snd_interval t = {
4122 .min = hdsp->ss_out_channels,
4123 .max = hdsp->ss_out_channels,
4126 return snd_interval_refine(c, &t);
4131 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4132 struct snd_pcm_hw_rule *rule)
4134 struct hdsp *hdsp = rule->private;
4135 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4136 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4137 if (c->min >= hdsp->ss_out_channels) {
4138 struct snd_interval t = {
4143 return snd_interval_refine(r, &t);
4144 } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4145 struct snd_interval t = {
4150 return snd_interval_refine(r, &t);
4151 } else if (c->max <= hdsp->ds_out_channels) {
4152 struct snd_interval t = {
4157 return snd_interval_refine(r, &t);
4162 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4163 struct snd_pcm_hw_rule *rule)
4165 struct hdsp *hdsp = rule->private;
4166 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4167 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4168 if (c->min >= hdsp->ss_in_channels) {
4169 struct snd_interval t = {
4174 return snd_interval_refine(r, &t);
4175 } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4176 struct snd_interval t = {
4181 return snd_interval_refine(r, &t);
4182 } else if (c->max <= hdsp->ds_in_channels) {
4183 struct snd_interval t = {
4188 return snd_interval_refine(r, &t);
4193 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4195 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4196 struct snd_pcm_runtime *runtime = substream->runtime;
4198 if (hdsp_check_for_iobox (hdsp))
4201 if (hdsp_check_for_firmware(hdsp, 1))
4204 spin_lock_irq(&hdsp->lock);
4206 snd_pcm_set_sync(substream);
4208 runtime->hw = snd_hdsp_playback_subinfo;
4209 runtime->dma_area = hdsp->playback_buffer;
4210 runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4212 hdsp->playback_pid = current->pid;
4213 hdsp->playback_substream = substream;
4215 spin_unlock_irq(&hdsp->lock);
4217 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4218 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4219 if (hdsp->clock_source_locked) {
4220 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4221 } else if (hdsp->io_type == H9632) {
4222 runtime->hw.rate_max = 192000;
4223 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4224 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4226 if (hdsp->io_type == H9632) {
4227 runtime->hw.channels_min = hdsp->qs_out_channels;
4228 runtime->hw.channels_max = hdsp->ss_out_channels;
4231 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4232 snd_hdsp_hw_rule_out_channels, hdsp,
4233 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4234 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4235 snd_hdsp_hw_rule_out_channels_rate, hdsp,
4236 SNDRV_PCM_HW_PARAM_RATE, -1);
4237 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4238 snd_hdsp_hw_rule_rate_out_channels, hdsp,
4239 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4241 hdsp->creg_spdif_stream = hdsp->creg_spdif;
4242 hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4243 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4244 SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4248 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4250 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4252 spin_lock_irq(&hdsp->lock);
4254 hdsp->playback_pid = -1;
4255 hdsp->playback_substream = NULL;
4257 spin_unlock_irq(&hdsp->lock);
4259 hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4260 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4261 SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4266 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4268 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4269 struct snd_pcm_runtime *runtime = substream->runtime;
4271 if (hdsp_check_for_iobox (hdsp))
4274 if (hdsp_check_for_firmware(hdsp, 1))
4277 spin_lock_irq(&hdsp->lock);
4279 snd_pcm_set_sync(substream);
4281 runtime->hw = snd_hdsp_capture_subinfo;
4282 runtime->dma_area = hdsp->capture_buffer;
4283 runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4285 hdsp->capture_pid = current->pid;
4286 hdsp->capture_substream = substream;
4288 spin_unlock_irq(&hdsp->lock);
4290 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4291 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4292 if (hdsp->io_type == H9632) {
4293 runtime->hw.channels_min = hdsp->qs_in_channels;
4294 runtime->hw.channels_max = hdsp->ss_in_channels;
4295 runtime->hw.rate_max = 192000;
4296 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4297 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4299 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4300 snd_hdsp_hw_rule_in_channels, hdsp,
4301 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4302 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4303 snd_hdsp_hw_rule_in_channels_rate, hdsp,
4304 SNDRV_PCM_HW_PARAM_RATE, -1);
4305 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4306 snd_hdsp_hw_rule_rate_in_channels, hdsp,
4307 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4311 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4313 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4315 spin_lock_irq(&hdsp->lock);
4317 hdsp->capture_pid = -1;
4318 hdsp->capture_substream = NULL;
4320 spin_unlock_irq(&hdsp->lock);
4324 static int snd_hdsp_hwdep_dummy_op(struct snd_hwdep *hw, struct file *file)
4326 /* we have nothing to initialize but the call is required */
4331 /* helper functions for copying meter values */
4332 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4334 u32 val = readl(src);
4335 return copy_to_user(dest, &val, 4);
4338 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4340 u32 rms_low, rms_high;
4342 rms_low = readl(src_low);
4343 rms_high = readl(src_high);
4344 rms = ((u64)rms_high << 32) | rms_low;
4345 return copy_to_user(dest, &rms, 8);
4348 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4350 u32 rms_low, rms_high;
4352 rms_low = readl(src_low) & 0xffffff00;
4353 rms_high = readl(src_high) & 0xffffff00;
4354 rms = ((u64)rms_high << 32) | rms_low;
4355 return copy_to_user(dest, &rms, 8);
4358 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4360 int doublespeed = 0;
4361 int i, j, channels, ofs;
4363 if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4365 channels = doublespeed ? 14 : 26;
4366 for (i = 0, j = 0; i < 26; ++i) {
4367 if (doublespeed && (i & 4))
4369 ofs = HDSP_9652_peakBase - j * 4;
4370 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4372 ofs -= channels * 4;
4373 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4375 ofs -= channels * 4;
4376 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4378 ofs = HDSP_9652_rmsBase + j * 8;
4379 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4380 hdsp->iobase + ofs + 4))
4382 ofs += channels * 8;
4383 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4384 hdsp->iobase + ofs + 4))
4386 ofs += channels * 8;
4387 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4388 hdsp->iobase + ofs + 4))
4395 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4398 struct hdsp_9632_meters __iomem *m;
4399 int doublespeed = 0;
4401 if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4403 m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4404 for (i = 0, j = 0; i < 16; ++i, ++j) {
4405 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4407 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4409 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4411 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4412 &m->input_rms_high[j]))
4414 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4415 &m->playback_rms_high[j]))
4417 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4418 &m->output_rms_high[j]))
4420 if (doublespeed && i == 3) i += 4;
4425 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4429 for (i = 0; i < 26; i++) {
4430 if (copy_u32_le(&peak_rms->playback_peaks[i],
4431 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4433 if (copy_u32_le(&peak_rms->input_peaks[i],
4434 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4437 for (i = 0; i < 28; i++) {
4438 if (copy_u32_le(&peak_rms->output_peaks[i],
4439 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4442 for (i = 0; i < 26; ++i) {
4443 if (copy_u64_le(&peak_rms->playback_rms[i],
4444 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4445 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4447 if (copy_u64_le(&peak_rms->input_rms[i],
4448 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4449 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4455 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4457 struct hdsp *hdsp = (struct hdsp *)hw->private_data;
4458 void __user *argp = (void __user *)arg;
4461 case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4462 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4464 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4465 snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4469 switch (hdsp->io_type) {
4471 return hdsp_9652_get_peak(hdsp, peak_rms);
4473 return hdsp_9632_get_peak(hdsp, peak_rms);
4475 return hdsp_get_peak(hdsp, peak_rms);
4478 case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4479 struct hdsp_config_info info;
4480 unsigned long flags;
4483 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4484 snd_printk(KERN_ERR "Hammerfall-DSP: Firmware needs to be uploaded to the card.\n");
4487 spin_lock_irqsave(&hdsp->lock, flags);
4488 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4489 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4490 if (hdsp->io_type != H9632)
4491 info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4492 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4493 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != H9632) ? 3 : 1); ++i)
4494 info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4495 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4496 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
4497 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
4498 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
4499 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
4500 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4501 info.system_sample_rate = hdsp->system_sample_rate;
4502 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4503 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4504 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4505 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4506 info.line_out = (unsigned char)hdsp_line_out(hdsp);
4507 if (hdsp->io_type == H9632) {
4508 info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4509 info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4510 info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4511 info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
4514 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4515 info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
4516 spin_unlock_irqrestore(&hdsp->lock, flags);
4517 if (copy_to_user(argp, &info, sizeof(info)))
4521 case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4522 struct hdsp_9632_aeb h9632_aeb;
4524 if (hdsp->io_type != H9632) return -EINVAL;
4525 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4526 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4527 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4531 case SNDRV_HDSP_IOCTL_GET_VERSION: {
4532 struct hdsp_version hdsp_version;
4535 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4536 if (hdsp->io_type == Undefined) {
4537 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4540 hdsp_version.io_type = hdsp->io_type;
4541 hdsp_version.firmware_rev = hdsp->firmware_rev;
4542 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4546 case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4547 struct hdsp_firmware __user *firmware;
4548 u32 __user *firmware_data;
4551 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4552 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4553 if (hdsp->io_type == Undefined) return -EINVAL;
4555 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4558 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4559 firmware = (struct hdsp_firmware __user *)argp;
4561 if (get_user(firmware_data, &firmware->firmware_data))
4564 if (hdsp_check_for_iobox (hdsp))
4567 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
4570 hdsp->state |= HDSP_FirmwareCached;
4572 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4575 if (!(hdsp->state & HDSP_InitializationComplete)) {
4576 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4579 snd_hdsp_initialize_channels(hdsp);
4580 snd_hdsp_initialize_midi_flush(hdsp);
4582 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4583 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4589 case SNDRV_HDSP_IOCTL_GET_MIXER: {
4590 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4591 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4601 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4602 .open = snd_hdsp_playback_open,
4603 .close = snd_hdsp_playback_release,
4604 .ioctl = snd_hdsp_ioctl,
4605 .hw_params = snd_hdsp_hw_params,
4606 .prepare = snd_hdsp_prepare,
4607 .trigger = snd_hdsp_trigger,
4608 .pointer = snd_hdsp_hw_pointer,
4609 .copy = snd_hdsp_playback_copy,
4610 .silence = snd_hdsp_hw_silence,
4613 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4614 .open = snd_hdsp_capture_open,
4615 .close = snd_hdsp_capture_release,
4616 .ioctl = snd_hdsp_ioctl,
4617 .hw_params = snd_hdsp_hw_params,
4618 .prepare = snd_hdsp_prepare,
4619 .trigger = snd_hdsp_trigger,
4620 .pointer = snd_hdsp_hw_pointer,
4621 .copy = snd_hdsp_capture_copy,
4624 static int __devinit snd_hdsp_create_hwdep(struct snd_card *card,
4627 struct snd_hwdep *hw;
4630 if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4634 hw->private_data = hdsp;
4635 strcpy(hw->name, "HDSP hwdep interface");
4637 hw->ops.open = snd_hdsp_hwdep_dummy_op;
4638 hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4639 hw->ops.release = snd_hdsp_hwdep_dummy_op;
4644 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4646 struct snd_pcm *pcm;
4649 if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4653 pcm->private_data = hdsp;
4654 strcpy(pcm->name, hdsp->card_name);
4656 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4657 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4659 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4664 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4666 hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4667 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4670 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4674 if (hdsp_fifo_wait (hdsp, 0, 100)) {
4675 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4679 for (i = 0; i < hdsp->max_channels; ++i) {
4680 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4681 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4687 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
4689 int status, aebi_channels, aebo_channels;
4691 switch (hdsp->io_type) {
4693 hdsp->card_name = "RME Hammerfall DSP + Digiface";
4694 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
4695 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
4699 hdsp->card_name = "RME Hammerfall HDSP 9652";
4700 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
4701 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
4705 status = hdsp_read(hdsp, HDSP_statusRegister);
4706 /* HDSP_AEBx bits are low when AEB are connected */
4707 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
4708 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
4709 hdsp->card_name = "RME Hammerfall HDSP 9632";
4710 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
4711 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
4712 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
4713 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
4714 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
4715 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
4719 hdsp->card_name = "RME Hammerfall DSP + Multiface";
4720 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
4721 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
4725 /* should never get here */
4730 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
4732 snd_hdsp_flush_midi_input (hdsp, 0);
4733 snd_hdsp_flush_midi_input (hdsp, 1);
4736 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
4740 if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
4741 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
4746 if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
4747 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
4751 if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
4752 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
4753 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
4758 if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
4759 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
4763 snd_hdsp_proc_init(hdsp);
4765 hdsp->system_sample_rate = -1;
4766 hdsp->playback_pid = -1;
4767 hdsp->capture_pid = -1;
4768 hdsp->capture_substream = NULL;
4769 hdsp->playback_substream = NULL;
4771 if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
4772 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
4776 if (!(hdsp->state & HDSP_InitializationComplete)) {
4777 strcpy(card->shortname, "Hammerfall DSP");
4778 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
4779 hdsp->port, hdsp->irq);
4781 if ((err = snd_card_register(card)) < 0) {
4782 snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
4785 hdsp->state |= HDSP_InitializationComplete;
4791 #ifdef HDSP_FW_LOADER
4792 /* load firmware via hotplug fw loader */
4793 static int __devinit hdsp_request_fw_loader(struct hdsp *hdsp)
4796 const struct firmware *fw;
4799 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4801 if (hdsp->io_type == Undefined) {
4802 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4804 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4808 /* caution: max length of firmware filename is 30! */
4809 switch (hdsp->io_type) {
4811 if (hdsp->firmware_rev == 0xa)
4812 fwfile = "multiface_firmware.bin";
4814 fwfile = "multiface_firmware_rev11.bin";
4817 if (hdsp->firmware_rev == 0xa)
4818 fwfile = "digiface_firmware.bin";
4820 fwfile = "digiface_firmware_rev11.bin";
4823 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
4827 if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
4828 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
4831 if (fw->size < sizeof(hdsp->firmware_cache)) {
4832 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4833 (int)fw->size, (int)sizeof(hdsp->firmware_cache));
4834 release_firmware(fw);
4838 memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
4840 release_firmware(fw);
4842 hdsp->state |= HDSP_FirmwareCached;
4844 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4847 if (!(hdsp->state & HDSP_InitializationComplete)) {
4848 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4851 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
4852 snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
4855 snd_hdsp_initialize_channels(hdsp);
4856 snd_hdsp_initialize_midi_flush(hdsp);
4857 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4858 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4866 static int __devinit snd_hdsp_create(struct snd_card *card,
4869 struct pci_dev *pci = hdsp->pci;
4876 hdsp->midi[0].rmidi = NULL;
4877 hdsp->midi[1].rmidi = NULL;
4878 hdsp->midi[0].input = NULL;
4879 hdsp->midi[1].input = NULL;
4880 hdsp->midi[0].output = NULL;
4881 hdsp->midi[1].output = NULL;
4882 hdsp->midi[0].pending = 0;
4883 hdsp->midi[1].pending = 0;
4884 spin_lock_init(&hdsp->midi[0].lock);
4885 spin_lock_init(&hdsp->midi[1].lock);
4886 hdsp->iobase = NULL;
4887 hdsp->control_register = 0;
4888 hdsp->control2_register = 0;
4889 hdsp->io_type = Undefined;
4890 hdsp->max_channels = 26;
4894 spin_lock_init(&hdsp->lock);
4896 tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
4898 pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
4899 hdsp->firmware_rev &= 0xff;
4901 /* From Martin Bjoernsen :
4902 "It is important that the card's latency timer register in
4903 the PCI configuration space is set to a value much larger
4904 than 0 by the computer's BIOS or the driver.
4905 The windows driver always sets this 8 bit register [...]
4906 to its maximum 255 to avoid problems with some computers."
4908 pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
4910 strcpy(card->driver, "H-DSP");
4911 strcpy(card->mixername, "Xilinx FPGA");
4913 if (hdsp->firmware_rev < 0xa)
4915 else if (hdsp->firmware_rev < 0x64)
4916 hdsp->card_name = "RME Hammerfall DSP";
4917 else if (hdsp->firmware_rev < 0x96) {
4918 hdsp->card_name = "RME HDSP 9652";
4921 hdsp->card_name = "RME HDSP 9632";
4922 hdsp->max_channels = 16;
4926 if ((err = pci_enable_device(pci)) < 0)
4929 pci_set_master(hdsp->pci);
4931 if ((err = pci_request_regions(pci, "hdsp")) < 0)
4933 hdsp->port = pci_resource_start(pci, 0);
4934 if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
4935 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
4939 if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
4941 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
4945 hdsp->irq = pci->irq;
4946 hdsp->precise_ptr = 0;
4947 hdsp->use_midi_tasklet = 1;
4949 if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
4952 if (!is_9652 && !is_9632) {
4953 /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */
4956 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
4957 #ifdef HDSP_FW_LOADER
4958 if ((err = hdsp_request_fw_loader(hdsp)) < 0)
4959 /* we don't fail as this can happen
4960 if userspace is not ready for
4963 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
4965 /* init is complete, we return */
4968 /* no iobox connected, we defer initialization */
4969 snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
4970 if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
4974 snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
4975 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
4976 hdsp->io_type = Multiface;
4978 hdsp->io_type = Digiface;
4982 if ((err = snd_hdsp_enable_io(hdsp)) != 0)
4986 hdsp->io_type = H9652;
4989 hdsp->io_type = H9632;
4991 if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
4994 snd_hdsp_initialize_channels(hdsp);
4995 snd_hdsp_initialize_midi_flush(hdsp);
4997 hdsp->state |= HDSP_FirmwareLoaded;
4999 if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5005 static int snd_hdsp_free(struct hdsp *hdsp)
5008 /* stop the audio, and cancel all interrupts */
5009 tasklet_kill(&hdsp->midi_tasklet);
5010 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5011 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5015 free_irq(hdsp->irq, (void *)hdsp);
5017 snd_hdsp_free_buffers(hdsp);
5020 iounmap(hdsp->iobase);
5023 pci_release_regions(hdsp->pci);
5025 pci_disable_device(hdsp->pci);
5029 static void snd_hdsp_card_free(struct snd_card *card)
5031 struct hdsp *hdsp = (struct hdsp *) card->private_data;
5034 snd_hdsp_free(hdsp);
5037 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5038 const struct pci_device_id *pci_id)
5042 struct snd_card *card;
5045 if (dev >= SNDRV_CARDS)
5052 if (!(card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct hdsp))))
5055 hdsp = (struct hdsp *) card->private_data;
5056 card->private_free = snd_hdsp_card_free;
5059 snd_card_set_dev(card, &pci->dev);
5061 if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5062 snd_card_free(card);
5066 strcpy(card->shortname, "Hammerfall DSP");
5067 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5068 hdsp->port, hdsp->irq);
5070 if ((err = snd_card_register(card)) < 0) {
5071 snd_card_free(card);
5074 pci_set_drvdata(pci, card);
5079 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5081 snd_card_free(pci_get_drvdata(pci));
5082 pci_set_drvdata(pci, NULL);
5085 static struct pci_driver driver = {
5086 .name = "RME Hammerfall DSP",
5087 .id_table = snd_hdsp_ids,
5088 .probe = snd_hdsp_probe,
5089 .remove = __devexit_p(snd_hdsp_remove),
5092 static int __init alsa_card_hdsp_init(void)
5094 return pci_register_driver(&driver);
5097 static void __exit alsa_card_hdsp_exit(void)
5099 pci_unregister_driver(&driver);
5102 module_init(alsa_card_hdsp_init)
5103 module_exit(alsa_card_hdsp_exit)